2017-07-22 01:34:30 +00:00
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From 792e2f54d07c74863fbd3132ce996e6dd9988f78 Mon Sep 17 00:00:00 2001
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2017-07-05 02:14:49 +00:00
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From: Marc Zyngier <Marc.Zyngier@arm.com>
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Date: Sat, 1 Jul 2017 15:16:34 +0100
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2017-07-22 01:34:30 +00:00
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Subject: [PATCH 01/11] ARM64: dts: marvell: armada37xx: Fix GIC maintenance
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2017-07-05 02:14:49 +00:00
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interrupt
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The GIC-500 integrated in the Armada-37xx SoCs is compliant with
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the GICv3 architecture, and thus provides a maintenance interrupt
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that is required for hypervisors to function correctly.
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With the interrupt provided in the DT, KVM now works as it should.
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Tested on an Espressobin system.
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Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
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---
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arch/arm64/boot/dts/marvell/armada-37xx.dtsi | 1 +
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1 file changed, 1 insertion(+)
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diff --git a/arch/arm64/boot/dts/marvell/armada-37xx.dtsi b/arch/arm64/boot/dts/marvell/armada-37xx.dtsi
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index bc179efb10ef..592e95e5f633 100644
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--- a/arch/arm64/boot/dts/marvell/armada-37xx.dtsi
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+++ b/arch/arm64/boot/dts/marvell/armada-37xx.dtsi
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@@ -312,6 +312,7 @@
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interrupt-controller;
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reg = <0x1d00000 0x10000>, /* GICD */
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<0x1d40000 0x40000>; /* GICR */
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+ interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
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};
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};
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--
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2017-07-22 01:34:30 +00:00
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2.13.3
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2017-07-05 02:14:49 +00:00
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