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https://github.com/archlinuxarm/PKGBUILDs.git
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39 lines
1.3 KiB
Diff
39 lines
1.3 KiB
Diff
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From 9f83472afe2c1966db13e2e1274e090d30390c96 Mon Sep 17 00:00:00 2001
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From: Fabio Estevam <fabio.estevam@freescale.com>
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Date: Sun, 5 May 2013 15:52:54 +0000
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Subject: [PATCH 10/15] mx23: Operate DDR voltage supply at 2.5V
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After the recent fixes in the mx23 DDR setup, it is safe to operate DDR voltage
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at the recommended 2.5V voltage level again.
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Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
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---
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arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c | 4 ++--
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1 file changed, 2 insertions(+), 2 deletions(-)
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diff --git a/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c b/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c
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index 41fb803..4ed197b 100644
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--- a/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c
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+++ b/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c
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@@ -247,7 +247,7 @@ static void mx23_mem_setup_vddmem(void)
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struct mxs_power_regs *power_regs =
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(struct mxs_power_regs *)MXS_POWER_BASE;
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- writel((0x12 << POWER_VDDMEMCTRL_TRG_OFFSET) |
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+ writel((0x10 << POWER_VDDMEMCTRL_TRG_OFFSET) |
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POWER_VDDMEMCTRL_ENABLE_ILIMIT |
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POWER_VDDMEMCTRL_ENABLE_LINREG |
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POWER_VDDMEMCTRL_PULLDOWN_ACTIVE,
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@@ -255,7 +255,7 @@ static void mx23_mem_setup_vddmem(void)
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early_delay(10000);
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- writel((0x12 << POWER_VDDMEMCTRL_TRG_OFFSET) |
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+ writel((0x10 << POWER_VDDMEMCTRL_TRG_OFFSET) |
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POWER_VDDMEMCTRL_ENABLE_LINREG,
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&power_regs->hw_power_vddmemctrl);
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}
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--
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1.8.2.2
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