From 0261b7660490aed3ae8c9b34c6cf8d5341d12ddd Mon Sep 17 00:00:00 2001 From: Kevin Mihelich Date: Thu, 1 Oct 2020 19:03:00 +0000 Subject: [PATCH] core/gcc to 10.2.0-3 --- core/gcc/PKGBUILD | 12 +- .../ipa-fix-ICE-in-get_default_value.patch | 80 ++++++++++ ...it-CPP-when-combined-with-IPA-bit-CP.patch | 147 ++++++++++++++++++ 3 files changed, 238 insertions(+), 1 deletion(-) create mode 100644 core/gcc/ipa-fix-ICE-in-get_default_value.patch create mode 100644 core/gcc/ipa-fix-bit-CPP-when-combined-with-IPA-bit-CP.patch diff --git a/core/gcc/PKGBUILD b/core/gcc/PKGBUILD index 77e307ecf..cece84985 100644 --- a/core/gcc/PKGBUILD +++ b/core/gcc/PKGBUILD @@ -19,7 +19,7 @@ pkgname=(gcc gcc-libs gcc-fortran gcc-objc gcc-go gcc-d) pkgver=10.2.0 _majorver=${pkgver%%.*} _islver=0.21 -pkgrel=2 +pkgrel=3 pkgdesc='The GNU Compiler Collection' arch=(x86_64) license=(GPL LGPL FDL custom) @@ -35,6 +35,8 @@ source=(https://sourceware.org/pub/gcc/releases/gcc-${pkgver}/gcc-${pkgver}.tar. c89 c99 gdc_phobos_path.patch fs64270.patch + ipa-fix-bit-CPP-when-combined-with-IPA-bit-CP.patch + ipa-fix-ICE-in-get_default_value.patch 0001-ARMv5-disable-LDRD-STRD.patch) validpgpkeys=(F3691687D867B81B51CE07D9BBE43771487328A9 # bpiotrowski@archlinux.org 86CFFCA918CF3AF47147588051E8B148A9999C34 # evangelos@foutrelis.com @@ -47,6 +49,8 @@ sha256sums=('b8dd4368bb9c7f0b98188317ee0254dd8cc99d1e3a18d0ff146c855fe16c1d8c' '2513c6d9984dd0a2058557bf00f06d8d5181734e41dcfe07be7ed86f2959622a' 'c86372c207d174c0918d4aedf1cb79f7fc093649eb1ad8d9450dccc46849d308' '1ef190ed4562c4db8c1196952616cd201cfdd788b65f302ac2cc4dabb4d72cee' + 'fcb11c9bcea320afd202b031b48f8750aeaedaa4b0c5dddcd2c0a16381e927e4' + '42865f2af3f48140580c4ae70b6ea03b5bdca0f29654773ef0d42ce00d60ea16' 'ac6663528a1cbea30ed9627ef41ef13f25b3cd49c31e22b45b04aa911e6f562f') prepare() { @@ -75,6 +79,12 @@ prepare() { # https://bugs.archlinux.org/task/64270 patch -p1 -i "$srcdir/fs64270.patch" + # Fix a crash in mpv when mesa 20.2 is compiled with LTO + # https://gitlab.freedesktop.org/mesa/mesa/-/issues/3239 + # https://gcc.gnu.org/bugzilla/show_bug.cgi?id=96482 + patch -Np1 -i ../ipa-fix-bit-CPP-when-combined-with-IPA-bit-CP.patch + patch -Np1 -i ../ipa-fix-ICE-in-get_default_value.patch + # ALARM: Specify build host types, triplet patch [[ $CARCH == "arm" ]] && CONFIGFLAG="--host=armv5tel-unknown-linux-gnueabi --build=armv5tel-unknown-linux-gnueabi --with-arch=armv5te --with-float=soft" [[ $CARCH == "armv6h" ]] && CONFIGFLAG="--host=armv6l-unknown-linux-gnueabihf --build=armv6l-unknown-linux-gnueabihf --with-arch=armv6 --with-float=hard --with-fpu=vfp" diff --git a/core/gcc/ipa-fix-ICE-in-get_default_value.patch b/core/gcc/ipa-fix-ICE-in-get_default_value.patch new file mode 100644 index 000000000..572299462 --- /dev/null +++ b/core/gcc/ipa-fix-ICE-in-get_default_value.patch @@ -0,0 +1,80 @@ +From f91770216eade83f068528c1e4f00e2ac3b23044 Mon Sep 17 00:00:00 2001 +From: Martin Liska +Date: Thu, 13 Aug 2020 09:38:41 +0200 +Subject: [PATCH] ipa: fix ICE in get_default_value + +The patch aligns code with ipcp_bits_lattice::set_to_constant +where we properly mask m_value with m_mask. The same should +be done here. + +gcc/ChangeLog: + + PR ipa/96482 + * ipa-cp.c (ipcp_bits_lattice::meet_with_1): Mask m_value + with m_mask. + +gcc/testsuite/ChangeLog: + + PR ipa/96482 + * gcc.dg/ipa/pr96482-2.c: New test. +--- + gcc/ipa-cp.c | 2 +- + gcc/testsuite/gcc.dg/ipa/pr96482-2.c | 33 ++++++++++++++++++++++++++++ + 2 files changed, 34 insertions(+), 1 deletion(-) + create mode 100644 gcc/testsuite/gcc.dg/ipa/pr96482-2.c + +diff --git a/gcc/ipa-cp.c b/gcc/ipa-cp.c +index 2b21280d919..e4910a04ffa 100644 +--- a/gcc/ipa-cp.c ++++ b/gcc/ipa-cp.c +@@ -1048,7 +1048,7 @@ ipcp_bits_lattice::meet_with_1 (widest_int value, widest_int mask, + + widest_int old_mask = m_mask; + m_mask = (m_mask | mask) | (m_value ^ value); +- m_value &= value; ++ m_value &= ~m_mask; + + if (wi::sext (m_mask, precision) == -1) + return set_to_bottom (); +diff --git a/gcc/testsuite/gcc.dg/ipa/pr96482-2.c b/gcc/testsuite/gcc.dg/ipa/pr96482-2.c +new file mode 100644 +index 00000000000..54b71ac4fc0 +--- /dev/null ++++ b/gcc/testsuite/gcc.dg/ipa/pr96482-2.c +@@ -0,0 +1,33 @@ ++/* PR ipa/96482 */ ++/* { dg-do compile } */ ++/* { dg-options "-O2" } */ ++ ++int i2c_transfer(); ++void _dev_err(); ++ ++struct i2c_msg { ++ char bufaddr; ++ int adapterdev; ++} wdt87xx_i2c_xfer_client; ++ ++int wdt87xx_i2c_xfer_client_0, wdt87xx_i2c_xfer_rxdata, wdt87xx_get_string_str_idx; ++ ++void ++static wdt87xx_i2c_xfer(void *txdata, unsigned rxlen) { ++ struct i2c_msg msgs[] = {wdt87xx_i2c_xfer_client_0, rxlen, ++ wdt87xx_i2c_xfer_rxdata}; ++ int error = i2c_transfer(wdt87xx_i2c_xfer_client, msgs); ++ _dev_err("", __func__, error); ++} ++static void wdt87xx_get_string(unsigned len) { ++ char tx_buf[] = {wdt87xx_get_string_str_idx, 3}; ++ int rx_len = len + 2; ++ wdt87xx_i2c_xfer(tx_buf, rx_len); ++} ++ ++void ++wdt87xx_ts_probe_tx_buf() { ++ wdt87xx_get_string(34); ++ wdt87xx_get_string(8); ++ wdt87xx_i2c_xfer(wdt87xx_ts_probe_tx_buf, 2); ++} +-- +2.28.0 + diff --git a/core/gcc/ipa-fix-bit-CPP-when-combined-with-IPA-bit-CP.patch b/core/gcc/ipa-fix-bit-CPP-when-combined-with-IPA-bit-CP.patch new file mode 100644 index 000000000..cd812623c --- /dev/null +++ b/core/gcc/ipa-fix-bit-CPP-when-combined-with-IPA-bit-CP.patch @@ -0,0 +1,147 @@ +From d58f078ce2d53e5dab6b3d0d5f960504268e1894 Mon Sep 17 00:00:00 2001 +From: Martin Liska +Date: Wed, 12 Aug 2020 09:21:51 +0200 +Subject: [PATCH] ipa: fix bit CPP when combined with IPA bit CP + +As mentioned in the PR, let's consider the following example: + +int +__attribute__((noinline)) +foo(int arg) +{ + if (arg == 3) + return 1; + if (arg == 4) + return 123; + + __builtin_unreachable (); +} + +during WPA we find all calls of the function +(yes the call with value 5 is UBSAN): + + Node: foo/0: + param [0]: 5 [loc_time: 4, loc_size: 2, prop_time: 0, prop_size: 0] + 3 [loc_time: 3, loc_size: 3, prop_time: 0, prop_size: 0] + ctxs: VARIABLE + Bits: value = 0x5, mask = 0x6 + +in LTRANS we have the following VRP info: + + # RANGE [3, 3] NONZERO 3 + +when we AND masks in get_default_value we end up with 6 & 3 = 2 (0x010). +That means the only second (least significant bit) is unknown and +value (5 = 0x101) & ~mask gives us either 7 (0x111) or 5 (0x101). + +That's why if (arg_2(D) == 3) gets optimized to false. + +gcc/ChangeLog: + + PR ipa/96482 + * ipa-cp.c (ipcp_bits_lattice::meet_with_1): Drop value bits + for bits that are unknown. + (ipcp_bits_lattice::set_to_constant): Likewise. + * tree-ssa-ccp.c (get_default_value): Add sanity check that + IPA CP bit info has all bits set to zero in bits that + are unknown. + +gcc/testsuite/ChangeLog: + + PR ipa/96482 + * gcc.dg/ipa/pr96482.c: New test. +--- + gcc/ipa-cp.c | 3 +- + gcc/testsuite/gcc.dg/ipa/pr96482.c | 44 ++++++++++++++++++++++++++++++ + gcc/tree-ssa-ccp.c | 3 ++ + 3 files changed, 49 insertions(+), 1 deletion(-) + create mode 100644 gcc/testsuite/gcc.dg/ipa/pr96482.c + +diff --git a/gcc/ipa-cp.c b/gcc/ipa-cp.c +index 945a69977f3..2b21280d919 100644 +--- a/gcc/ipa-cp.c ++++ b/gcc/ipa-cp.c +@@ -1011,7 +1011,7 @@ ipcp_bits_lattice::set_to_constant (widest_int value, widest_int mask) + { + gcc_assert (top_p ()); + m_lattice_val = IPA_BITS_CONSTANT; +- m_value = value; ++ m_value = wi::bit_and (wi::bit_not (mask), value); + m_mask = mask; + return true; + } +@@ -1048,6 +1048,7 @@ ipcp_bits_lattice::meet_with_1 (widest_int value, widest_int mask, + + widest_int old_mask = m_mask; + m_mask = (m_mask | mask) | (m_value ^ value); ++ m_value &= value; + + if (wi::sext (m_mask, precision) == -1) + return set_to_bottom (); +diff --git a/gcc/testsuite/gcc.dg/ipa/pr96482.c b/gcc/testsuite/gcc.dg/ipa/pr96482.c +new file mode 100644 +index 00000000000..68ead798d28 +--- /dev/null ++++ b/gcc/testsuite/gcc.dg/ipa/pr96482.c +@@ -0,0 +1,44 @@ ++/* PR ipa/96482 */ ++/* { dg-do run } */ ++/* { dg-options "-O2 -flto" } */ ++/* { dg-require-effective-target lto } */ ++ ++int ++__attribute__((noinline)) ++foo(int arg) ++{ ++ if (arg == 3) ++ return 1; ++ if (arg == 4) ++ return 123; ++ ++ __builtin_unreachable (); ++} ++ ++int ++__attribute__((noinline)) ++baz(int x) ++{ ++ if (x != 0) ++ return foo(3); /* called */ ++ ++ return 1; ++} ++ ++int ++__attribute__((noinline)) ++bar(int x) ++{ ++ if (x == 0) ++ return foo(5); /* not executed */ ++ ++ return 1; ++} ++ ++int main(int argc, char **argv) ++{ ++ if (bar(argc) != baz(argc)) ++ __builtin_abort (); ++ ++ return 0; ++} +diff --git a/gcc/tree-ssa-ccp.c b/gcc/tree-ssa-ccp.c +index 7e3921869b8..65dffe06530 100644 +--- a/gcc/tree-ssa-ccp.c ++++ b/gcc/tree-ssa-ccp.c +@@ -306,6 +306,9 @@ get_default_value (tree var) + { + val.lattice_val = CONSTANT; + val.value = value; ++ widest_int ipa_value = wi::to_widest (value); ++ /* Unknown bits from IPA CP must be equal to zero. */ ++ gcc_assert (wi::bit_and (ipa_value, mask) == 0); + val.mask = mask; + if (nonzero_bits != -1) + val.mask &= extend_mask (nonzero_bits, +-- +2.28.0 +