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alarm/uboot-olinuxino to 2013.10-1

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This commit is contained in:
Kevin Mihelich 2014-01-08 20:15:55 +00:00
parent e6680adb0e
commit 046a99c364
18 changed files with 21 additions and 3798 deletions
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2955
alarm/uboot-olinuxino/0001-imx-Move-some-header-files-from-arch-mxs-to-imx-comm.patch
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File diff suppressed because it is too large Load diff

56
alarm/uboot-olinuxino/0002-mxs-mxsboot-Move-sdcard-BCB-header-to-4-sectors-offs.patch
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@ -1,56 +0,0 @@
From fcc4bf9d8412b72efa940da9e0d725e48ee0890f Mon Sep 17 00:00:00 2001
From: Otavio Salvador <otavio@ossystems.com.br>
Date: Wed, 24 Apr 2013 11:23:27 +0000
Subject: [PATCH 02/15] mxs: mxsboot: Move sdcard BCB header to 4 sectors
offset
The MX23 Boot ROM does blindly load from 2048 offset while the MX28
does parse the BCB header to known where to load the image from. We
move the BCB header to 4 sectors offset so same code can be used by
both SoCs avoiding code duplication.
This idea was given by Marek Vasut <marex@denx.de>
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Tested-by: Fabio Estevam <fabio.estevam@freescale.com>
Tested-by: Marek Vasut <marex@denx.de>
---
tools/mxsboot.c | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/tools/mxsboot.c b/tools/mxsboot.c
index 6c05aa4..d92c39f 100644
--- a/tools/mxsboot.c
+++ b/tools/mxsboot.c
@@ -551,7 +551,7 @@ static int mx28_create_sd_image(int infd, int outfd)
fsize = lseek(infd, 0, SEEK_END);
lseek(infd, 0, SEEK_SET);
- size = fsize + 512;
+ size = fsize + 4 * 512;
buf = malloc(size);
if (!buf) {
@@ -559,7 +559,7 @@ static int mx28_create_sd_image(int infd, int outfd)
goto err0;
}
- ret = read(infd, (uint8_t *)buf + 512, fsize);
+ ret = read(infd, (uint8_t *)buf + 4 * 512, fsize);
if (ret != fsize) {
ret = -1;
goto err1;
@@ -574,8 +574,8 @@ static int mx28_create_sd_image(int infd, int outfd)
cb->drv_info[0].chip_num = 0x0;
cb->drv_info[0].drive_type = 0x0;
cb->drv_info[0].tag = 0x1;
- cb->drv_info[0].first_sector_number = sd_sector + 1;
- cb->drv_info[0].sector_count = (size - 1) / 512;
+ cb->drv_info[0].first_sector_number = sd_sector + 4;
+ cb->drv_info[0].sector_count = (size - 4) / 512;
wr_size = write(outfd, buf, size);
if (wr_size != size) {
--
1.8.2.2

41
alarm/uboot-olinuxino/0003-mx23-Put-back-RAM-voltage-level-to-its-original-valu.patch
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@ -1,41 +0,0 @@
From b30c5c71affbc7552cf5d5f8ed26cdae533e4d70 Mon Sep 17 00:00:00 2001
From: Fabio Estevam <fabio.estevam@freescale.com>
Date: Fri, 26 Apr 2013 06:01:26 +0000
Subject: [PATCH 03/15] mx23: Put back RAM voltage level to its original value
commit 5c2f444c9 (mxs: Reset the EMI block on mx23) changed the DDR voltage
level, which causes mx23evk to fail to load a kernel.
Put back the original values, so that mx23evk can boot a kernel again.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Tested-by: Robert Nelson <robertcnelson@gmail.com>
---
arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c b/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c
index bc2d69c..4950490 100644
--- a/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c
+++ b/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c
@@ -234,7 +234,7 @@ static void mx23_mem_setup_vddmem(void)
struct mxs_power_regs *power_regs =
(struct mxs_power_regs *)MXS_POWER_BASE;
- writel((0x10 << POWER_VDDMEMCTRL_TRG_OFFSET) |
+ writel((0x12 << POWER_VDDMEMCTRL_TRG_OFFSET) |
POWER_VDDMEMCTRL_ENABLE_ILIMIT |
POWER_VDDMEMCTRL_ENABLE_LINREG |
POWER_VDDMEMCTRL_PULLDOWN_ACTIVE,
@@ -242,7 +242,7 @@ static void mx23_mem_setup_vddmem(void)
early_delay(10000);
- writel((0x10 << POWER_VDDMEMCTRL_TRG_OFFSET) |
+ writel((0x12 << POWER_VDDMEMCTRL_TRG_OFFSET) |
POWER_VDDMEMCTRL_ENABLE_LINREG,
&power_regs->hw_power_vddmemctrl);
}
--
1.8.2.2

41
alarm/uboot-olinuxino/0004-mx23-Fix-pad-voltage-selection-bit.patch
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@ -1,41 +0,0 @@
From e74c355ea6cb075230018379bde9ae7e0db33b4b Mon Sep 17 00:00:00 2001
From: Fabio Estevam <fabio.estevam@freescale.com>
Date: Fri, 3 May 2013 04:37:07 +0000
Subject: [PATCH 04/15] mx23: Fix pad voltage selection bit
On mx23 the pad voltage selection bit needs to be always '0', since '1' is a
reserved value.
For example:
Pin 108, EMI_A06 pin voltage selection:
0= 1.8V (mDDR) or 2.5V (DDR1);
1= reserved.
Fix the pad voltage definitions for the mx23 case.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Marek Vasut <marex@denx.de>
---
arch/arm/include/asm/arch-mxs/iomux.h | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/arm/include/asm/arch-mxs/iomux.h b/arch/arm/include/asm/arch-mxs/iomux.h
index 4288715..d919fb2 100644
--- a/arch/arm/include/asm/arch-mxs/iomux.h
+++ b/arch/arm/include/asm/arch-mxs/iomux.h
@@ -71,7 +71,11 @@ typedef u32 iomux_cfg_t;
#define PAD_16MA 3
#define PAD_1V8 0
+#if defined(CONFIG_MX28)
#define PAD_3V3 1
+#else
+#define PAD_3V3 0
+#endif
#define PAD_NOPULL 0
#define PAD_PULLUP 1
--
1.8.2.2

29
alarm/uboot-olinuxino/0005-mx23_olinuxino-Fix-DDR-pin-iomux-settings.patch
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@ -1,29 +0,0 @@
From b7737c45deaf235db4564d6e004be7be3f9f4836 Mon Sep 17 00:00:00 2001
From: Fabio Estevam <fabio.estevam@freescale.com>
Date: Fri, 3 May 2013 04:37:09 +0000
Subject: [PATCH 05/15] mx23_olinuxino: Fix DDR pin iomux settings
Change MUX_CONFIG_EMI to use the same drive strength as the bootlets code from
Freescale, which results in much better stability.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
---
board/olimex/mx23_olinuxino/spl_boot.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/board/olimex/mx23_olinuxino/spl_boot.c b/board/olimex/mx23_olinuxino/spl_boot.c
index a96c293..3755f29 100644
--- a/board/olimex/mx23_olinuxino/spl_boot.c
+++ b/board/olimex/mx23_olinuxino/spl_boot.c
@@ -29,7 +29,7 @@
#include <asm/arch/imx-regs.h>
#include <asm/arch/sys_proto.h>
-#define MUX_CONFIG_EMI (MXS_PAD_3V3 | MXS_PAD_16MA | MXS_PAD_PULLUP)
+#define MUX_CONFIG_EMI (MXS_PAD_3V3 | MXS_PAD_12MA | MXS_PAD_PULLUP)
#define MUX_CONFIG_SSP (MXS_PAD_3V3 | MXS_PAD_8MA | MXS_PAD_PULLUP)
const iomux_cfg_t iomux_setup[] = {
--
1.8.2.2

28
alarm/uboot-olinuxino/0006-mxs-spl_mem_init-Fix-comment-about-start-bit.patch
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@ -1,28 +0,0 @@
From ded8202977a9cc6a80c561a6090cb451108f384b Mon Sep 17 00:00:00 2001
From: Fabio Estevam <fabio.estevam@freescale.com>
Date: Fri, 3 May 2013 04:37:10 +0000
Subject: [PATCH 06/15] mxs: spl_mem_init: Fix comment about start bit
Start bit is part of HW_DRAM_CTL8 register, so fix the comment.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
---
arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c b/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c
index 4950490..300da0a 100644
--- a/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c
+++ b/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c
@@ -267,7 +267,7 @@ static void mx23_mem_init(void)
initialize_dram_values();
- /* Set START bit in DRAM_CTL16 */
+ /* Set START bit in DRAM_CTL8 */
setbits_le32(MXS_DRAM_BASE + 0x20, 1 << 16);
clrbits_le32(MXS_DRAM_BASE + 0x40, 1 << 17);
--
1.8.2.2

32
alarm/uboot-olinuxino/0007-mxs-spl_mem_init-Remove-erroneous-DDR-setting.patch
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@ -1,32 +0,0 @@
From ce10ca38bc54e6e8c6063de18a690f1e065339d6 Mon Sep 17 00:00:00 2001
From: Fabio Estevam <fabio.estevam@freescale.com>
Date: Fri, 3 May 2013 04:37:11 +0000
Subject: [PATCH 07/15] mxs: spl_mem_init: Remove erroneous DDR setting
On mx23 there is no 'DRAM init complete' in register HW_DRAM_CTL18.
Remove this erroneous setting.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
---
arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c | 4 ----
1 file changed, 4 deletions(-)
diff --git a/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c b/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c
index 300da0a..df25535 100644
--- a/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c
+++ b/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c
@@ -279,10 +279,6 @@ static void mx23_mem_init(void)
setbits_le32(MXS_DRAM_BASE + 0x40, 1 << 19);
setbits_le32(MXS_DRAM_BASE + 0x40, 1 << 11);
-
- /* Wait for bit 10 (DRAM init complete) in DRAM_CTL18 */
- while (!(readl(MXS_DRAM_BASE + 0x48) & (1 << 10)))
- ;
}
#endif
--
1.8.2.2

65
alarm/uboot-olinuxino/0008-mxs-spl_mem_init-Skip-the-initialization-of-some-DRA.patch
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@ -1,65 +0,0 @@
From 3da4b56d699dbcd9f2ae59c4787c20e2729f191d Mon Sep 17 00:00:00 2001
From: Fabio Estevam <fabio.estevam@freescale.com>
Date: Fri, 3 May 2013 04:37:12 +0000
Subject: [PATCH 08/15] mxs: spl_mem_init: Skip the initialization of some
DRAM_CTL registers
HW_DRAM_CTL27, HW_DRAM_CTL28 and HW_DRAM_CTL35 are not initialized as per
FSL bootlets code.
mx23 Reference Manual mark HW_DRAM_CTL27 and HW_DRAM_CTL28 as "reserved".
HW_DRAM_CTL8 is setup as the last element.
So skip the initialization of these DRAM_CTL registers.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
---
arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c | 17 +++++++++++++++--
1 file changed, 15 insertions(+), 2 deletions(-)
diff --git a/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c b/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c
index df25535..5eacd36 100644
--- a/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c
+++ b/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c
@@ -110,6 +110,7 @@ __weak void mxs_adjust_memory_params(uint32_t *dram_vals)
{
}
+#ifdef CONFIG_MX28
static void initialize_dram_values(void)
{
int i;
@@ -118,15 +119,27 @@ static void initialize_dram_values(void)
for (i = 0; i < ARRAY_SIZE(dram_vals); i++)
writel(dram_vals[i], MXS_DRAM_BASE + (4 * i));
+}
+#else
+static void initialize_dram_values(void)
+{
+ int i;
+
+ mxs_adjust_memory_params(dram_vals);
+
+ for (i = 0; i < ARRAY_SIZE(dram_vals); i++) {
+ if (i == 8 || i == 27 || i == 28 || i == 35)
+ continue;
+ writel(dram_vals[i], MXS_DRAM_BASE + (4 * i));
+ }
-#ifdef CONFIG_MX23
/*
* Enable tRAS lockout in HW_DRAM_CTL08 ; it must be the last
* element to be set
*/
writel((1 << 24), MXS_DRAM_BASE + (4 * 8));
-#endif
}
+#endif
static void mxs_mem_init_clock(void)
{
--
1.8.2.2

31
alarm/uboot-olinuxino/0009-mxs-spl_mem_init-Change-EMI-port-priority.patch
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@ -1,31 +0,0 @@
From e61fac261f081b5b68c304c3a7ce849cc08f3f79 Mon Sep 17 00:00:00 2001
From: Fabio Estevam <fabio.estevam@freescale.com>
Date: Fri, 3 May 2013 04:37:13 +0000
Subject: [PATCH 09/15] mxs: spl_mem_init: Change EMI port priority
FSL bootlets code set the PORT_PRIORITY_ORDER field of register HW_EMI_CTRL
as 0x2, which means:
PORT0231 = 0x02 Priority Order: AXI0, AHB2, AHB3, AHB1
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
---
arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c b/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c
index 5eacd36..41fb803 100644
--- a/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c
+++ b/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c
@@ -287,7 +287,7 @@ static void mx23_mem_init(void)
early_delay(20000);
/* Adjust EMI port priority. */
- clrsetbits_le32(0x80020000, 0x1f << 16, 0x8);
+ clrsetbits_le32(0x80020000, 0x1f << 16, 0x2);
early_delay(20000);
setbits_le32(MXS_DRAM_BASE + 0x40, 1 << 19);
--
1.8.2.2

38
alarm/uboot-olinuxino/0010-mx23-Operate-DDR-voltage-supply-at-2.5V.patch
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@ -1,38 +0,0 @@
From 9f83472afe2c1966db13e2e1274e090d30390c96 Mon Sep 17 00:00:00 2001
From: Fabio Estevam <fabio.estevam@freescale.com>
Date: Sun, 5 May 2013 15:52:54 +0000
Subject: [PATCH 10/15] mx23: Operate DDR voltage supply at 2.5V
After the recent fixes in the mx23 DDR setup, it is safe to operate DDR voltage
at the recommended 2.5V voltage level again.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
---
arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c b/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c
index 41fb803..4ed197b 100644
--- a/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c
+++ b/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c
@@ -247,7 +247,7 @@ static void mx23_mem_setup_vddmem(void)
struct mxs_power_regs *power_regs =
(struct mxs_power_regs *)MXS_POWER_BASE;
- writel((0x12 << POWER_VDDMEMCTRL_TRG_OFFSET) |
+ writel((0x10 << POWER_VDDMEMCTRL_TRG_OFFSET) |
POWER_VDDMEMCTRL_ENABLE_ILIMIT |
POWER_VDDMEMCTRL_ENABLE_LINREG |
POWER_VDDMEMCTRL_PULLDOWN_ACTIVE,
@@ -255,7 +255,7 @@ static void mx23_mem_setup_vddmem(void)
early_delay(10000);
- writel((0x12 << POWER_VDDMEMCTRL_TRG_OFFSET) |
+ writel((0x10 << POWER_VDDMEMCTRL_TRG_OFFSET) |
POWER_VDDMEMCTRL_ENABLE_LINREG,
&power_regs->hw_power_vddmemctrl);
}
--
1.8.2.2

29
alarm/uboot-olinuxino/0011-mx23_olinuxino-Do-not-set-voltage-selection-bit-for-.patch
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@ -1,29 +0,0 @@
From 3e273d1fb4d48d5e04ba6d538a8c2d4db9f5c3df Mon Sep 17 00:00:00 2001
From: Fabio Estevam <fabio.estevam@freescale.com>
Date: Sun, 5 May 2013 15:52:56 +0000
Subject: [PATCH 11/15] mx23_olinuxino: Do not set voltage selection bit for
SSP pads
mx23 SSP pad registers do not contain voltage selection bit, so just remove it.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
---
board/olimex/mx23_olinuxino/spl_boot.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/board/olimex/mx23_olinuxino/spl_boot.c b/board/olimex/mx23_olinuxino/spl_boot.c
index 3755f29..6ba8c86 100644
--- a/board/olimex/mx23_olinuxino/spl_boot.c
+++ b/board/olimex/mx23_olinuxino/spl_boot.c
@@ -30,7 +30,7 @@
#include <asm/arch/sys_proto.h>
#define MUX_CONFIG_EMI (MXS_PAD_3V3 | MXS_PAD_12MA | MXS_PAD_PULLUP)
-#define MUX_CONFIG_SSP (MXS_PAD_3V3 | MXS_PAD_8MA | MXS_PAD_PULLUP)
+#define MUX_CONFIG_SSP (MXS_PAD_8MA | MXS_PAD_PULLUP)
const iomux_cfg_t iomux_setup[] = {
/* DUART */
--
1.8.2.2

37
alarm/uboot-olinuxino/0012-mxs-Explain-why-some-mx23-DDR-registers-are-not-conf.patch
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@ -1,37 +0,0 @@
From 00e0b98f95698b734a037abe2d3007dbc730c20e Mon Sep 17 00:00:00 2001
From: Fabio Estevam <fabio.estevam@freescale.com>
Date: Sun, 5 May 2013 16:11:59 +0000
Subject: [PATCH 12/15] mxs: Explain why some mx23 DDR registers are not
configured
Put an explanation in the source code as to why some DDR registers do not
need to be configured.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
---
arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c b/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c
index 4ed197b..3902406 100644
--- a/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c
+++ b/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c
@@ -127,6 +127,15 @@ static void initialize_dram_values(void)
mxs_adjust_memory_params(dram_vals);
+ /*
+ * HW_DRAM_CTL27, HW_DRAM_CTL28 and HW_DRAM_CTL35 are not initialized as
+ * per FSL bootlets code.
+ *
+ * mx23 Reference Manual marks HW_DRAM_CTL27 and HW_DRAM_CTL28 as
+ * "reserved".
+ * HW_DRAM_CTL8 is setup as the last element.
+ * So skip the initialization of these HW_DRAM_CTL registers.
+ */
for (i = 0; i < ARRAY_SIZE(dram_vals); i++) {
if (i == 8 || i == 27 || i == 28 || i == 35)
continue;
--
1.8.2.2

159
alarm/uboot-olinuxino/0013-arm-mx23-Fix-VDDMEM-misconfiguration.patch
View file

@ -1,159 +0,0 @@
From 482f9fbbf7d38ab3f49e8d560d927b6985f7f23f Mon Sep 17 00:00:00 2001
From: Marek Vasut <marex@denx.de>
Date: Sun, 28 Apr 2013 14:17:45 +0000
Subject: [PATCH 13/15] arm: mx23: Fix VDDMEM misconfiguration
The VDDMEM ramped up in very weird way as it was horribly misconfigured.
Instead of setting up VDDMEM in one swipe, let it rise slowly the same
way as VDDD and VDDA in spl_power_init.c and then only clear ILIMIT before
memory gets inited. This makes sure the VDDMEM rises sanely, not jumps up
and down as it did till now.
The VDDMEM prior to this change did this:
2V0____ .--------2V5
| `--'
0V____|
The VDDMEM now does this:
2V0_____,-----------2V5
/
0V__|
Moreover, VDDIO on MX23 uses 25mV steps while MX28 uses 50mV steps,
fix this difference too.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Otavio Salvador <otavio@ossystems.com.br>
Cc: Stefano Babic <sbabic@denx.de>
---
arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c | 12 ++-----
arch/arm/cpu/arm926ejs/mxs/spl_power_init.c | 50 +++++++++++++++++++++++------
2 files changed, 42 insertions(+), 20 deletions(-)
diff --git a/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c b/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c
index 3902406..07db279 100644
--- a/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c
+++ b/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c
@@ -256,17 +256,9 @@ static void mx23_mem_setup_vddmem(void)
struct mxs_power_regs *power_regs =
(struct mxs_power_regs *)MXS_POWER_BASE;
- writel((0x10 << POWER_VDDMEMCTRL_TRG_OFFSET) |
- POWER_VDDMEMCTRL_ENABLE_ILIMIT |
- POWER_VDDMEMCTRL_ENABLE_LINREG |
- POWER_VDDMEMCTRL_PULLDOWN_ACTIVE,
- &power_regs->hw_power_vddmemctrl);
+ clrbits_le32(&power_regs->hw_power_vddmemctrl,
+ POWER_VDDMEMCTRL_ENABLE_ILIMIT);
- early_delay(10000);
-
- writel((0x10 << POWER_VDDMEMCTRL_TRG_OFFSET) |
- POWER_VDDMEMCTRL_ENABLE_LINREG,
- &power_regs->hw_power_vddmemctrl);
}
static void mx23_mem_init(void)
diff --git a/arch/arm/cpu/arm926ejs/mxs/spl_power_init.c b/arch/arm/cpu/arm926ejs/mxs/spl_power_init.c
index 287c698..21cac7b 100644
--- a/arch/arm/cpu/arm926ejs/mxs/spl_power_init.c
+++ b/arch/arm/cpu/arm926ejs/mxs/spl_power_init.c
@@ -687,6 +687,12 @@ static void mxs_power_configure_power_source(void)
mxs_init_batt_bo();
mxs_switch_vddd_to_dcdc_source();
+
+#ifdef CONFIG_MX23
+ /* Fire up the VDDMEM LinReg now that we're all set. */
+ writel(POWER_VDDMEMCTRL_ENABLE_LINREG | POWER_VDDMEMCTRL_ENABLE_ILIMIT,
+ &power_regs->hw_power_vddmemctrl);
+#endif
}
static void mxs_enable_output_rail_protection(void)
@@ -781,7 +787,11 @@ struct mxs_vddx_cfg {
static const struct mxs_vddx_cfg mxs_vddio_cfg = {
.reg = &(((struct mxs_power_regs *)MXS_POWER_BASE)->
hw_power_vddioctrl),
+#if defined(CONFIG_MX23)
+ .step_mV = 25,
+#else
.step_mV = 50,
+#endif
.lowest_mV = 2800,
.powered_by_linreg = mxs_get_vddio_power_source_off,
.trg_mask = POWER_VDDIOCTRL_TRG_MASK,
@@ -804,6 +814,21 @@ static const struct mxs_vddx_cfg mxs_vddd_cfg = {
.bo_offset_offset = POWER_VDDDCTRL_BO_OFFSET_OFFSET,
};
+#ifdef CONFIG_MX23
+static const struct mxs_vddx_cfg mxs_vddmem_cfg = {
+ .reg = &(((struct mxs_power_regs *)MXS_POWER_BASE)->
+ hw_power_vddmemctrl),
+ .step_mV = 50,
+ .lowest_mV = 1700,
+ .powered_by_linreg = NULL,
+ .trg_mask = POWER_VDDMEMCTRL_TRG_MASK,
+ .bo_irq = 0,
+ .bo_enirq = 0,
+ .bo_offset_mask = 0,
+ .bo_offset_offset = 0,
+};
+#endif
+
static void mxs_power_set_vddx(const struct mxs_vddx_cfg *cfg,
uint32_t new_target, uint32_t new_brownout)
{
@@ -821,9 +846,10 @@ static void mxs_power_set_vddx(const struct mxs_vddx_cfg *cfg,
cur_target += cfg->lowest_mV;
adjust_up = new_target > cur_target;
- powered_by_linreg = cfg->powered_by_linreg();
+ if (cfg->powered_by_linreg)
+ powered_by_linreg = cfg->powered_by_linreg();
- if (adjust_up) {
+ if (adjust_up && cfg->bo_irq) {
if (powered_by_linreg) {
bo_int = readl(cfg->reg);
clrbits_le32(cfg->reg, cfg->bo_enirq);
@@ -864,14 +890,16 @@ static void mxs_power_set_vddx(const struct mxs_vddx_cfg *cfg,
cur_target += cfg->lowest_mV;
} while (new_target > cur_target);
- if (adjust_up && powered_by_linreg) {
- writel(cfg->bo_irq, &power_regs->hw_power_ctrl_clr);
- if (bo_int & cfg->bo_enirq)
- setbits_le32(cfg->reg, cfg->bo_enirq);
- }
+ if (cfg->bo_irq) {
+ if (adjust_up && powered_by_linreg) {
+ writel(cfg->bo_irq, &power_regs->hw_power_ctrl_clr);
+ if (bo_int & cfg->bo_enirq)
+ setbits_le32(cfg->reg, cfg->bo_enirq);
+ }
- clrsetbits_le32(cfg->reg, cfg->bo_offset_mask,
- new_brownout << cfg->bo_offset_offset);
+ clrsetbits_le32(cfg->reg, cfg->bo_offset_mask,
+ new_brownout << cfg->bo_offset_offset);
+ }
}
static void mxs_setup_batt_detect(void)
@@ -910,7 +938,9 @@ void mxs_power_init(void)
mxs_power_set_vddx(&mxs_vddio_cfg, 3300, 3150);
mxs_power_set_vddx(&mxs_vddd_cfg, 1500, 1000);
-
+#ifdef CONFIG_MX23
+ mxs_power_set_vddx(&mxs_vddmem_cfg, 2500, 1700);
+#endif
writel(POWER_CTRL_VDDD_BO_IRQ | POWER_CTRL_VDDA_BO_IRQ |
POWER_CTRL_VDDIO_BO_IRQ | POWER_CTRL_VDD5V_DROOP_IRQ |
POWER_CTRL_VBUS_VALID_IRQ | POWER_CTRL_BATT_BO_IRQ |
--
1.8.2.2

118
alarm/uboot-olinuxino/0014-arm-mxs-Preprocess-u-boot.bd-so-they-contain-full-pa.patch
View file

@ -1,118 +0,0 @@
From 3bf93c115842345434289c629efe6402149449e6 Mon Sep 17 00:00:00 2001
From: Marek Vasut <marex@denx.de>
Date: Sun, 28 Apr 2013 14:18:49 +0000
Subject: [PATCH 14/15] arm: mxs: Preprocess u-boot.bd so they contain full
path
The u-boot-imx23.bd and u-boot-imx28.bd need to be preprocessed, otherwise
they have issues with out-of-tree build where elftosb tool couldn't sometimes
find the u-boot.bin and spl/u-boot-spl.bin .
Preprocess these .bd files with sed and insert full path to u-boot.bin and
spl/u-boot-spl.bin to prevent this issue. Moreover, to avoid adding more
churn into main Makefile, move all this preprocessing and u-boot.sb generation
into CPU directory instead.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
Acked-by: Otavio Salvador <otavio@ossystems.com.br>
---
.gitignore | 1 +
Makefile | 7 ++-----
arch/arm/cpu/arm926ejs/mxs/Makefile | 10 ++++++++++
arch/arm/cpu/arm926ejs/mxs/u-boot-imx23.bd | 4 ++--
arch/arm/cpu/arm926ejs/mxs/u-boot-imx28.bd | 4 ++--
5 files changed, 17 insertions(+), 9 deletions(-)
diff --git a/.gitignore b/.gitignore
index ed21203..c79d577 100644
--- a/.gitignore
+++ b/.gitignore
@@ -46,6 +46,7 @@
/u-boot.ais
/u-boot.dtb
/u-boot.sb
+/u-boot.bd
/u-boot.geany
#
diff --git a/Makefile b/Makefile
index 3fd6d15..1874456 100644
--- a/Makefile
+++ b/Makefile
@@ -512,13 +512,9 @@ $(obj)u-boot.ais: $(obj)spl/u-boot-spl.bin $(obj)u-boot.img
cat $(obj)spl/u-boot-spl-pad.ais $(obj)u-boot.img > \
$(obj)u-boot.ais
-# Specify the target for use in elftosb call
-ELFTOSB_TARGET-$(CONFIG_MX23) = imx23
-ELFTOSB_TARGET-$(CONFIG_MX28) = imx28
$(obj)u-boot.sb: $(obj)u-boot.bin $(obj)spl/u-boot-spl.bin
- elftosb -zf $(ELFTOSB_TARGET-y) -c $(TOPDIR)/$(CPUDIR)/$(SOC)/u-boot-$(ELFTOSB_TARGET-y).bd \
- -o $(obj)u-boot.sb
+ $(MAKE) -C $(SRCTREE)/$(CPUDIR)/$(SOC)/ $(OBJTREE)/u-boot.sb
# On x600 (SPEAr600) U-Boot is appended to U-Boot SPL.
# Both images are created using mkimage (crc etc), so that the ROM
@@ -849,6 +845,7 @@ clobber: tidy
@rm -f $(obj)u-boot.ais
@rm -f $(obj)u-boot.dtb
@rm -f $(obj)u-boot.sb
+ @rm -f $(obj)u-boot.bd
@rm -f $(obj)u-boot.spr
@rm -f $(obj)nand_spl/{u-boot.{lds,lst},System.map}
@rm -f $(obj)nand_spl/{u-boot-nand_spl.lds,u-boot-spl,u-boot-spl.map}
diff --git a/arch/arm/cpu/arm926ejs/mxs/Makefile b/arch/arm/cpu/arm926ejs/mxs/Makefile
index eeecf89..038c1c1 100644
--- a/arch/arm/cpu/arm926ejs/mxs/Makefile
+++ b/arch/arm/cpu/arm926ejs/mxs/Makefile
@@ -40,6 +40,16 @@ all: $(obj).depend $(LIB)
$(LIB): $(OBJS)
$(call cmd_link_o_target, $(OBJS))
+# Specify the target for use in elftosb call
+ELFTOSB_TARGET-$(CONFIG_MX23) = imx23
+ELFTOSB_TARGET-$(CONFIG_MX28) = imx28
+
+$(OBJTREE)/u-boot.bd: $(SRCTREE)/$(CPUDIR)/$(SOC)/u-boot-$(ELFTOSB_TARGET-y).bd
+ sed "s@OBJTREE@$(OBJTREE)@g" $^ > $@
+
+$(OBJTREE)/u-boot.sb: $(OBJTREE)/u-boot.bin $(OBJTREE)/spl/u-boot-spl.bin $(OBJTREE)/u-boot.bd
+ elftosb -zf $(ELFTOSB_TARGET-y) -c $(OBJTREE)/u-boot.bd -o $(OBJTREE)/u-boot.sb
+
#########################################################################
# defines $(obj).depend target
diff --git a/arch/arm/cpu/arm926ejs/mxs/u-boot-imx23.bd b/arch/arm/cpu/arm926ejs/mxs/u-boot-imx23.bd
index 3a51879..8b6c30e 100644
--- a/arch/arm/cpu/arm926ejs/mxs/u-boot-imx23.bd
+++ b/arch/arm/cpu/arm926ejs/mxs/u-boot-imx23.bd
@@ -4,8 +4,8 @@ options {
}
sources {
- u_boot_spl="spl/u-boot-spl.bin";
- u_boot="u-boot.bin";
+ u_boot_spl="OBJTREE/spl/u-boot-spl.bin";
+ u_boot="OBJTREE/u-boot.bin";
}
section (0) {
diff --git a/arch/arm/cpu/arm926ejs/mxs/u-boot-imx28.bd b/arch/arm/cpu/arm926ejs/mxs/u-boot-imx28.bd
index c60615a..a5fa648 100644
--- a/arch/arm/cpu/arm926ejs/mxs/u-boot-imx28.bd
+++ b/arch/arm/cpu/arm926ejs/mxs/u-boot-imx28.bd
@@ -1,6 +1,6 @@
sources {
- u_boot_spl="spl/u-boot-spl.bin";
- u_boot="u-boot.bin";
+ u_boot_spl="OBJTREE/spl/u-boot-spl.bin";
+ u_boot="OBJTREE/u-boot.bin";
}
section (0) {
--
1.8.2.2

69
alarm/uboot-olinuxino/0015-Add-generic-and-ext4-commands-adjust-boot-environmen.patch
View file

@ -1,69 +0,0 @@
From dbc01d9b0e5d7bee005ecda08f08c7f5fb12012c Mon Sep 17 00:00:00 2001
From: Kiril Zyapkov <kiril.zyapkov@gmail.com>
Date: Tue, 7 May 2013 02:57:58 +0300
Subject: [PATCH 15/15] Add generic and ext4 commands, adjust boot environment
---
include/configs/mx23_olinuxino.h | 20 +++++++++++---------
1 file changed, 11 insertions(+), 9 deletions(-)
diff --git a/include/configs/mx23_olinuxino.h b/include/configs/mx23_olinuxino.h
index 38ad7f4..0ca4941 100644
--- a/include/configs/mx23_olinuxino.h
+++ b/include/configs/mx23_olinuxino.h
@@ -57,7 +57,9 @@
#define CONFIG_CMD_CACHE
#define CONFIG_CMD_DHCP
#define CONFIG_CMD_EXT2
+#define CONFIG_CMD_EXT4
#define CONFIG_CMD_FAT
+#define CONFIG_CMD_FS_GENERIC
#define CONFIG_CMD_GPIO
#define CONFIG_CMD_LED
#define CONFIG_CMD_MMC
@@ -164,8 +166,8 @@
*/
#define CONFIG_CMDLINE_TAG
#define CONFIG_SETUP_MEMORY_TAGS
-#define CONFIG_BOOTDELAY 3
-#define CONFIG_BOOTFILE "uImage"
+#define CONFIG_BOOTDELAY 1
+#define CONFIG_BOOTFILE "/boot/uImage"
#define CONFIG_LOADADDR 0x42000000
#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
#define CONFIG_OF_LIBFDT
@@ -194,24 +196,24 @@
"mmc write ${loadaddr} 0x800 ${fw_sz} ; " \
"fi ; " \
"fi\0" \
- "script=boot.scr\0" \
- "uimage=uImage\0" \
+ "script=/boot/boot.scr\0" \
+ "uimage=/boot/uImage\0" \
"console=ttyAMA0\0" \
- "fdt_file=imx23-olinuxino.dtb\0" \
+ "fdt_file=/boot/imx23-olinuxino.dtb\0" \
"fdt_addr=0x41000000\0" \
"boot_fdt=try\0" \
"ip_dyn=yes\0" \
"mmcdev=0\0" \
"mmcpart=2\0" \
- "mmcroot=/dev/mmcblk0p3 rw rootwait\0" \
+ "mmcroot=/dev/mmcblk0p2 rw rootwait\0" \
"mmcargs=setenv bootargs console=${console},${baudrate} " \
"root=${mmcroot}\0" \
"loadbootscript=" \
- "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
+ "load mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
"bootscript=echo Running bootscript from mmc ...; " \
"source\0" \
- "loaduimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${uimage}\0" \
- "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
+ "loaduimage=load mmc ${mmcdev}:${mmcpart} ${loadaddr} ${uimage}\0" \
+ "loadfdt=load mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
"mmcboot=echo Booting from mmc ...; " \
"run mmcargs; " \
"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
--
1.8.2.2

11
alarm/uboot-olinuxino/0016-mx23_olinuxino-Add-bootz-command.patch
View file

@ -1,11 +0,0 @@
diff -urN a/include/configs/mx23_olinuxino.h b/include/configs/mx23_olinuxino.h
--- a/include/configs/mx23_olinuxino.h 2013-07-19 13:28:55.017258253 -0600
+++ b/include/configs/mx23_olinuxino.h 2013-07-19 13:32:35.191233599 -0600
@@ -65,6 +65,7 @@
#define CONFIG_CMD_MMC
#define CONFIG_CMD_NET
#define CONFIG_CMD_USB
+#define CONFIG_CMD_BOOTZ
/*
* Memory configurations

74
alarm/uboot-olinuxino/PKGBUILD
View file

@ -1,84 +1,46 @@
# U-Boot for i.MX233-OLinuXino
# Maintainer: Kevin Mihelich <kevin@archlinuxarm.org>
# Contributor: Kiril Zyapkov <kiril.zyapkov@gmail.com>
# U-Boot for i.MX233-OLinuXino
buildarch=2
pkgname=uboot-olinuxino
pkgdesc="U-Boot for i.MX233-OLinuXino"
pkgver=2013.04
pkgrel=2
pkgver=2013.10
pkgrel=1
arch=('arm')
license=('GPL')
depends=('coreutils')
makedepends=('git' 'elftosb')
makedepends=('elftosb')
install=$pkgname.install
options=('!strip')
source=("ftp://ftp.denx.de/pub/u-boot/u-boot-${pkgver}.tar.bz2"
'0001-imx-Move-some-header-files-from-arch-mxs-to-imx-comm.patch'
'0002-mxs-mxsboot-Move-sdcard-BCB-header-to-4-sectors-offs.patch'
'0003-mx23-Put-back-RAM-voltage-level-to-its-original-valu.patch'
'0004-mx23-Fix-pad-voltage-selection-bit.patch'
'0005-mx23_olinuxino-Fix-DDR-pin-iomux-settings.patch'
'0006-mxs-spl_mem_init-Fix-comment-about-start-bit.patch'
'0007-mxs-spl_mem_init-Remove-erroneous-DDR-setting.patch'
'0008-mxs-spl_mem_init-Skip-the-initialization-of-some-DRA.patch'
'0009-mxs-spl_mem_init-Change-EMI-port-priority.patch'
'0010-mx23-Operate-DDR-voltage-supply-at-2.5V.patch'
'0011-mx23_olinuxino-Do-not-set-voltage-selection-bit-for-.patch'
'0012-mxs-Explain-why-some-mx23-DDR-registers-are-not-conf.patch'
'0013-arm-mx23-Fix-VDDMEM-misconfiguration.patch'
'0014-arm-mxs-Preprocess-u-boot.bd-so-they-contain-full-pa.patch'
'0015-Add-generic-and-ext4-commands-adjust-boot-environmen.patch'
'0016-mx23_olinuxino-Add-bootz-command.patch')
md5sums=('21bf962d69938ed4ed783b792b2b074e'
'93746f9682fb56a3cbbbcc9e6389bc8a'
'29412096225ca8eed21f205d0a9dfe14'
'7fad77467166d87ce875c9d4eebfcf35'
'cabb9ff2cf4cbeec0aa1b161be242233'
'7aa7399910fe9670f8eb673f2615d6ab'
'e3a4d5678ff726dcd9fe78c23716f95c'
'cd6c109e1cc19986993a626e45e49d08'
'a3e9a69ee26f21c03c93e7f7c6fb432e'
'cca5cb6d7684c46bcdcdb3352dc1bc20'
'be99aba7a08edd410c1c0d64115e6b58'
'd1a42119f38d6dd98b3bc5a576f4697b'
'38df690f2b10dda11b771a4753434fe5'
'5df3f02303f158bd0bf449c2e2ae86fc'
'a5995f5be9ca0f5956ebc4d95559da21'
'cb1d955bb42c58d0ef683f7e74178095'
'ae8def5b8d1916f71ba632934cf83c26')
"https://raw.github.com/eewiki/u-boot-patches/master/v${pkgver}/0001-mx23_olinuxino-uEnv.txt-bootz-n-fixes.patch"
'alarm.patch'
'uEnv.txt')
md5sums=('a076a044b64371edc52f7e562b13f6b2'
'71b2ee3b801b0265e5a316b9fc8d5f45'
'6d183eca7b72b51c207e7fad23459659'
'239b6223bbfe21e0cad629723a3abc2d')
prepare() {
cd "$srcdir/u-boot-${pkgver}"
patch -Np1 -i $srcdir/0001-imx-Move-some-header-files-from-arch-mxs-to-imx-comm.patch
patch -Np1 -i $srcdir/0002-mxs-mxsboot-Move-sdcard-BCB-header-to-4-sectors-offs.patch
patch -Np1 -i $srcdir/0003-mx23-Put-back-RAM-voltage-level-to-its-original-valu.patch
patch -Np1 -i $srcdir/0004-mx23-Fix-pad-voltage-selection-bit.patch
patch -Np1 -i $srcdir/0005-mx23_olinuxino-Fix-DDR-pin-iomux-settings.patch
patch -Np1 -i $srcdir/0006-mxs-spl_mem_init-Fix-comment-about-start-bit.patch
patch -Np1 -i $srcdir/0007-mxs-spl_mem_init-Remove-erroneous-DDR-setting.patch
patch -Np1 -i $srcdir/0008-mxs-spl_mem_init-Skip-the-initialization-of-some-DRA.patch
patch -Np1 -i $srcdir/0009-mxs-spl_mem_init-Change-EMI-port-priority.patch
patch -Np1 -i $srcdir/0010-mx23-Operate-DDR-voltage-supply-at-2.5V.patch
patch -Np1 -i $srcdir/0011-mx23_olinuxino-Do-not-set-voltage-selection-bit-for-.patch
patch -Np1 -i $srcdir/0012-mxs-Explain-why-some-mx23-DDR-registers-are-not-conf.patch
patch -Np1 -i $srcdir/0013-arm-mx23-Fix-VDDMEM-misconfiguration.patch
patch -Np1 -i $srcdir/0014-arm-mxs-Preprocess-u-boot.bd-so-they-contain-full-pa.patch
patch -Np1 -i $srcdir/0015-Add-generic-and-ext4-commands-adjust-boot-environmen.patch
patch -Np1 -i $srcdir/0016-mx23_olinuxino-Add-bootz-command.patch
patch -Np1 -i ../0001-mx23_olinuxino-uEnv.txt-bootz-n-fixes.patch
patch -Np1 -i ../alarm.patch
}
build() {
cd "$srcdir/u-boot-${pkgver}"
unset LDFLAGS CFLAGS CXXFLAGS
make distclean
make mx23_olinuxino_config
make u-boot.sb
}
package() {
mkdir -p "${pkgdir}/opt/uboot-olinuxino"
cp "$srcdir/u-boot-$pkgver/u-boot.sb" "${pkgdir}/opt/uboot-olinuxino"
mkdir -p "${pkgdir}/boot"
cp "${srcdir}/u-boot-${pkgver}"/u-boot.sb "${srcdir}"/uEnv.txt "${pkgdir}/boot"
}

6
alarm/uboot-olinuxino/uboot-olinuxino.install
View file

@ -1,12 +1,12 @@
flash_uboot() {
echo "A new U-Boot version needs to be flashed onto /dev/mmcblk0p1."
echo "Do this now? [y|N]"
echo "Do you want to do this now? [y|N]"
read -r shouldwe
if [[ $shouldwe =~ ^([yY][eE][sS]|[yY])$ ]]; then
dd if=/opt/uboot-olinuxino/u-boot.sb of=/dev/mmcblk0p1 bs=512 seek=4
dd if=/boot/u-boot.sb of=/dev/mmcblk0p1 bs=512 seek=4
else
echo "You can do this later by running:"
echo "# dd if=/opt/uboot-olinuxino/u-boot.sb of=/dev/mmcblk0p1 bs=512 seek=4"
echo "# dd if=/boot/u-boot.sb of=/dev/mmcblk0p1 bs=512 seek=4"
fi
}