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extra/llvm to 3.9.1-2
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Kevin Mihelich
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commit
3bad2f72b4
2 changed files with 146 additions and 1 deletions
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From 25e2616626caafb896517e18cd8aa724fba2b200 Mon Sep 17 00:00:00 2001
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From: Tom Stellard <thomas.stellard@amd.com>
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Date: Tue, 29 Nov 2016 03:41:28 +0000
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Subject: [PATCH] Merging r280589:
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------------------------------------------------------------------------
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r280589 | nhaehnle | 2016-09-03 05:26:32 -0700 (Sat, 03 Sep 2016) | 19 lines
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AMDGPU: Fix an interaction between WQM and polygon stippling
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Summary:
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This fixes a rare bug in polygon stippling with non-monolithic pixel shaders.
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The underlying problem is as follows: the prolog part contains the polygon
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stippling sequence, i.e. a kill. The main part then enables WQM based on the
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_reduced_ exec mask, effectively undoing most of the polygon stippling.
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Since we cannot know whether polygon stippling will be used, the main part
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of a non-monolithic shader must always return to exact mode to fix this
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problem.
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Reviewers: arsenm, tstellarAMD, mareko
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Subscribers: arsenm, llvm-commits, kzhuravl
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Differential Revision: https://reviews.llvm.org/D23131
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------------------------------------------------------------------------
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_39@288105 91177308-0d34-0410-b5e6-96231b3b80d8
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---
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lib/Target/AMDGPU/SIInstructions.td | 1 +
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lib/Target/AMDGPU/SIWholeQuadMode.cpp | 7 -----
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test/CodeGen/AMDGPU/wqm.ll | 49 ++++++++++++++++++++++++++++++++---
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3 files changed, 46 insertions(+), 11 deletions(-)
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diff --git a/lib/Target/AMDGPU/SIInstructions.td b/lib/Target/AMDGPU/SIInstructions.td
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index 18b7d5d..dde5f2f 100644
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--- a/lib/Target/AMDGPU/SIInstructions.td
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+++ b/lib/Target/AMDGPU/SIInstructions.td
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@@ -2029,6 +2029,7 @@ def SI_RETURN : PseudoInstSI <
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let hasSideEffects = 1;
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let SALU = 1;
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let hasNoSchedulingInfo = 1;
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+ let DisableWQM = 1;
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}
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let Uses = [EXEC], Defs = [EXEC, VCC, M0],
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diff --git a/lib/Target/AMDGPU/SIWholeQuadMode.cpp b/lib/Target/AMDGPU/SIWholeQuadMode.cpp
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index b200c15..1534d58 100644
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--- a/lib/Target/AMDGPU/SIWholeQuadMode.cpp
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+++ b/lib/Target/AMDGPU/SIWholeQuadMode.cpp
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@@ -219,13 +219,6 @@ char SIWholeQuadMode::scanInstructions(MachineFunction &MF,
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markInstruction(MI, Flags, Worklist);
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GlobalFlags |= Flags;
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}
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-
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- if (WQMOutputs && MBB.succ_empty()) {
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- // This is a prolog shader. Make sure we go back to exact mode at the end.
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- Blocks[&MBB].OutNeeds = StateExact;
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- Worklist.push_back(&MBB);
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- GlobalFlags |= StateExact;
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- }
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}
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return GlobalFlags;
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diff --git a/test/CodeGen/AMDGPU/wqm.ll b/test/CodeGen/AMDGPU/wqm.ll
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index 809a7ba..41e4264 100644
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--- a/test/CodeGen/AMDGPU/wqm.ll
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+++ b/test/CodeGen/AMDGPU/wqm.ll
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@@ -17,17 +17,18 @@ main_body:
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;CHECK-LABEL: {{^}}test2:
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;CHECK-NEXT: ; %main_body
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;CHECK-NEXT: s_wqm_b64 exec, exec
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-;CHECK: image_sample
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;CHECK-NOT: exec
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-;CHECK: _load_dword v0,
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-define amdgpu_ps float @test2(<8 x i32> inreg %rsrc, <4 x i32> inreg %sampler, float addrspace(1)* inreg %ptr, <4 x i32> %c) {
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+define amdgpu_ps void @test2(<8 x i32> inreg %rsrc, <4 x i32> inreg %sampler, float addrspace(1)* inreg %ptr, <4 x i32> %c) {
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main_body:
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%c.1 = call <4 x float> @llvm.SI.image.sample.v4i32(<4 x i32> %c, <8 x i32> %rsrc, <4 x i32> %sampler, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
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%c.2 = bitcast <4 x float> %c.1 to <4 x i32>
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%c.3 = extractelement <4 x i32> %c.2, i32 0
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%gep = getelementptr float, float addrspace(1)* %ptr, i32 %c.3
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%data = load float, float addrspace(1)* %gep
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- ret float %data
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+
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+ call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %data, float undef, float undef, float undef)
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+
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+ ret void
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}
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; ... but disabled for stores (and, in this simple case, not re-enabled).
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@@ -414,6 +415,46 @@ entry:
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ret void
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}
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+; Must return to exact at the end of a non-void returning shader,
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+; otherwise the EXEC mask exported by the epilog will be wrong. This is true
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+; even if the shader has no kills, because a kill could have happened in a
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+; previous shader fragment.
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+;
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+; CHECK-LABEL: {{^}}test_nonvoid_return:
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+; CHECK: s_mov_b64 [[LIVE:s\[[0-9]+:[0-9]+\]]], exec
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+; CHECK: s_wqm_b64 exec, exec
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+;
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+; CHECK: s_and_b64 exec, exec, [[LIVE]]
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+; CHECK-NOT: exec
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+define amdgpu_ps <4 x float> @test_nonvoid_return() nounwind {
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+ %tex = call <4 x float> @llvm.SI.image.sample.v4i32(<4 x i32> undef, <8 x i32> undef, <4 x i32> undef, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
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+ %tex.i = bitcast <4 x float> %tex to <4 x i32>
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+ %dtex = call <4 x float> @llvm.SI.image.sample.v4i32(<4 x i32> %tex.i, <8 x i32> undef, <4 x i32> undef, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
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+ ret <4 x float> %dtex
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+}
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+
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+; CHECK-LABEL: {{^}}test_nonvoid_return_unreachable:
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+; CHECK: s_mov_b64 [[LIVE:s\[[0-9]+:[0-9]+\]]], exec
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+; CHECK: s_wqm_b64 exec, exec
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+;
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+; CHECK: s_and_b64 exec, exec, [[LIVE]]
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+; CHECK-NOT: exec
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+define amdgpu_ps <4 x float> @test_nonvoid_return_unreachable(i32 inreg %c) nounwind {
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+entry:
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+ %tex = call <4 x float> @llvm.SI.image.sample.v4i32(<4 x i32> undef, <8 x i32> undef, <4 x i32> undef, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
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+ %tex.i = bitcast <4 x float> %tex to <4 x i32>
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+ %dtex = call <4 x float> @llvm.SI.image.sample.v4i32(<4 x i32> %tex.i, <8 x i32> undef, <4 x i32> undef, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
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+
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+ %cc = icmp sgt i32 %c, 0
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+ br i1 %cc, label %if, label %else
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+
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+if:
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+ store volatile <4 x float> %dtex, <4 x float>* undef
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+ unreachable
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+
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+else:
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+ ret <4 x float> %dtex
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+}
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declare void @llvm.amdgcn.image.store.v4i32(<4 x float>, <4 x i32>, <8 x i32>, i32, i1, i1, i1, i1) #1
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declare void @llvm.amdgcn.buffer.store.f32(float, <4 x i32>, i32, i32, i1, i1) #1
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@ -17,7 +17,7 @@ highmem=1
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pkgname=('llvm' 'llvm-libs' 'llvm-ocaml' 'lldb' 'clang' 'clang-tools-extra')
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pkgver=3.9.1
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pkgrel=1
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pkgrel=2
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_ocaml_ver=4.04.0
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arch=('i686' 'x86_64')
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url="http://llvm.org/"
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@ -32,6 +32,7 @@ source=(http://llvm.org/releases/$pkgver/llvm-$pkgver.src.tar.xz{,.sig}
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http://llvm.org/releases/$pkgver/clang-tools-extra-$pkgver.src.tar.xz{,.sig}
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http://llvm.org/releases/$pkgver/compiler-rt-$pkgver.src.tar.xz{,.sig}
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http://llvm.org/releases/$pkgver/lldb-$pkgver.src.tar.xz{,.sig}
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AMDGPU-Fix-an-interaction-between-WQM-and-polygon-stippling.patch
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msan-prevent-initialization-failure-with-newer-glibc.patch
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llvm-Config-llvm-config.h)
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sha256sums=('1fd90354b9cf19232e8f168faf2220e79be555df3aa743242700879e8fd329ee'
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@ -44,6 +45,7 @@ sha256sums=('1fd90354b9cf19232e8f168faf2220e79be555df3aa743242700879e8fd329ee'
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'SKIP'
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'7e3311b2a1f80f4d3426e09f9459d079cab4d698258667e50a46dccbaaa460fc'
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'SKIP'
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'adadc41090ab0eb33fe4449a0ea3f02b15d03f186262dd89576848a2c66d0ce6'
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'8e4f194c2283b91644a7fff43bc4e58c36b5507f2a4d90b72f275c0bd7511c20'
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'597dc5968c695bbdbb0eac9e8eb5117fcd2773bc91edf5ec103ecffffab8bc48')
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validpgpkeys=('B6C8F98282B944E3B0D5C2530FC3042E345AD05D'
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@ -62,6 +64,9 @@ prepare() {
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mv "$srcdir/lldb-$pkgver.src" tools/lldb
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# https://bugs.freedesktop.org/show_bug.cgi?id=99078
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patch -Rp1 -i ../AMDGPU-Fix-an-interaction-between-WQM-and-polygon-stippling.patch
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# https://reviews.llvm.org/D24736
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patch -Np0 -d projects/compiler-rt <../msan-prevent-initialization-failure-with-newer-glibc.patch
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