diff --git a/core/linux-espressobin/0001-ARM64-dts-marvell-armada37xx-Enable-memory-mapped-GI.patch b/core/linux-espressobin/0001-ARM64-dts-marvell-armada37xx-Enable-memory-mapped-GI.patch
index da93fa9fa..5d279d246 100644
--- a/core/linux-espressobin/0001-ARM64-dts-marvell-armada37xx-Enable-memory-mapped-GI.patch
+++ b/core/linux-espressobin/0001-ARM64-dts-marvell-armada37xx-Enable-memory-mapped-GI.patch
@@ -1,7 +1,7 @@
-From 8cb51b7b1fce249f4a064e75f1fb8681906657fc Mon Sep 17 00:00:00 2001
+From 37b8857ed9f5aa927b670a64157493019e2828ce Mon Sep 17 00:00:00 2001
 From: Marc Zyngier <Marc.Zyngier@arm.com>
 Date: Sat, 1 Jul 2017 15:16:35 +0100
-Subject: [PATCH 01/12] ARM64: dts: marvell: armada37xx: Enable memory-mapped
+Subject: [PATCH 01/11] ARM64: dts: marvell: armada37xx: Enable memory-mapped
  GIC CPU interface
 
 The Cortex-A53s that power the Armada-37xx SoCs are equipped with
@@ -34,5 +34,5 @@ index a92ac63addf0..b6f1e7a5e5ec 100644
  			};
  		};
 -- 
-2.14.1
+2.14.2
 
diff --git a/core/linux-espressobin/0002-ARM64-dts-marvell-armada37xx-Wire-PMUv3.patch b/core/linux-espressobin/0002-ARM64-dts-marvell-armada37xx-Wire-PMUv3.patch
index e0dd02366..19d35bf7e 100644
--- a/core/linux-espressobin/0002-ARM64-dts-marvell-armada37xx-Wire-PMUv3.patch
+++ b/core/linux-espressobin/0002-ARM64-dts-marvell-armada37xx-Wire-PMUv3.patch
@@ -1,7 +1,7 @@
-From 291969f6c3444515961a1d3f6f99c9323f599b04 Mon Sep 17 00:00:00 2001
+From 2a7e36d70c07c43844ce257ef75ae0b067d79271 Mon Sep 17 00:00:00 2001
 From: Marc Zyngier <Marc.Zyngier@arm.com>
 Date: Sat, 1 Jul 2017 15:16:36 +0100
-Subject: [PATCH 02/12] ARM64: dts: marvell: armada37xx: Wire PMUv3
+Subject: [PATCH 02/11] ARM64: dts: marvell: armada37xx: Wire PMUv3
 
 The Cortex-A53s that power the Armada-37xx SoCs are equipped with
 a PMUv3, just like most ARMv8 cores.
@@ -31,5 +31,5 @@ index b6f1e7a5e5ec..35307cd93db5 100644
  		compatible = "simple-bus";
  		#address-cells = <2>;
 -- 
-2.14.1
+2.14.2
 
diff --git a/core/linux-espressobin/0003-ARM64-dts-marvell-armada37xx-Enable-USB2-on-espresso.patch b/core/linux-espressobin/0003-ARM64-dts-marvell-armada37xx-Enable-USB2-on-espresso.patch
index b9e98972a..987a73719 100644
--- a/core/linux-espressobin/0003-ARM64-dts-marvell-armada37xx-Enable-USB2-on-espresso.patch
+++ b/core/linux-espressobin/0003-ARM64-dts-marvell-armada37xx-Enable-USB2-on-espresso.patch
@@ -1,7 +1,7 @@
-From 5b5e370b5903e65a3b8230c9182db13a5bd331fa Mon Sep 17 00:00:00 2001
+From 2c8b5fdf3c97112ffd18e9b5f4c0b83f1453a65f Mon Sep 17 00:00:00 2001
 From: Marc Zyngier <Marc.Zyngier@arm.com>
 Date: Sat, 1 Jul 2017 15:16:37 +0100
-Subject: [PATCH 03/12] ARM64: dts: marvell: armada37xx: Enable USB2 on
+Subject: [PATCH 03/11] ARM64: dts: marvell: armada37xx: Enable USB2 on
  espressobin
 
 The Espressobin SBC has a USB2 interface available on J8. Let's
@@ -29,5 +29,5 @@ index e3a136ed77b0..b1af3f988b29 100644
  	switch0: switch0@1 {
  		compatible = "marvell,mv88e6085";
 -- 
-2.14.1
+2.14.2
 
diff --git a/core/linux-espressobin/0004-ARM64-dts-marvell-armada-37xx-Enable-uSD-on-ESPRESSO.patch b/core/linux-espressobin/0004-ARM64-dts-marvell-armada-37xx-Enable-uSD-on-ESPRESSO.patch
index c05b0d798..1ec8830d7 100644
--- a/core/linux-espressobin/0004-ARM64-dts-marvell-armada-37xx-Enable-uSD-on-ESPRESSO.patch
+++ b/core/linux-espressobin/0004-ARM64-dts-marvell-armada-37xx-Enable-uSD-on-ESPRESSO.patch
@@ -1,7 +1,7 @@
-From 757e191a5e3ebb62f98f5c7d9151f3f90b7a4e2f Mon Sep 17 00:00:00 2001
+From 7fc5ce0037546e26ab7d4278398302fa2ef14f46 Mon Sep 17 00:00:00 2001
 From: Marcin Wojtas <mw@semihalf.com>
 Date: Fri, 21 Jul 2017 01:50:36 +0200
-Subject: [PATCH 04/12] ARM64: dts: marvell: armada-37xx: Enable uSD on
+Subject: [PATCH 04/11] ARM64: dts: marvell: armada-37xx: Enable uSD on
  ESPRESSObin
 
 The ESPRESSObin board exposes one of the SDHCI interfaces
@@ -67,5 +67,5 @@ index b1af3f988b29..2ce52ba74f73 100644
  &uart0 {
  	status = "okay";
 -- 
-2.14.1
+2.14.2
 
diff --git a/core/linux-espressobin/0005-arm64-dts-marvell-armada37xx-Add-eth0-alias.patch b/core/linux-espressobin/0005-arm64-dts-marvell-armada37xx-Add-eth0-alias.patch
index aa4e3733e..b979d18e0 100644
--- a/core/linux-espressobin/0005-arm64-dts-marvell-armada37xx-Add-eth0-alias.patch
+++ b/core/linux-espressobin/0005-arm64-dts-marvell-armada37xx-Add-eth0-alias.patch
@@ -1,7 +1,7 @@
-From 379313975431e6318d9994a873311ecfd82cee16 Mon Sep 17 00:00:00 2001
+From 11a20fb8c1b6e5d051c9ae4110fe25d8bc73837f Mon Sep 17 00:00:00 2001
 From: Kevin Mihelich <kevin@archlinuxarm.org>
 Date: Tue, 4 Jul 2017 19:25:28 -0600
-Subject: [PATCH 05/12] arm64: dts: marvell: armada37xx: Add eth0 alias
+Subject: [PATCH 05/11] arm64: dts: marvell: armada37xx: Add eth0 alias
 
 Signed-off-by: Kevin Mihelich <kevin@archlinuxarm.org>
 ---
@@ -21,5 +21,5 @@ index 35307cd93db5..d4133fbe47dc 100644
  	};
  
 -- 
-2.14.1
+2.14.2
 
diff --git a/core/linux-espressobin/0006-PCI-aardvark-fix-logic-in-PCI-configuration-read-wri.patch b/core/linux-espressobin/0006-PCI-aardvark-fix-logic-in-PCI-configuration-read-wri.patch
index 0b26b2498..047b027d7 100644
--- a/core/linux-espressobin/0006-PCI-aardvark-fix-logic-in-PCI-configuration-read-wri.patch
+++ b/core/linux-espressobin/0006-PCI-aardvark-fix-logic-in-PCI-configuration-read-wri.patch
@@ -1,7 +1,7 @@
-From 19f028017f93b19bd4142840a0714fc3b5c447a1 Mon Sep 17 00:00:00 2001
+From b0bb713160f73627f4404a680396f34f73984742 Mon Sep 17 00:00:00 2001
 From: Victor Gu <xigu@marvell.com>
 Date: Fri, 8 Sep 2017 11:53:42 +0200
-Subject: [PATCH 06/12] PCI: aardvark: fix logic in PCI configuration
+Subject: [PATCH 06/11] PCI: aardvark: fix logic in PCI configuration
  read/write functions
 
 The PCI configuration space read/write functions were special casing
@@ -25,7 +25,7 @@ Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
  1 file changed, 2 insertions(+), 2 deletions(-)
 
 diff --git a/drivers/pci/host/pci-aardvark.c b/drivers/pci/host/pci-aardvark.c
-index 5fb9b620ac78..582d75f864e3 100644
+index 20f1d048582f..0dbaadfe88e0 100644
 --- a/drivers/pci/host/pci-aardvark.c
 +++ b/drivers/pci/host/pci-aardvark.c
 @@ -441,7 +441,7 @@ static int advk_pcie_rd_conf(struct pci_bus *bus, u32 devfn,
@@ -47,5 +47,5 @@ index 5fb9b620ac78..582d75f864e3 100644
  
  	if (where % size)
 -- 
-2.14.1
+2.14.2
 
diff --git a/core/linux-espressobin/0007-PCI-aardvark-set-PIO_ADDR_LS-correctly-in-advk_pcie_.patch b/core/linux-espressobin/0007-PCI-aardvark-set-PIO_ADDR_LS-correctly-in-advk_pcie_.patch
index a401ce075..ca8b2ea8a 100644
--- a/core/linux-espressobin/0007-PCI-aardvark-set-PIO_ADDR_LS-correctly-in-advk_pcie_.patch
+++ b/core/linux-espressobin/0007-PCI-aardvark-set-PIO_ADDR_LS-correctly-in-advk_pcie_.patch
@@ -1,7 +1,7 @@
-From e692c4478048fdcc01c939f28e9801aebdd622d3 Mon Sep 17 00:00:00 2001
+From 2b744b7d8f4e578e74396cccef5e00963a7613d1 Mon Sep 17 00:00:00 2001
 From: Victor Gu <xigu@marvell.com>
 Date: Fri, 8 Sep 2017 11:53:43 +0200
-Subject: [PATCH 07/12] PCI: aardvark: set PIO_ADDR_LS correctly in
+Subject: [PATCH 07/11] PCI: aardvark: set PIO_ADDR_LS correctly in
  advk_pcie_rd_conf()
 
 When setting the PIO_ADDR_LS register during a configuration read, we
@@ -21,7 +21,7 @@ Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
  1 file changed, 1 insertion(+), 1 deletion(-)
 
 diff --git a/drivers/pci/host/pci-aardvark.c b/drivers/pci/host/pci-aardvark.c
-index 582d75f864e3..68ff10e17c74 100644
+index 0dbaadfe88e0..fe94d064483b 100644
 --- a/drivers/pci/host/pci-aardvark.c
 +++ b/drivers/pci/host/pci-aardvark.c
 @@ -460,7 +460,7 @@ static int advk_pcie_rd_conf(struct pci_bus *bus, u32 devfn,
@@ -34,5 +34,5 @@ index 582d75f864e3..68ff10e17c74 100644
  	advk_writel(pcie, 0, PIO_ADDR_MS);
  
 -- 
-2.14.1
+2.14.2
 
diff --git a/core/linux-espressobin/0008-PCI-aardvark-set-host-and-device-to-the-same-MAX-pay.patch b/core/linux-espressobin/0008-PCI-aardvark-set-host-and-device-to-the-same-MAX-pay.patch
index 84a140113..f7d729fb3 100644
--- a/core/linux-espressobin/0008-PCI-aardvark-set-host-and-device-to-the-same-MAX-pay.patch
+++ b/core/linux-espressobin/0008-PCI-aardvark-set-host-and-device-to-the-same-MAX-pay.patch
@@ -1,7 +1,7 @@
-From 6ce52078a28550c7103b79b2b26de08185035bda Mon Sep 17 00:00:00 2001
+From c5cdcc007c34ff5236fc3f37cb8897b545342699 Mon Sep 17 00:00:00 2001
 From: Victor Gu <xigu@marvell.com>
 Date: Fri, 8 Sep 2017 11:53:44 +0200
-Subject: [PATCH 08/12] PCI: aardvark: set host and device to the same MAX
+Subject: [PATCH 08/11] PCI: aardvark: set host and device to the same MAX
  payload size
 
 Since the Aardvark does not implement a PCIe root bus, the Linux PCIe
@@ -25,7 +25,7 @@ Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
  1 file changed, 59 insertions(+), 1 deletion(-)
 
 diff --git a/drivers/pci/host/pci-aardvark.c b/drivers/pci/host/pci-aardvark.c
-index 68ff10e17c74..e361c673732f 100644
+index fe94d064483b..f74834d8667d 100644
 --- a/drivers/pci/host/pci-aardvark.c
 +++ b/drivers/pci/host/pci-aardvark.c
 @@ -30,8 +30,10 @@
@@ -108,7 +108,7 @@ index 68ff10e17c74..e361c673732f 100644
  static int advk_pcie_probe(struct platform_device *pdev)
  {
  	struct device *dev = &pdev->dev;
-@@ -951,6 +1006,9 @@ static int advk_pcie_probe(struct platform_device *pdev)
+@@ -953,6 +1008,9 @@ static int advk_pcie_probe(struct platform_device *pdev)
  	list_for_each_entry(child, &bus->children, node)
  		pcie_bus_configure_settings(child);
  
@@ -119,5 +119,5 @@ index 68ff10e17c74..e361c673732f 100644
  	return 0;
  }
 -- 
-2.14.1
+2.14.2
 
diff --git a/core/linux-espressobin/0009-PCI-aardvark-use-isr1-instead-of-isr0-interrupt-in-l.patch b/core/linux-espressobin/0009-PCI-aardvark-use-isr1-instead-of-isr0-interrupt-in-l.patch
index 58d46cef6..c0b34992a 100644
--- a/core/linux-espressobin/0009-PCI-aardvark-use-isr1-instead-of-isr0-interrupt-in-l.patch
+++ b/core/linux-espressobin/0009-PCI-aardvark-use-isr1-instead-of-isr0-interrupt-in-l.patch
@@ -1,7 +1,7 @@
-From 2473c44af66f1714e4f57b1a96e1bb687f6b06ea Mon Sep 17 00:00:00 2001
+From c7519e150cc378ecda57ecaf65e0eb6170138991 Mon Sep 17 00:00:00 2001
 From: Victor Gu <xigu@marvell.com>
 Date: Fri, 8 Sep 2017 11:53:45 +0200
-Subject: [PATCH 09/12] PCI: aardvark: use isr1 instead of isr0 interrupt in
+Subject: [PATCH 09/11] PCI: aardvark: use isr1 instead of isr0 interrupt in
  legacy irq mode
 
 The Aardvark has two interrupts sets:
@@ -37,7 +37,7 @@ Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
  1 file changed, 24 insertions(+), 17 deletions(-)
 
 diff --git a/drivers/pci/host/pci-aardvark.c b/drivers/pci/host/pci-aardvark.c
-index e361c673732f..4a563d8526ae 100644
+index f74834d8667d..d5c2819e17fa 100644
 --- a/drivers/pci/host/pci-aardvark.c
 +++ b/drivers/pci/host/pci-aardvark.c
 @@ -105,7 +105,8 @@
@@ -123,5 +123,5 @@ index e361c673732f..4a563d8526ae 100644
  		virq = irq_find_mapping(pcie->irq_domain, i);
  		generic_handle_irq(virq);
 -- 
-2.14.1
+2.14.2
 
diff --git a/core/linux-espressobin/0010-PCI-aardvark-disable-LOS-state-by-default.patch b/core/linux-espressobin/0010-PCI-aardvark-disable-LOS-state-by-default.patch
index 4d497f680..ffd69a7fb 100644
--- a/core/linux-espressobin/0010-PCI-aardvark-disable-LOS-state-by-default.patch
+++ b/core/linux-espressobin/0010-PCI-aardvark-disable-LOS-state-by-default.patch
@@ -1,7 +1,7 @@
-From b081f4e3b6b03881b336991e3c8ddd8a88b1c3d3 Mon Sep 17 00:00:00 2001
+From fda5a9a782796bd12e295ab77330c5802a4b9190 Mon Sep 17 00:00:00 2001
 From: Victor Gu <xigu@marvell.com>
 Date: Fri, 8 Sep 2017 11:53:46 +0200
-Subject: [PATCH 10/12] PCI: aardvark: disable LOS state by default
+Subject: [PATCH 10/11] PCI: aardvark: disable LOS state by default
 
 Some PCIe devices do not support LOS, and will cause timeouts if the
 root complex forces the LOS state. This patch disables the LOS state
@@ -23,7 +23,7 @@ Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
  1 file changed, 1 insertion(+), 2 deletions(-)
 
 diff --git a/drivers/pci/host/pci-aardvark.c b/drivers/pci/host/pci-aardvark.c
-index 4a563d8526ae..461517a87eca 100644
+index d5c2819e17fa..eb0b54506d4e 100644
 --- a/drivers/pci/host/pci-aardvark.c
 +++ b/drivers/pci/host/pci-aardvark.c
 @@ -369,8 +369,7 @@ static void advk_pcie_setup_hw(struct advk_pcie *pcie)
@@ -37,5 +37,5 @@ index 4a563d8526ae..461517a87eca 100644
  
  	reg = advk_readl(pcie, PCIE_CORE_CMD_STATUS_REG);
 -- 
-2.14.1
+2.14.2
 
diff --git a/core/linux-espressobin/0011-PCI-aardvark-fix-PCIe-max-read-request-size-setting.patch b/core/linux-espressobin/0011-PCI-aardvark-fix-PCIe-max-read-request-size-setting.patch
index 2ea78d226..a5a237eaf 100644
--- a/core/linux-espressobin/0011-PCI-aardvark-fix-PCIe-max-read-request-size-setting.patch
+++ b/core/linux-espressobin/0011-PCI-aardvark-fix-PCIe-max-read-request-size-setting.patch
@@ -1,7 +1,7 @@
-From d94d6e8f5096f4eb245782bd2723f9d22e00a76c Mon Sep 17 00:00:00 2001
+From 4e01555191fe4963210abf7ff2cf45afb3804105 Mon Sep 17 00:00:00 2001
 From: Evan Wang <xswang@marvell.com>
 Date: Fri, 8 Sep 2017 11:53:47 +0200
-Subject: [PATCH 11/12] PCI: aardvark: fix PCIe max read request size setting
+Subject: [PATCH 11/11] PCI: aardvark: fix PCIe max read request size setting
 
 There is an obvious typo issue in the definition of the PCIe maximum
 read request size: a bit shift is directly used as a value, while it
@@ -23,7 +23,7 @@ Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
  1 file changed, 3 insertions(+), 1 deletion(-)
 
 diff --git a/drivers/pci/host/pci-aardvark.c b/drivers/pci/host/pci-aardvark.c
-index 461517a87eca..6d6a2ae35481 100644
+index eb0b54506d4e..f682650bf037 100644
 --- a/drivers/pci/host/pci-aardvark.c
 +++ b/drivers/pci/host/pci-aardvark.c
 @@ -33,6 +33,7 @@
@@ -45,5 +45,5 @@ index 461517a87eca..6d6a2ae35481 100644
  
  	/* Program PCIe Control 2 to disable strict ordering */
 -- 
-2.14.1
+2.14.2
 
diff --git a/core/linux-espressobin/0012-PCI-aardvark-define-IRQ-related-hooks-in-pci_host_br.patch b/core/linux-espressobin/0012-PCI-aardvark-define-IRQ-related-hooks-in-pci_host_br.patch
deleted file mode 100644
index 8e6e163e0..000000000
--- a/core/linux-espressobin/0012-PCI-aardvark-define-IRQ-related-hooks-in-pci_host_br.patch
+++ /dev/null
@@ -1,39 +0,0 @@
-From e1387e57b57b39a22d626d6f6f8ae5e6fa1a4567 Mon Sep 17 00:00:00 2001
-From: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
-Date: Fri, 8 Sep 2017 11:53:48 +0200
-Subject: [PATCH 12/12] PCI: aardvark: define IRQ related hooks in
- pci_host_bridge
-
-Commit 769b461fc0c0 ("arm64: PCI: Drop DT IRQ allocation from
-pcibios_alloc_irq()") was assuming all PCI host controller drivers had
-been converted to use ->map_irq(), but that wasn't the case:
-pci-aardvark had not been converted. Due to this, it broke the support
-for legacy PCI interrupts when using the pci-aardvark driver (used on
-Marvell Armada 3720 platforms).
-
-In order to fix this, we make sure the ->map_irq and ->swizzle_irq
-fields of pci_host_bridge are properly filled in.
-
-Fixes: 769b461fc0c0 ("arm64: PCI: Drop DT IRQ allocation from pcibios_alloc_irq()")
-Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
-Cc: <stable@vger.kernel.org> # v4.13+
----
- drivers/pci/host/pci-aardvark.c | 2 ++
- 1 file changed, 2 insertions(+)
-
-diff --git a/drivers/pci/host/pci-aardvark.c b/drivers/pci/host/pci-aardvark.c
-index 6d6a2ae35481..f682650bf037 100644
---- a/drivers/pci/host/pci-aardvark.c
-+++ b/drivers/pci/host/pci-aardvark.c
-@@ -999,6 +999,8 @@ static int advk_pcie_probe(struct platform_device *pdev)
- 	bridge->sysdata = pcie;
- 	bridge->busnr = 0;
- 	bridge->ops = &advk_pcie_ops;
-+	bridge->map_irq = of_irq_parse_and_map_pci;
-+	bridge->swizzle_irq = pci_common_swizzle;
- 
- 	ret = pci_scan_root_bus_bridge(bridge);
- 	if (ret < 0) {
--- 
-2.14.1
-
diff --git a/core/linux-espressobin/PKGBUILD b/core/linux-espressobin/PKGBUILD
index ce651453b..172c0fa26 100644
--- a/core/linux-espressobin/PKGBUILD
+++ b/core/linux-espressobin/PKGBUILD
@@ -7,7 +7,7 @@ pkgbase=linux-espressobin
 _srcname=linux-4.13
 _kernelname=${pkgbase#linux}
 _desc="Globalscale ESPRESSOBin"
-pkgver=4.13.7
+pkgver=4.13.8
 pkgrel=1
 arch=('aarch64')
 url="http://www.kernel.org/"
@@ -27,23 +27,21 @@ source=("http://www.kernel.org/pub/linux/kernel/v4.x/${_srcname}.tar.xz"
         '0009-PCI-aardvark-use-isr1-instead-of-isr0-interrupt-in-l.patch'
         '0010-PCI-aardvark-disable-LOS-state-by-default.patch'
         '0011-PCI-aardvark-fix-PCIe-max-read-request-size-setting.patch'
-        '0012-PCI-aardvark-define-IRQ-related-hooks-in-pci_host_br.patch'
         'config'
         'linux.preset')
 md5sums=('ab1a2abc6f37b752dd2595338bec4e78'
-         'c098b8203d755d03e066bcd7afe42284'
-         'e10174ecfd529e00cc4c787472c77ae2'
-         '004d238d28d14525c2a3e6f2a2d5c517'
-         'ef62415d87a24d38f3dcb756ba7a1739'
-         '4e340f6e4f03cce707575cc925a7b264'
-         '35bc446f5cbcf2771a4f9147ccb33c34'
-         '4e60b850c7bfe7874bf0a2e00c33c06f'
-         '05a28cf5faa535d3814324abcec279bb'
-         '8b9d57b22b256437038036b219f581fe'
-         'a1a48018d94c19dc3d62756fd5261a56'
-         '56cfdb16e99145ab796964f14cba4173'
-         '899ff6e03408b4eb5e0dd600402e2420'
-         'a330eecd9d5fd0a771f9d1882aea2157'
+         '036393612e7318fdc3d74fae8e35ed33'
+         'fb583b413f2f4d3226854f2f9d7b8c36'
+         '43f1df16c83f931b1129fa5b68360254'
+         'c17548d01bfc6340f5d006d86c650808'
+         '2a7f986c9867800f6cfd4f704ad7e585'
+         '6bce53571d594f16c88e597a28037c07'
+         '487d07e0809b8bd7649fa06996be48c3'
+         'ffbd8027f9a224c73ba5e1aa6293c1fe'
+         '054b6fe544a8e55b765a545b8f66484c'
+         'f1378a65dadc02c92bdceff3f1f42049'
+         '8de0733449d3a17948afb70b472b08b7'
+         'f96ae871bf6d9c03330a32790d908a3c'
          'ffcc3c0d1ee49cef6799b83549616566'
          'd8d30aa4a9d4c2b8d4ea53faf46ccf80')
 
@@ -65,7 +63,6 @@ prepare() {
   git apply ../0009-PCI-aardvark-use-isr1-instead-of-isr0-interrupt-in-l.patch
   git apply ../0010-PCI-aardvark-disable-LOS-state-by-default.patch
   git apply ../0011-PCI-aardvark-fix-PCIe-max-read-request-size-setting.patch
-  git apply ../0012-PCI-aardvark-define-IRQ-related-hooks-in-pci_host_br.patch
 
   cat "${srcdir}/config" > ./.config