core/linux-espressobin to 4.19.1-1

This commit is contained in:
Kevin Mihelich 2018-11-05 01:06:43 +00:00
parent 08b0492a48
commit 85abbf74d5
5 changed files with 572 additions and 735 deletions

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@ -1,7 +1,7 @@
From 8247aa8a19752cc18dcbc812b193a654b1ac01fe Mon Sep 17 00:00:00 2001 From 63519314c1ce4ba7d31e5d9c781958ae928240e7 Mon Sep 17 00:00:00 2001
From: Kevin Mihelich <kevin@archlinuxarm.org> From: Kevin Mihelich <kevin@archlinuxarm.org>
Date: Tue, 4 Jul 2017 19:25:28 -0600 Date: Tue, 4 Jul 2017 19:25:28 -0600
Subject: [PATCH 1/3] arm64: dts: marvell: armada37xx: Add eth0 alias Subject: [PATCH 1/2] arm64: dts: marvell: armada37xx: Add eth0 alias
Signed-off-by: Kevin Mihelich <kevin@archlinuxarm.org> Signed-off-by: Kevin Mihelich <kevin@archlinuxarm.org>
--- ---
@ -9,7 +9,7 @@ Signed-off-by: Kevin Mihelich <kevin@archlinuxarm.org>
1 file changed, 1 insertion(+) 1 file changed, 1 insertion(+)
diff --git a/arch/arm64/boot/dts/marvell/armada-37xx.dtsi b/arch/arm64/boot/dts/marvell/armada-37xx.dtsi diff --git a/arch/arm64/boot/dts/marvell/armada-37xx.dtsi b/arch/arm64/boot/dts/marvell/armada-37xx.dtsi
index 3353252d78a0..5177c581a936 100644 index d9531e242eb4..9192015db31a 100644
--- a/arch/arm64/boot/dts/marvell/armada-37xx.dtsi --- a/arch/arm64/boot/dts/marvell/armada-37xx.dtsi
+++ b/arch/arm64/boot/dts/marvell/armada-37xx.dtsi +++ b/arch/arm64/boot/dts/marvell/armada-37xx.dtsi
@@ -18,6 +18,7 @@ @@ -18,6 +18,7 @@
@ -21,5 +21,5 @@ index 3353252d78a0..5177c581a936 100644
serial1 = &uart1; serial1 = &uart1;
}; };
-- --
2.18.0 2.19.0

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@ -1,7 +1,7 @@
From cf2b549fdf3a08ce69f93839250efe694b888c9d Mon Sep 17 00:00:00 2001 From 374fd6180f9e10beebf374054225bc8fbd4408a3 Mon Sep 17 00:00:00 2001
From: Victor Gu <xigu@marvell.com> From: Victor Gu <xigu@marvell.com>
Date: Fri, 8 Sep 2017 11:53:46 +0200 Date: Fri, 8 Sep 2017 11:53:46 +0200
Subject: [PATCH 3/3] PCI: aardvark: disable LOS state by default Subject: [PATCH 2/2] PCI: aardvark: disable LOS state by default
Some PCIe devices do not support LOS, and will cause timeouts if the Some PCIe devices do not support LOS, and will cause timeouts if the
root complex forces the LOS state. This patch disables the LOS state root complex forces the LOS state. This patch disables the LOS state
@ -23,10 +23,10 @@ Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
1 file changed, 1 insertion(+), 2 deletions(-) 1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/pci/controller/pci-aardvark.c b/drivers/pci/controller/pci-aardvark.c diff --git a/drivers/pci/controller/pci-aardvark.c b/drivers/pci/controller/pci-aardvark.c
index 3815027e92b5..331f15a57123 100644 index 7f7ec76f04ce..aee7d3343fd6 100644
--- a/drivers/pci/controller/pci-aardvark.c --- a/drivers/pci/controller/pci-aardvark.c
+++ b/drivers/pci/controller/pci-aardvark.c +++ b/drivers/pci/controller/pci-aardvark.c
@@ -367,8 +367,7 @@ static void advk_pcie_setup_hw(struct advk_pcie *pcie) @@ -324,8 +324,7 @@ static void advk_pcie_setup_hw(struct advk_pcie *pcie)
advk_pcie_wait_for_link(pcie); advk_pcie_wait_for_link(pcie);
@ -37,5 +37,5 @@ index 3815027e92b5..331f15a57123 100644
reg = advk_readl(pcie, PCIE_CORE_CMD_STATUS_REG); reg = advk_readl(pcie, PCIE_CORE_CMD_STATUS_REG);
-- --
2.18.0 2.19.0

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@ -1,124 +0,0 @@
From 6a733df1f509dcbdb64325032cf54e02e2424729 Mon Sep 17 00:00:00 2001
From: Victor Gu <xigu@marvell.com>
Date: Fri, 8 Sep 2017 11:53:44 +0200
Subject: [PATCH 2/3] PCI: aardvark: set host and device to the same MAX
payload size
Since the Aardvark does not implement a PCIe root bus, the Linux PCIe
subsystem will not align the MAX payload size between the host and the
device. This patch ensures that the host and device have the same MAX
payload size, fixing a number of problems with various PCIe devices.
This is part of fixing bug
https://bugzilla.kernel.org/show_bug.cgi?id=196339, this commit was
reported as the user to be important to get a Intel 7260 mini-PCIe
WiFi card working.
Fixes: Fixes: 8c39d710363c1 ("PCI: aardvark: Add Aardvark PCI host controller driver")
Signed-off-by: Victor Gu <xigu@marvell.com>
Reviewed-by: Evan Wang <xswang@marvell.com>
Reviewed-by: Nadav Haklai <nadavh@marvell.com>
[Thomas: tweak commit log.]
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
---
drivers/pci/controller/pci-aardvark.c | 60 ++++++++++++++++++++++++++-
1 file changed, 59 insertions(+), 1 deletion(-)
diff --git a/drivers/pci/controller/pci-aardvark.c b/drivers/pci/controller/pci-aardvark.c
index 0fae816fba39..3815027e92b5 100644
--- a/drivers/pci/controller/pci-aardvark.c
+++ b/drivers/pci/controller/pci-aardvark.c
@@ -29,9 +29,11 @@
#define PCIE_CORE_DEV_CTRL_STATS_REG 0xc8
#define PCIE_CORE_DEV_CTRL_STATS_RELAX_ORDER_DISABLE (0 << 4)
#define PCIE_CORE_DEV_CTRL_STATS_MAX_PAYLOAD_SZ_SHIFT 5
+#define PCIE_CORE_DEV_CTRL_STATS_MAX_PAYLOAD_SZ 0x2
#define PCIE_CORE_DEV_CTRL_STATS_SNOOP_DISABLE (0 << 11)
#define PCIE_CORE_DEV_CTRL_STATS_MAX_RD_REQ_SIZE_SHIFT 12
#define PCIE_CORE_DEV_CTRL_STATS_MAX_RD_REQ_SZ 0x2
+#define PCIE_CORE_MPS_UNIT_BYTE 128
#define PCIE_CORE_LINK_CTRL_STAT_REG 0xd0
#define PCIE_CORE_LINK_L0S_ENTRY BIT(0)
#define PCIE_CORE_LINK_TRAINING BIT(5)
@@ -296,7 +298,8 @@ static void advk_pcie_setup_hw(struct advk_pcie *pcie)
/* Set PCIe Device Control and Status 1 PF0 register */
reg = PCIE_CORE_DEV_CTRL_STATS_RELAX_ORDER_DISABLE |
- (7 << PCIE_CORE_DEV_CTRL_STATS_MAX_PAYLOAD_SZ_SHIFT) |
+ (PCIE_CORE_DEV_CTRL_STATS_MAX_PAYLOAD_SZ <<
+ PCIE_CORE_DEV_CTRL_STATS_MAX_PAYLOAD_SZ_SHIFT) |
PCIE_CORE_DEV_CTRL_STATS_SNOOP_DISABLE |
(PCIE_CORE_DEV_CTRL_STATS_MAX_RD_REQ_SZ <<
PCIE_CORE_DEV_CTRL_STATS_MAX_RD_REQ_SIZE_SHIFT);
@@ -884,6 +887,58 @@ static int advk_pcie_parse_request_of_pci_ranges(struct advk_pcie *pcie)
return err;
}
+static int advk_pcie_find_smpss(struct pci_dev *dev, void *data)
+{
+ u8 *smpss = data;
+
+ if (!dev)
+ return 0;
+
+ if (!pci_is_pcie(dev))
+ return 0;
+
+ if (*smpss > dev->pcie_mpss)
+ *smpss = dev->pcie_mpss;
+
+ return 0;
+}
+
+static int advk_pcie_bus_configure_mps(struct pci_dev *dev, void *data)
+{
+ int mps;
+
+ if (!dev)
+ return 0;
+
+ if (!pci_is_pcie(dev))
+ return 0;
+
+ mps = PCIE_CORE_MPS_UNIT_BYTE << *(u8 *)data;
+ pcie_set_mps(dev, mps);
+
+ return 0;
+}
+
+static void advk_pcie_configure_mps(struct pci_bus *bus, struct advk_pcie *pcie)
+{
+ u8 smpss = PCIE_CORE_DEV_CTRL_STATS_MAX_PAYLOAD_SZ;
+ u32 reg;
+
+ /* Find the minimal supported MAX payload size */
+ advk_pcie_find_smpss(bus->self, &smpss);
+ pci_walk_bus(bus, advk_pcie_find_smpss, &smpss);
+
+ /* Configure RC MAX payload size */
+ reg = advk_readl(pcie, PCIE_CORE_DEV_CTRL_STATS_REG);
+ reg &= ~PCI_EXP_DEVCTL_PAYLOAD;
+ reg |= smpss << PCIE_CORE_DEV_CTRL_STATS_MAX_PAYLOAD_SZ_SHIFT;
+ advk_writel(pcie, reg, PCIE_CORE_DEV_CTRL_STATS_REG);
+
+ /* Configure device MAX payload size */
+ advk_pcie_bus_configure_mps(bus->self, &smpss);
+ pci_walk_bus(bus, advk_pcie_bus_configure_mps, &smpss);
+}
+
static int advk_pcie_probe(struct platform_device *pdev)
{
struct device *dev = &pdev->dev;
@@ -957,6 +1012,9 @@ static int advk_pcie_probe(struct platform_device *pdev)
list_for_each_entry(child, &bus->children, node)
pcie_bus_configure_settings(child);
+ /* Configure the MAX pay load size */
+ advk_pcie_configure_mps(bus, pcie);
+
pci_bus_add_devices(bus);
return 0;
}
--
2.18.0

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@ -4,10 +4,10 @@
buildarch=8 buildarch=8
pkgbase=linux-espressobin pkgbase=linux-espressobin
_srcname=linux-4.18 _srcname=linux-4.19
_kernelname=${pkgbase#linux} _kernelname=${pkgbase#linux}
_desc="Globalscale ESPRESSOBin" _desc="Globalscale ESPRESSOBin"
pkgver=4.18.14 pkgver=4.19.1
pkgrel=1 pkgrel=1
arch=('aarch64') arch=('aarch64')
url="http://www.kernel.org/" url="http://www.kernel.org/"
@ -17,19 +17,17 @@ options=('!strip')
source=("http://www.kernel.org/pub/linux/kernel/v4.x/${_srcname}.tar.xz" source=("http://www.kernel.org/pub/linux/kernel/v4.x/${_srcname}.tar.xz"
"http://www.kernel.org/pub/linux/kernel/v4.x/patch-${pkgver}.xz" "http://www.kernel.org/pub/linux/kernel/v4.x/patch-${pkgver}.xz"
'0001-arm64-dts-marvell-armada37xx-Add-eth0-alias.patch' '0001-arm64-dts-marvell-armada37xx-Add-eth0-alias.patch'
'0002-PCI-aardvark-set-host-and-device-to-the-same-MAX-pay.patch' '0002-PCI-aardvark-disable-LOS-state-by-default.patch'
'0003-PCI-aardvark-disable-LOS-state-by-default.patch'
'config' 'config'
'linux.preset' 'linux.preset'
'60-linux.hook' '60-linux.hook'
'90-linux.hook' '90-linux.hook'
'91-linux.hook') '91-linux.hook')
md5sums=('bee5fe53ee1c3142b8f0c12c0d3348f9' md5sums=('740a90cf810c2105df8ee12e5d0bb900'
'5e8695bf4dc16213963ba04768a23539' '8d5da563baab055b8d76c94f5040948a'
'b8377bc890bcf9d5455b70bf3204701e' 'b8aaf743affd79115d1a5806d461e9cb'
'330c550e2ca5b117ef10d7683d25f7df' '3d8a4bd4437ccd8adaead9f2dc80f884'
'582ffed746b5a9f4da1255d3fb121daf' '3cb16c51b3452061436eb79e7ad4f9d4'
'ce11bdb313ecb4787499dce79fad4bdb'
'86d4a35722b5410e3b29fc92dae15d4b' '86d4a35722b5410e3b29fc92dae15d4b'
'ce6c81ad1ad1f8b333fd6077d47abdaf' 'ce6c81ad1ad1f8b333fd6077d47abdaf'
'3dc88030a8f2f5a5f97266d99b149f77' '3dc88030a8f2f5a5f97266d99b149f77'
@ -43,8 +41,7 @@ prepare() {
# ALARM patches # ALARM patches
git apply ../0001-arm64-dts-marvell-armada37xx-Add-eth0-alias.patch git apply ../0001-arm64-dts-marvell-armada37xx-Add-eth0-alias.patch
git apply ../0002-PCI-aardvark-set-host-and-device-to-the-same-MAX-pay.patch git apply ../0002-PCI-aardvark-disable-LOS-state-by-default.patch
git apply ../0003-PCI-aardvark-disable-LOS-state-by-default.patch
cat "${srcdir}/config" > ./.config cat "${srcdir}/config" > ./.config

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