From a153603d5ecc52bda308f8f6563df751c061c836 Mon Sep 17 00:00:00 2001 From: Kevin Mihelich Date: Wed, 8 Jul 2015 01:04:26 +0000 Subject: [PATCH] core/linux-armv5-rc to 4.2.rc1-1 --- ...r-for-i.MX233-s-builtin-ADC-DAC-code.patch | 2895 ----------------- ....patch => 0001-at91-ariag25-updates.patch} | 6 +- ...3-olinuxino-enable-mxs-builtin-audio.patch | 54 - ...ch => 0002-at91-arietta-g25-support.patch} | 12 +- .../linux-armv5-rc/0003-imx23-I2C-fixes.patch | 126 - ...xs-builtin-entries-for-testing-the-a.patch | 173 - core/linux-armv5-rc/PKGBUILD | 34 +- core/linux-armv5-rc/config | 116 +- 8 files changed, 114 insertions(+), 3302 deletions(-) delete mode 100644 core/linux-armv5-rc/0001-Added-ASoC-driver-for-i.MX233-s-builtin-ADC-DAC-code.patch rename core/linux-armv5-rc/{0005-at91-ariag25-updates.patch => 0001-at91-ariag25-updates.patch} (95%) delete mode 100644 core/linux-armv5-rc/0002-ARM-dts-imx23-olinuxino-enable-mxs-builtin-audio.patch rename core/linux-armv5-rc/{0006-at91-arietta-g25-support.patch => 0002-at91-arietta-g25-support.patch} (97%) delete mode 100644 core/linux-armv5-rc/0003-imx23-I2C-fixes.patch delete mode 100644 core/linux-armv5-rc/0004-Added-DTS-with-mxs-builtin-entries-for-testing-the-a.patch diff --git a/core/linux-armv5-rc/0001-Added-ASoC-driver-for-i.MX233-s-builtin-ADC-DAC-code.patch b/core/linux-armv5-rc/0001-Added-ASoC-driver-for-i.MX233-s-builtin-ADC-DAC-code.patch deleted file mode 100644 index 41cd52e84..000000000 --- a/core/linux-armv5-rc/0001-Added-ASoC-driver-for-i.MX233-s-builtin-ADC-DAC-code.patch +++ /dev/null @@ -1,2895 +0,0 @@ -From 0529b39bd74633bff2cedc6718e36a349a40b288 Mon Sep 17 00:00:00 2001 -From: Michal Ulianko -Date: Mon, 29 Jul 2013 20:14:38 +0200 -Subject: [PATCH 1/6] Added ASoC driver for i.MX233's builtin ADC/DAC codec. - ---- - sound/soc/codecs/Kconfig | 4 + - sound/soc/codecs/Makefile | 2 + - sound/soc/codecs/mxs-builtin-codec.c | 1128 ++++++++++++++++++++++++++++++++++ - sound/soc/codecs/mxs-builtin-codec.h | 825 +++++++++++++++++++++++++ - sound/soc/mxs/Kconfig | 10 + - sound/soc/mxs/Makefile | 9 + - sound/soc/mxs/mxs-builtin-audio.c | 120 ++++ - sound/soc/mxs/mxs-builtin-dai.c | 588 ++++++++++++++++++ - sound/soc/mxs/mxs-builtin-pcm.c | 69 +++ - sound/soc/mxs/mxs-builtin-pcm.h | 25 + - 10 files changed, 2780 insertions(+) - create mode 100644 sound/soc/codecs/mxs-builtin-codec.c - create mode 100644 sound/soc/codecs/mxs-builtin-codec.h - create mode 100644 sound/soc/mxs/mxs-builtin-audio.c - create mode 100644 sound/soc/mxs/mxs-builtin-dai.c - create mode 100644 sound/soc/mxs/mxs-builtin-pcm.c - create mode 100644 sound/soc/mxs/mxs-builtin-pcm.h - -diff --git a/sound/soc/codecs/Kconfig b/sound/soc/codecs/Kconfig -index 061c465..577f7fd 100644 ---- a/sound/soc/codecs/Kconfig -+++ b/sound/soc/codecs/Kconfig -@@ -170,6 +170,7 @@ config SND_SOC_ALL_CODECS - select SND_SOC_WM9705 if SND_SOC_AC97_BUS - select SND_SOC_WM9712 if SND_SOC_AC97_BUS - select SND_SOC_WM9713 if SND_SOC_AC97_BUS -+ select SND_SOC_MXS_BUILTIN_CODEC - help - Normally ASoC codec drivers are only built if a machine driver which - uses them is also built since they are only usable with a machine -@@ -844,6 +845,9 @@ config SND_SOC_WM9712 - config SND_SOC_WM9713 - tristate - -+config SND_SOC_MXS_BUILTIN_CODEC -+ tristate -+ - # Amp - config SND_SOC_LM4857 - tristate -diff --git a/sound/soc/codecs/Makefile b/sound/soc/codecs/Makefile -index abe2d7e..9ef8c98 100644 ---- a/sound/soc/codecs/Makefile -+++ b/sound/soc/codecs/Makefile -@@ -175,6 +175,7 @@ snd-soc-wm9705-objs := wm9705.o - snd-soc-wm9712-objs := wm9712.o - snd-soc-wm9713-objs := wm9713.o - snd-soc-wm-hubs-objs := wm_hubs.o -+snd-soc-mxs-builtin-codec-objs := mxs-builtin-codec.o - - # Amp - snd-soc-max9877-objs := max9877.o -@@ -357,6 +358,7 @@ obj-$(CONFIG_SND_SOC_WM9712) += snd-soc-wm9712.o - obj-$(CONFIG_SND_SOC_WM9713) += snd-soc-wm9713.o - obj-$(CONFIG_SND_SOC_WM_ADSP) += snd-soc-wm-adsp.o - obj-$(CONFIG_SND_SOC_WM_HUBS) += snd-soc-wm-hubs.o -+obj-$(CONFIG_SND_SOC_MXS_BUILTIN_CODEC) += snd-soc-mxs-builtin-codec.o - - # Amp - obj-$(CONFIG_SND_SOC_MAX9877) += snd-soc-max9877.o -diff --git a/sound/soc/codecs/mxs-builtin-codec.c b/sound/soc/codecs/mxs-builtin-codec.c -new file mode 100644 -index 0000000..cd74a8f ---- /dev/null -+++ b/sound/soc/codecs/mxs-builtin-codec.c -@@ -0,0 +1,1128 @@ -+/* -+ * mxs-builtin-codec.c -- i.MX233 built-in codec ALSA Soc Audio driver -+ * -+ * Author: Michal Ulianko -+ * -+ * Based on sound/soc/codecs/mxs-adc-codec.c for kernel 2.6.35 -+ * by Vladislav Buzov -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#include "mxs-builtin-codec.h" -+ -+#ifndef BF -+#define BF(value, field) (((value) << BP_##field) & BM_##field) -+#endif -+ -+/* TODO Delete this and use BM_RTC_PERSISTENT0_RELEASE_GND from header file -+ * if it works. */ -+#define BP_RTC_PERSISTENT0_SPARE_ANALOG 18 -+#define BM_RTC_PERSISTENT0_SPARE_ANALOG 0xFFFC0000 -+#define BM_RTC_PERSISTENT0_RELEASE_GND BF(0x2, RTC_PERSISTENT0_SPARE_ANALOG) -+ -+/* TODO Use codec IO function soc snd write etc, instead of __writel __readl */ -+ -+struct mxs_adc_priv { -+ void __iomem *ain_base; -+ void __iomem *aout_base; -+ void __iomem *rtc_base; -+ struct clk *clk; -+}; -+ -+static unsigned int mxs_regmap[] = { -+ HW_AUDIOOUT_CTRL, -+ HW_AUDIOOUT_STAT, -+ HW_AUDIOOUT_DACSRR, -+ HW_AUDIOOUT_DACVOLUME, -+ HW_AUDIOOUT_DACDEBUG, -+ HW_AUDIOOUT_HPVOL, -+ HW_AUDIOOUT_PWRDN, -+ HW_AUDIOOUT_REFCTRL, -+ HW_AUDIOOUT_ANACTRL, -+ HW_AUDIOOUT_TEST, -+ HW_AUDIOOUT_BISTCTRL, -+ HW_AUDIOOUT_BISTSTAT0, -+ HW_AUDIOOUT_BISTSTAT1, -+ HW_AUDIOOUT_ANACLKCTRL, -+ HW_AUDIOOUT_DATA, -+ HW_AUDIOOUT_SPEAKERCTRL, -+ HW_AUDIOOUT_VERSION, -+ HW_AUDIOIN_CTRL, -+ HW_AUDIOIN_STAT, -+ HW_AUDIOIN_ADCSRR, -+ HW_AUDIOIN_ADCVOLUME, -+ HW_AUDIOIN_ADCDEBUG, -+ HW_AUDIOIN_ADCVOL, -+ HW_AUDIOIN_MICLINE, -+ HW_AUDIOIN_ANACLKCTRL, -+ HW_AUDIOIN_DATA, -+}; -+ -+static void __iomem *mxs_getreg(struct mxs_adc_priv *mxs_adc, int i) -+{ -+ if (i <= 16) -+ return mxs_adc->aout_base + mxs_regmap[i]; -+ else if (i < ADC_REGNUM) -+ return mxs_adc->ain_base + mxs_regmap[i]; -+ else -+ return NULL; -+} -+ -+static u8 dac_volumn_control_word[] = { -+ 0x37, 0x5e, 0x7e, 0x8e, -+ 0x9e, 0xae, 0xb6, 0xbe, -+ 0xc6, 0xce, 0xd6, 0xde, -+ 0xe6, 0xee, 0xf6, 0xfe, -+}; -+ -+struct dac_srr { -+ u32 rate; -+ u32 basemult; -+ u32 src_hold; -+ u32 src_int; -+ u32 src_frac; -+}; -+ -+static struct dac_srr srr_values[] = { -+ {192000, 0x4, 0x0, 0x0F, 0x13FF}, -+ {176400, 0x4, 0x0, 0x11, 0x0037}, -+ {128000, 0x4, 0x0, 0x17, 0x0E00}, -+ {96000, 0x2, 0x0, 0x0F, 0x13FF}, -+ {88200, 0x2, 0x0, 0x11, 0x0037}, -+ {64000, 0x2, 0x0, 0x17, 0x0E00}, -+ {48000, 0x1, 0x0, 0x0F, 0x13FF}, -+ {44100, 0x1, 0x0, 0x11, 0x0037}, -+ {32000, 0x1, 0x0, 0x17, 0x0E00}, -+ {24000, 0x1, 0x1, 0x0F, 0x13FF}, -+ {22050, 0x1, 0x1, 0x11, 0x0037}, -+ {16000, 0x1, 0x1, 0x17, 0x0E00}, -+ {12000, 0x1, 0x3, 0x0F, 0x13FF}, -+ {11025, 0x1, 0x3, 0x11, 0x0037}, -+ {8000, 0x1, 0x3, 0x17, 0x0E00} -+}; -+ -+static inline int get_srr_values(int rate) -+{ -+ int i; -+ -+ for (i = 0; i < ARRAY_SIZE(srr_values); i++) -+ if (srr_values[i].rate == rate) -+ return i; -+ -+ return -1; -+} -+ -+/* SoC IO functions */ -+static void mxs_codec_write_cache(struct snd_soc_codec *codec, unsigned int reg, unsigned int value) -+{ -+ u16 *cache = codec->reg_cache; -+ if (reg < ADC_REGNUM) -+ cache[reg] = value; -+} -+ -+static int mxs_codec_write(struct snd_soc_codec *codec, unsigned int reg, unsigned int value) -+{ -+ struct mxs_adc_priv *mxs_adc = snd_soc_codec_get_drvdata(codec); -+ unsigned int reg_val; -+ unsigned int mask = 0xffff; -+ -+ if (reg >= ADC_REGNUM) -+ return -EIO; -+ -+ mxs_codec_write_cache(codec, reg, value); -+ -+ if (reg & 0x1) { -+ mask <<= 16; -+ value <<= 16; -+ } -+ -+ reg_val = __raw_readl(mxs_getreg(mxs_adc, reg >> 1)); -+ reg_val = (reg_val & ~mask) | value; -+ __raw_writel(reg_val, mxs_getreg(mxs_adc, reg >> 1)); -+ -+ return 0; -+} -+ -+static unsigned int mxs_codec_read(struct snd_soc_codec *codec, unsigned int reg) -+{ -+ struct mxs_adc_priv *mxs_adc = snd_soc_codec_get_drvdata(codec); -+ unsigned int reg_val; -+ -+ if (reg >= ADC_REGNUM) -+ return -1; -+ -+ reg_val = __raw_readl(mxs_getreg(mxs_adc, reg >> 1)); -+ if (reg & 1) -+ reg_val >>= 16; -+ -+ return reg_val & 0xffff; -+} -+ -+// static unsigned int mxs_codec_read_cache(struct snd_soc_codec *codec, unsigned int reg) -+// { -+// u16 *cache = codec->reg_cache; -+// if (reg >= ADC_REGNUM) -+// return -EINVAL; -+// return cache[reg]; -+// } -+ -+static void mxs_codec_sync_reg_cache(struct snd_soc_codec *codec) -+{ -+ int reg; -+ for (reg = 0; reg < ADC_REGNUM; reg += 1) -+ mxs_codec_write_cache(codec, reg, -+ mxs_codec_read(codec, reg)); -+} -+ -+// static int mxs_codec_restore_reg(struct snd_soc_codec *codec, unsigned int reg) -+// { -+// unsigned int cached_val, hw_val; -+// -+// cached_val = mxs_codec_read_cache(codec, reg); -+// hw_val = mxs_codec_read(codec, reg); -+// -+// if (hw_val != cached_val) -+// return mxs_codec_write(codec, reg, cached_val); -+// -+// return 0; -+// } -+/* END SoC IO functions */ -+ -+/* Codec routines */ -+#define VAG_BASE_VALUE ((1400/2 - 625)/25) -+ -+static void mxs_codec_dac_set_vag(struct mxs_adc_priv *mxs_adc) -+{ -+ u32 refctrl_val = __raw_readl(mxs_adc->aout_base + HW_AUDIOOUT_REFCTRL); -+ -+ refctrl_val &= ~(BM_AUDIOOUT_REFCTRL_VAG_VAL); -+ refctrl_val &= ~(BM_AUDIOOUT_REFCTRL_VBG_ADJ); -+ refctrl_val |= BF(VAG_BASE_VALUE, AUDIOOUT_REFCTRL_VAG_VAL) | -+ BM_AUDIOOUT_REFCTRL_ADJ_VAG | -+ BF(0xF, AUDIOOUT_REFCTRL_ADC_REFVAL) | -+ BM_AUDIOOUT_REFCTRL_ADJ_ADC | -+ BF(0x3, AUDIOOUT_REFCTRL_VBG_ADJ) | BM_AUDIOOUT_REFCTRL_RAISE_REF; -+ -+ __raw_writel(refctrl_val, mxs_adc->aout_base + HW_AUDIOOUT_REFCTRL); -+} -+ -+static bool mxs_codec_dac_is_capless(struct mxs_adc_priv *mxs_adc) -+{ -+ if ((__raw_readl(mxs_adc->aout_base + HW_AUDIOOUT_PWRDN) -+ & BM_AUDIOOUT_PWRDN_CAPLESS) == 0) -+ return false; -+ else -+ return true; -+} -+ -+static void mxs_codec_dac_arm_short_cm(struct mxs_adc_priv *mxs_adc, bool bShort) -+{ -+ __raw_writel(BF(3, AUDIOOUT_ANACTRL_SHORTMODE_CM), -+ mxs_adc->aout_base + HW_AUDIOOUT_ANACTRL_CLR); -+ __raw_writel(BM_AUDIOOUT_ANACTRL_SHORT_CM_STS, -+ mxs_adc->aout_base + HW_AUDIOOUT_ANACTRL_CLR); -+ if (bShort) -+ __raw_writel(BF(1, AUDIOOUT_ANACTRL_SHORTMODE_CM), -+ mxs_adc->aout_base + HW_AUDIOOUT_ANACTRL_SET); -+} -+ -+static void mxs_codec_dac_arm_short_lr(struct mxs_adc_priv *mxs_adc, bool bShort) -+{ -+ __raw_writel(BF(3, AUDIOOUT_ANACTRL_SHORTMODE_LR), -+ mxs_adc->aout_base + HW_AUDIOOUT_ANACTRL_CLR); -+ __raw_writel(BM_AUDIOOUT_ANACTRL_SHORT_LR_STS, -+ mxs_adc->aout_base + HW_AUDIOOUT_ANACTRL_CLR); -+ if (bShort) -+ __raw_writel(BF(1, AUDIOOUT_ANACTRL_SHORTMODE_LR), -+ mxs_adc->aout_base + HW_AUDIOOUT_ANACTRL_SET); -+} -+ -+static void mxs_codec_dac_set_short_trip_level(struct mxs_adc_priv *mxs_adc, u8 u8level) -+{ -+ __raw_writel(__raw_readl(mxs_adc->aout_base + -+ HW_AUDIOOUT_ANACTRL) -+ & (~BM_AUDIOOUT_ANACTRL_SHORT_LVLADJL) -+ & (~BM_AUDIOOUT_ANACTRL_SHORT_LVLADJR) -+ | BF(u8level, AUDIOOUT_ANACTRL_SHORT_LVLADJL) -+ | BF(u8level, AUDIOOUT_ANACTRL_SHORT_LVLADJR), -+ mxs_adc->aout_base + HW_AUDIOOUT_ANACTRL); -+} -+ -+static void mxs_codec_dac_arm_short(struct mxs_adc_priv *mxs_adc, bool bLatchCM, bool bLatchLR) -+{ -+ if (bLatchCM) { -+ if (mxs_codec_dac_is_capless(mxs_adc)) -+ mxs_codec_dac_arm_short_cm(mxs_adc, true); -+ } else -+ mxs_codec_dac_arm_short_cm(mxs_adc, false); -+ -+ if (bLatchLR) -+ mxs_codec_dac_arm_short_lr(mxs_adc, true); -+ else -+ mxs_codec_dac_arm_short_lr(mxs_adc, false); -+} -+ -+static void -+mxs_codec_dac_power_on(struct mxs_adc_priv *mxs_adc) -+{ -+ /* Ungate DAC clocks */ -+ __raw_writel(BM_AUDIOOUT_CTRL_CLKGATE, -+ mxs_adc->aout_base + HW_AUDIOOUT_CTRL_CLR); -+ __raw_writel(BM_AUDIOOUT_ANACLKCTRL_CLKGATE, -+ mxs_adc->aout_base + HW_AUDIOOUT_ANACLKCTRL_CLR); -+ -+ /* 16 bit word length */ -+ __raw_writel(BM_AUDIOOUT_CTRL_WORD_LENGTH, -+ mxs_adc->aout_base + HW_AUDIOOUT_CTRL_SET); -+ -+ /* Arm headphone LR short protect */ -+ mxs_codec_dac_set_short_trip_level(mxs_adc, 0); -+ mxs_codec_dac_arm_short(mxs_adc, false, true); -+ -+ /* Update DAC volume over zero crossings */ -+ __raw_writel(BM_AUDIOOUT_DACVOLUME_EN_ZCD, -+ mxs_adc->aout_base + HW_AUDIOOUT_DACVOLUME_SET); -+ /* Mute DAC */ -+ __raw_writel(BM_AUDIOOUT_DACVOLUME_MUTE_LEFT | -+ BM_AUDIOOUT_DACVOLUME_MUTE_RIGHT, -+ mxs_adc->aout_base + HW_AUDIOOUT_DACVOLUME_SET); -+ -+ /* Update HP volume over zero crossings */ -+ __raw_writel(BM_AUDIOOUT_HPVOL_EN_MSTR_ZCD, -+ mxs_adc->aout_base + HW_AUDIOOUT_HPVOL_SET); -+ -+ __raw_writel(BM_AUDIOOUT_ANACTRL_HP_CLASSAB, -+ mxs_adc->aout_base + HW_AUDIOOUT_ANACTRL_SET); -+ -+ /* Mute HP output */ -+ __raw_writel(BM_AUDIOOUT_HPVOL_MUTE, -+ mxs_adc->aout_base + HW_AUDIOOUT_HPVOL_SET); -+ /* Mute speaker amp */ -+ __raw_writel(BM_AUDIOOUT_SPEAKERCTRL_MUTE, -+ mxs_adc->aout_base + HW_AUDIOOUT_SPEAKERCTRL_SET); -+ /* Enable the audioout */ -+ __raw_writel(BM_AUDIOOUT_CTRL_RUN, -+ mxs_adc->aout_base + HW_AUDIOOUT_CTRL_SET); -+} -+ -+static void -+mxs_codec_dac_power_down(struct mxs_adc_priv *mxs_adc) -+{ -+ /* Disable the audioout */ -+ __raw_writel(BM_AUDIOOUT_CTRL_RUN, -+ mxs_adc->aout_base + HW_AUDIOOUT_CTRL_CLR); -+ /* Disable class AB */ -+ __raw_writel(BM_AUDIOOUT_ANACTRL_HP_CLASSAB, -+ mxs_adc->aout_base + HW_AUDIOOUT_ANACTRL_CLR); -+ -+ /* Set hold to ground */ -+ __raw_writel(BM_AUDIOOUT_ANACTRL_HP_HOLD_GND, -+ mxs_adc->aout_base + HW_AUDIOOUT_ANACTRL_SET); -+ -+ /* Mute HP output */ -+ __raw_writel(BM_AUDIOOUT_HPVOL_MUTE, -+ mxs_adc->aout_base + HW_AUDIOOUT_HPVOL_SET); -+ /* Power down HP output */ -+ __raw_writel(BM_AUDIOOUT_PWRDN_HEADPHONE, -+ mxs_adc->aout_base + HW_AUDIOOUT_PWRDN_SET); -+ -+ /* Mute speaker amp */ -+ __raw_writel(BM_AUDIOOUT_SPEAKERCTRL_MUTE, -+ mxs_adc->aout_base + HW_AUDIOOUT_SPEAKERCTRL_SET); -+ /* Power down speaker amp */ -+ __raw_writel(BM_AUDIOOUT_PWRDN_SPEAKER, -+ mxs_adc->aout_base + HW_AUDIOOUT_PWRDN_SET); -+ -+ /* Mute DAC */ -+ __raw_writel(BM_AUDIOOUT_DACVOLUME_MUTE_LEFT | -+ BM_AUDIOOUT_DACVOLUME_MUTE_RIGHT, -+ mxs_adc->aout_base + HW_AUDIOOUT_DACVOLUME_SET); -+ /* Power down DAC */ -+ __raw_writel(BM_AUDIOOUT_PWRDN_DAC, -+ mxs_adc->aout_base + HW_AUDIOOUT_PWRDN_SET); -+ -+ /* Gate DAC clocks */ -+ __raw_writel(BM_AUDIOOUT_ANACLKCTRL_CLKGATE, -+ mxs_adc->aout_base + HW_AUDIOOUT_ANACLKCTRL_SET); -+ __raw_writel(BM_AUDIOOUT_CTRL_CLKGATE, -+ mxs_adc->aout_base + HW_AUDIOOUT_CTRL_SET); -+} -+ -+static void -+mxs_codec_adc_power_on(struct mxs_adc_priv *mxs_adc) -+{ -+ u32 reg; -+ -+ /* Ungate ADC clocks */ -+ __raw_writel(BM_AUDIOIN_CTRL_CLKGATE, -+ mxs_adc->ain_base + HW_AUDIOIN_CTRL_CLR); -+ __raw_writel(BM_AUDIOIN_ANACLKCTRL_CLKGATE, -+ mxs_adc->ain_base + HW_AUDIOIN_ANACLKCTRL_CLR); -+ -+ /* 16 bit word length */ -+ __raw_writel(BM_AUDIOIN_CTRL_WORD_LENGTH, -+ mxs_adc->ain_base + HW_AUDIOIN_CTRL_SET); -+ -+ /* Unmute ADC channels */ -+ __raw_writel(BM_AUDIOIN_ADCVOL_MUTE, -+ mxs_adc->ain_base + HW_AUDIOIN_ADCVOL_CLR); -+ -+ /* -+ * The MUTE_LEFT and MUTE_RIGHT fields need to be cleared. -+ * They aren't presented in the datasheet, so this is hardcode. -+ */ -+ __raw_writel(0x01000100, mxs_adc->ain_base + HW_AUDIOIN_ADCVOLUME_CLR); -+ -+ /* Set the Input channel gain 3dB */ -+ __raw_writel(BM_AUDIOIN_ADCVOL_GAIN_LEFT, -+ mxs_adc->ain_base + HW_AUDIOIN_ADCVOL_CLR); -+ __raw_writel(BM_AUDIOIN_ADCVOL_GAIN_RIGHT, -+ mxs_adc->ain_base + HW_AUDIOIN_ADCVOL_CLR); -+ __raw_writel(BF(2, AUDIOIN_ADCVOL_GAIN_LEFT), -+ mxs_adc->ain_base + HW_AUDIOIN_ADCVOL_SET); -+ __raw_writel(BF(2, AUDIOIN_ADCVOL_GAIN_RIGHT), -+ mxs_adc->ain_base + HW_AUDIOIN_ADCVOL_SET); -+ -+ /* Select default input - Microphone */ -+ __raw_writel(BM_AUDIOIN_ADCVOL_SELECT_LEFT, -+ mxs_adc->ain_base + HW_AUDIOIN_ADCVOL_CLR); -+ __raw_writel(BM_AUDIOIN_ADCVOL_SELECT_RIGHT, -+ mxs_adc->ain_base + HW_AUDIOIN_ADCVOL_CLR); -+ __raw_writel(BF -+ (BV_AUDIOIN_ADCVOL_SELECT__MIC, -+ AUDIOIN_ADCVOL_SELECT_LEFT), -+ mxs_adc->ain_base + HW_AUDIOIN_ADCVOL_SET); -+ __raw_writel(BF -+ (BV_AUDIOIN_ADCVOL_SELECT__MIC, -+ AUDIOIN_ADCVOL_SELECT_RIGHT), -+ mxs_adc->ain_base + HW_AUDIOIN_ADCVOL_SET); -+ -+ /* Supply bias voltage to microphone */ -+ __raw_writel(BF(1, AUDIOIN_MICLINE_MIC_RESISTOR), -+ mxs_adc->ain_base + HW_AUDIOIN_MICLINE_SET); -+ __raw_writel(BM_AUDIOIN_MICLINE_MIC_SELECT, -+ mxs_adc->ain_base + HW_AUDIOIN_MICLINE_SET); -+ __raw_writel(BF(1, AUDIOIN_MICLINE_MIC_GAIN), -+ mxs_adc->ain_base + HW_AUDIOIN_MICLINE_SET); -+ __raw_writel(BF(7, AUDIOIN_MICLINE_MIC_BIAS), -+ mxs_adc->ain_base + HW_AUDIOIN_MICLINE_SET); -+ -+ /* Set max ADC volume */ -+ reg = __raw_readl(mxs_adc->ain_base + HW_AUDIOIN_ADCVOLUME); -+ reg &= ~BM_AUDIOIN_ADCVOLUME_VOLUME_LEFT; -+ reg &= ~BM_AUDIOIN_ADCVOLUME_VOLUME_RIGHT; -+ reg |= BF(ADC_VOLUME_MAX, AUDIOIN_ADCVOLUME_VOLUME_LEFT); -+ reg |= BF(ADC_VOLUME_MAX, AUDIOIN_ADCVOLUME_VOLUME_RIGHT); -+ __raw_writel(reg, mxs_adc->ain_base + HW_AUDIOIN_ADCVOLUME); -+} -+ -+static void -+mxs_codec_adc_power_down(struct mxs_adc_priv *mxs_adc) -+{ -+ /* Mute ADC channels */ -+ __raw_writel(BM_AUDIOIN_ADCVOL_MUTE, -+ mxs_adc->ain_base + HW_AUDIOIN_ADCVOL_SET); -+ -+ /* Power Down ADC */ -+ __raw_writel(BM_AUDIOOUT_PWRDN_ADC | BM_AUDIOOUT_PWRDN_RIGHT_ADC, -+ mxs_adc->aout_base + HW_AUDIOOUT_PWRDN_SET); -+ -+ /* Gate ADC clocks */ -+ __raw_writel(BM_AUDIOIN_CTRL_CLKGATE, -+ mxs_adc->ain_base + HW_AUDIOIN_CTRL_SET); -+ __raw_writel(BM_AUDIOIN_ANACLKCTRL_CLKGATE, -+ mxs_adc->ain_base + HW_AUDIOIN_ANACLKCTRL_SET); -+ -+ /* Disable bias voltage to microphone */ -+ __raw_writel(BF(0, AUDIOIN_MICLINE_MIC_RESISTOR), -+ mxs_adc->ain_base + HW_AUDIOIN_MICLINE_SET); -+} -+ -+static void mxs_codec_dac_enable(struct mxs_adc_priv *mxs_adc) -+{ -+ /* Move DAC codec out of reset */ -+ __raw_writel(BM_AUDIOOUT_CTRL_SFTRST, -+ mxs_adc->aout_base + HW_AUDIOOUT_CTRL_CLR); -+ -+ /* Reduce analog power */ -+ __raw_writel(BM_AUDIOOUT_TEST_HP_I1_ADJ, -+ mxs_adc->aout_base + HW_AUDIOOUT_TEST_CLR); -+ __raw_writel(BF(0x1, AUDIOOUT_TEST_HP_I1_ADJ), -+ mxs_adc->aout_base + HW_AUDIOOUT_TEST_SET); -+ __raw_writel(BM_AUDIOOUT_REFCTRL_LOW_PWR, -+ mxs_adc->aout_base + HW_AUDIOOUT_REFCTRL_SET); -+ __raw_writel(BM_AUDIOOUT_REFCTRL_XTAL_BGR_BIAS, -+ mxs_adc->aout_base + HW_AUDIOOUT_REFCTRL_SET); -+ __raw_writel(BM_AUDIOOUT_REFCTRL_BIAS_CTRL, -+ mxs_adc->aout_base + HW_AUDIOOUT_REFCTRL_CLR); -+ __raw_writel(BF(0x1, AUDIOOUT_REFCTRL_BIAS_CTRL), -+ mxs_adc->aout_base + HW_AUDIOOUT_REFCTRL_CLR); -+ -+ /* Set Vag value */ -+ mxs_codec_dac_set_vag(mxs_adc); -+ -+ /* Power on DAC codec */ -+ mxs_codec_dac_power_on(mxs_adc); -+} -+ -+static void mxs_codec_dac_disable(struct mxs_adc_priv *mxs_adc) -+{ -+ mxs_codec_dac_power_down(mxs_adc); -+} -+ -+static void mxs_codec_adc_enable(struct mxs_adc_priv *mxs_adc) -+{ -+ /* Move ADC codec out of reset */ -+ __raw_writel(BM_AUDIOIN_CTRL_SFTRST, -+ mxs_adc->ain_base + HW_AUDIOIN_CTRL_CLR); -+ -+ /* Power on ADC codec */ -+ mxs_codec_adc_power_on(mxs_adc); -+} -+ -+static void mxs_codec_adc_disable(struct mxs_adc_priv *mxs_adc) -+{ -+ mxs_codec_adc_power_down(mxs_adc); -+} -+ -+static void mxs_codec_startup(struct snd_soc_codec *codec) -+{ -+ struct mxs_adc_priv *mxs_adc = snd_soc_codec_get_drvdata(codec); -+ -+ /* Soft reset DAC block */ -+ __raw_writel(BM_AUDIOOUT_CTRL_SFTRST, -+ mxs_adc->aout_base + HW_AUDIOOUT_CTRL_SET); -+ while (!(__raw_readl(mxs_adc->aout_base + HW_AUDIOOUT_CTRL) -+ & BM_AUDIOOUT_CTRL_CLKGATE)){ -+ } -+ -+ /* Soft reset ADC block */ -+ __raw_writel(BM_AUDIOIN_CTRL_SFTRST, -+ mxs_adc->ain_base + HW_AUDIOIN_CTRL_SET); -+ while (!(__raw_readl(mxs_adc->ain_base + HW_AUDIOIN_CTRL) -+ & BM_AUDIOIN_CTRL_CLKGATE)){ -+ } -+ -+ mxs_codec_dac_enable(mxs_adc); -+ mxs_codec_adc_enable(mxs_adc); -+ -+ /* Sync regs and cache */ -+ mxs_codec_sync_reg_cache(codec); -+} -+ -+static void mxs_codec_stop(struct snd_soc_codec *codec) -+{ -+ struct mxs_adc_priv *mxs_adc = snd_soc_codec_get_drvdata(codec); -+ -+ mxs_codec_dac_disable(mxs_adc); -+ mxs_codec_adc_disable(mxs_adc); -+} -+/* END Codec routines */ -+ -+/* kcontrol */ -+static int dac_info_volsw(struct snd_kcontrol *kcontrol, -+ struct snd_ctl_elem_info *uinfo) -+{ -+ uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; -+ uinfo->count = 2; -+ uinfo->value.integer.min = 0; -+ uinfo->value.integer.max = 0xf; -+ return 0; -+} -+ -+static int dac_get_volsw(struct snd_kcontrol *kcontrol, -+ struct snd_ctl_elem_value *ucontrol) -+{ -+ struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); -+ struct mxs_adc_priv *mxs_adc = snd_soc_codec_get_drvdata(codec); -+ int reg, l, r; -+ int i; -+ -+ reg = __raw_readl(mxs_adc->aout_base + HW_AUDIOOUT_DACVOLUME); -+ -+ l = (reg & BM_AUDIOOUT_DACVOLUME_VOLUME_LEFT) >> -+ BP_AUDIOOUT_DACVOLUME_VOLUME_LEFT; -+ r = (reg & BM_AUDIOOUT_DACVOLUME_VOLUME_RIGHT) >> -+ BP_AUDIOOUT_DACVOLUME_VOLUME_RIGHT; -+ /*Left channel */ -+ i = 0; -+ while (i < 16) { -+ if (l == dac_volumn_control_word[i]) { -+ ucontrol->value.integer.value[0] = i; -+ break; -+ } -+ i++; -+ } -+ if (i == 16) -+ ucontrol->value.integer.value[0] = i; -+ /*Right channel */ -+ i = 0; -+ while (i < 16) { -+ if (r == dac_volumn_control_word[i]) { -+ ucontrol->value.integer.value[1] = i; -+ break; -+ } -+ i++; -+ } -+ if (i == 16) -+ ucontrol->value.integer.value[1] = i; -+ -+ return 0; -+} -+ -+static int dac_put_volsw(struct snd_kcontrol *kcontrol, -+ struct snd_ctl_elem_value *ucontrol) -+{ -+ struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); -+ struct mxs_adc_priv *mxs_adc = snd_soc_codec_get_drvdata(codec); -+ int reg, l, r; -+ int i; -+ -+ i = ucontrol->value.integer.value[0]; -+ l = dac_volumn_control_word[i]; -+ /*Get dac volume for left channel */ -+ reg = BF(l, AUDIOOUT_DACVOLUME_VOLUME_LEFT); -+ -+ i = ucontrol->value.integer.value[1]; -+ r = dac_volumn_control_word[i]; -+ /*Get dac volume for right channel */ -+ reg = reg | BF(r, AUDIOOUT_DACVOLUME_VOLUME_RIGHT); -+ -+ /*Clear left/right dac volume */ -+ __raw_writel(BM_AUDIOOUT_DACVOLUME_VOLUME_LEFT | -+ BM_AUDIOOUT_DACVOLUME_VOLUME_RIGHT, -+ mxs_adc->aout_base + HW_AUDIOOUT_DACVOLUME_CLR); -+ __raw_writel(reg, mxs_adc->aout_base + HW_AUDIOOUT_DACVOLUME_SET); -+ -+ return 0; -+} -+ -+static const char *mxs_codec_adc_input_sel[] = { -+ "Mic", "Line In 1", "Head Phone", "Line In 2" }; -+ -+static const char *mxs_codec_hp_output_sel[] = { "DAC Out", "Line In 1" }; -+ -+static const char *mxs_codec_adc_3d_sel[] = { -+ "Off", "Low", "Medium", "High" }; -+ -+static const struct soc_enum mxs_codec_enum[] = { -+ SOC_ENUM_SINGLE(ADC_ADCVOL_L, 12, 4, mxs_codec_adc_input_sel), -+ SOC_ENUM_SINGLE(ADC_ADCVOL_L, 4, 4, mxs_codec_adc_input_sel), -+ SOC_ENUM_SINGLE(DAC_HPVOL_H, 0, 2, mxs_codec_hp_output_sel), -+ SOC_ENUM_SINGLE(DAC_CTRL_L, 8, 4, mxs_codec_adc_3d_sel), -+}; -+ -+static const struct snd_kcontrol_new mxs_snd_controls[] = { -+ /* Playback Volume */ -+ { -+ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, -+ .name = "DAC Playback Volume", -+ .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | -+ SNDRV_CTL_ELEM_ACCESS_VOLATILE, -+ .info = dac_info_volsw, -+ .get = dac_get_volsw, -+ .put = dac_put_volsw, -+ }, -+ -+ SOC_DOUBLE_R("DAC Playback Switch", -+ DAC_VOLUME_H, DAC_VOLUME_L, 8, 0x01, 1), -+ SOC_DOUBLE("HP Playback Volume", DAC_HPVOL_L, 8, 0, 0x7F, 1), -+ -+ /* Capture Volume */ -+ SOC_DOUBLE_R("ADC Capture Volume", -+ ADC_VOLUME_H, ADC_VOLUME_L, 0, 0xFF, 0), -+ SOC_DOUBLE("ADC PGA Capture Volume", ADC_ADCVOL_L, 8, 0, 0x0F, 0), -+ SOC_SINGLE("ADC PGA Capture Switch", ADC_ADCVOL_H, 8, 0x1, 1), -+ SOC_SINGLE("Mic PGA Capture Volume", ADC_MICLINE_L, 0, 0x03, 0), -+ -+ /* Virtual 3D effect */ -+ SOC_ENUM("3D effect", mxs_codec_enum[3]), -+}; -+/* END kcontrol */ -+ -+/* DAPM */ -+static int pga_event(struct snd_soc_dapm_widget *w, -+ struct snd_kcontrol *kcontrol, int event) -+{ -+ struct mxs_adc_priv *mxs_adc = snd_soc_codec_get_drvdata(snd_soc_dapm_to_codec(w->dapm)); -+ -+ switch (event) { -+ case SND_SOC_DAPM_PRE_PMU: -+ /* Prepare powering up HP and SPEAKER output */ -+ __raw_writel(BM_AUDIOOUT_ANACTRL_HP_HOLD_GND, -+ mxs_adc->aout_base + HW_AUDIOOUT_ANACTRL_SET); -+ __raw_writel(BM_RTC_PERSISTENT0_RELEASE_GND, -+ mxs_adc->rtc_base + HW_RTC_PERSISTENT0_SET); -+ msleep(100); -+ break; -+ case SND_SOC_DAPM_POST_PMU: -+ __raw_writel(BM_AUDIOOUT_ANACTRL_HP_HOLD_GND, -+ mxs_adc->aout_base + HW_AUDIOOUT_ANACTRL_CLR); -+ break; -+ case SND_SOC_DAPM_POST_PMD: -+ __raw_writel(BM_RTC_PERSISTENT0_RELEASE_GND, -+ mxs_adc->rtc_base + HW_RTC_PERSISTENT0_CLR); -+ break; -+ } -+ return 0; -+} -+ -+static int adc_event(struct snd_soc_dapm_widget *w, -+ struct snd_kcontrol *kcontrol, int event) -+{ -+ struct mxs_adc_priv *mxs_adc = snd_soc_codec_get_drvdata(snd_soc_dapm_to_codec(w->dapm)); -+ -+ switch (event) { -+ case SND_SOC_DAPM_PRE_PMU: -+ __raw_writel(BM_RTC_PERSISTENT0_RELEASE_GND, -+ mxs_adc->rtc_base + HW_RTC_PERSISTENT0_SET); -+ msleep(100); -+ break; -+ case SND_SOC_DAPM_POST_PMD: -+ __raw_writel(BM_RTC_PERSISTENT0_RELEASE_GND, -+ mxs_adc->rtc_base + HW_RTC_PERSISTENT0_CLR); -+ break; -+ } -+ return 0; -+} -+ -+/* Left ADC Mux */ -+static const struct snd_kcontrol_new mxs_left_adc_controls = -+SOC_DAPM_ENUM("Route", mxs_codec_enum[0]); -+ -+/* Right ADC Mux */ -+static const struct snd_kcontrol_new mxs_right_adc_controls = -+SOC_DAPM_ENUM("Route", mxs_codec_enum[1]); -+ -+/* Head Phone Mux */ -+static const struct snd_kcontrol_new mxs_hp_controls = -+SOC_DAPM_ENUM("Route", mxs_codec_enum[2]); -+ -+static const struct snd_soc_dapm_widget mxs_dapm_widgets[] = { -+ SND_SOC_DAPM_ADC_E("ADC", "Capture", DAC_PWRDN_L, 8, 1, adc_event, -+ SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD), -+ -+ SND_SOC_DAPM_DAC("DAC", "Playback", DAC_PWRDN_L, 12, 1), -+ -+ SND_SOC_DAPM_MUX("Left ADC Mux", SND_SOC_NOPM, 0, 0, -+ &mxs_left_adc_controls), -+ SND_SOC_DAPM_MUX("Right ADC Mux", SND_SOC_NOPM, 0, 0, -+ &mxs_right_adc_controls), -+ SND_SOC_DAPM_MUX("HP Mux", SND_SOC_NOPM, 0, 0, -+ &mxs_hp_controls), -+ SND_SOC_DAPM_PGA_E("HP AMP", DAC_PWRDN_L, 0, 1, NULL, 0, pga_event, -+ SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU | -+ SND_SOC_DAPM_POST_PMD), -+ SND_SOC_DAPM_PGA("SPEAKER AMP", DAC_PWRDN_H, 8, 1, NULL, 0), -+ SND_SOC_DAPM_INPUT("LINE1L"), -+ SND_SOC_DAPM_INPUT("LINE1R"), -+ SND_SOC_DAPM_INPUT("LINE2L"), -+ SND_SOC_DAPM_INPUT("LINE2R"), -+ SND_SOC_DAPM_INPUT("MIC"), -+ -+ SND_SOC_DAPM_OUTPUT("SPEAKER"), -+ SND_SOC_DAPM_OUTPUT("HPL"), -+ SND_SOC_DAPM_OUTPUT("HPR"), -+}; -+ -+/* routes for sgtl5000 */ -+static const struct snd_soc_dapm_route mxs_dapm_routes[] = { -+ /* Left ADC Mux */ -+ {"Left ADC Mux", "Mic", "MIC"}, -+ {"Left ADC Mux", "Line In 1", "LINE1L"}, -+ {"Left ADC Mux", "Line In 2", "LINE2L"}, -+ {"Left ADC Mux", "Head Phone", "HPL"}, -+ -+ /* Right ADC Mux */ -+ {"Right ADC Mux", "Mic", "MIC"}, -+ {"Right ADC Mux", "Line In 1", "LINE1R"}, -+ {"Right ADC Mux", "Line In 2", "LINE2R"}, -+ {"Right ADC Mux", "Head Phone", "HPR"}, -+ -+ /* ADC */ -+ {"ADC", NULL, "Left ADC Mux"}, -+ {"ADC", NULL, "Right ADC Mux"}, -+ -+ /* HP Mux */ -+ {"HP Mux", "DAC Out", "DAC"}, -+ {"HP Mux", "Line In 1", "LINE1L"}, -+ {"HP Mux", "Line In 1", "LINE1R"}, -+ -+ /* HP amp */ -+ {"HP AMP", NULL, "HP Mux"}, -+ /* HP output */ -+ {"HPR", NULL, "HP AMP"}, -+ {"HPL", NULL, "HP AMP"}, -+ -+ /* Speaker amp */ -+ {"SPEAKER AMP", NULL, "DAC"}, -+ {"SPEAKER", NULL, "SPEAKER AMP"}, -+}; -+/* END DAPM */ -+ -+static int mxs_set_bias_level(struct snd_soc_codec *codec, -+ enum snd_soc_bias_level level) -+{ -+ struct mxs_adc_priv *mxs_adc = snd_soc_codec_get_drvdata(codec); -+ -+ pr_debug("dapm level %d\n", level); -+ switch (level) { -+ case SND_SOC_BIAS_ON: /* full On */ -+ if (codec->dapm.bias_level == SND_SOC_BIAS_ON) -+ break; -+ break; -+ -+ case SND_SOC_BIAS_PREPARE: /* partial On */ -+ if (codec->dapm.bias_level == SND_SOC_BIAS_PREPARE) -+ break; -+ /* Set Capless mode */ -+ __raw_writel(BM_AUDIOOUT_PWRDN_CAPLESS, -+ mxs_adc->aout_base + HW_AUDIOOUT_PWRDN_CLR); -+ break; -+ -+ case SND_SOC_BIAS_STANDBY: /* Off, with power */ -+ if (codec->dapm.bias_level == SND_SOC_BIAS_STANDBY) -+ break; -+ /* Unset Capless mode */ -+ __raw_writel(BM_AUDIOOUT_PWRDN_CAPLESS, -+ mxs_adc->aout_base + HW_AUDIOOUT_PWRDN_SET); -+ break; -+ -+ case SND_SOC_BIAS_OFF: /* Off, without power */ -+ if (codec->dapm.bias_level == SND_SOC_BIAS_OFF) -+ break; -+ /* Unset Capless mode */ -+ __raw_writel(BM_AUDIOOUT_PWRDN_CAPLESS, -+ mxs_adc->aout_base + HW_AUDIOOUT_PWRDN_SET); -+ break; -+ } -+ -+ codec->dapm.bias_level = level; -+ return 0; -+} -+ -+/* MXS-ADC Codec DAI driver */ -+static int mxs_pcm_hw_params(struct snd_pcm_substream *substream, -+ struct snd_pcm_hw_params *params, -+ struct snd_soc_dai *dai) -+{ -+ struct snd_soc_codec *codec = dai->codec; -+ struct mxs_adc_priv *mxs_adc = snd_soc_codec_get_drvdata(codec); -+ int playback = substream->stream == SNDRV_PCM_STREAM_PLAYBACK ? 1 : 0; -+ int i; -+ u32 srr_value = 0; -+ u32 src_hold = 0; -+ -+ i = get_srr_values(params_rate(params)); -+ if (i < 0) -+ dev_warn(codec->dev, "codec doesn't support rate %d\n", -+ params_rate(params)); -+ else { -+ src_hold = srr_values[i].src_hold; -+ -+ srr_value = -+ BF(srr_values[i].basemult, AUDIOOUT_DACSRR_BASEMULT) | -+ BF(srr_values[i].src_int, AUDIOOUT_DACSRR_SRC_INT) | -+ BF(srr_values[i].src_frac, AUDIOOUT_DACSRR_SRC_FRAC) | -+ BF(src_hold, AUDIOOUT_DACSRR_SRC_HOLD); -+ -+ if (playback) -+ __raw_writel(srr_value, -+ mxs_adc->aout_base + HW_AUDIOOUT_DACSRR); -+ else -+ __raw_writel(srr_value, -+ mxs_adc->ain_base + HW_AUDIOIN_ADCSRR); -+ } -+ -+ switch (params_format(params)) { -+ case SNDRV_PCM_FORMAT_S16_LE: -+ if (playback) -+ __raw_writel(BM_AUDIOOUT_CTRL_WORD_LENGTH, -+ mxs_adc->aout_base + HW_AUDIOOUT_CTRL_SET); -+ else -+ __raw_writel(BM_AUDIOIN_CTRL_WORD_LENGTH, -+ mxs_adc->ain_base + HW_AUDIOIN_CTRL_SET); -+ -+ break; -+ -+ case SNDRV_PCM_FORMAT_S32_LE: -+ if (playback) -+ __raw_writel(BM_AUDIOOUT_CTRL_WORD_LENGTH, -+ mxs_adc->aout_base + HW_AUDIOOUT_CTRL_CLR); -+ else -+ __raw_writel(BM_AUDIOIN_CTRL_WORD_LENGTH, -+ mxs_adc->ain_base + HW_AUDIOIN_CTRL_CLR); -+ -+ break; -+ -+ default: -+ dev_warn(codec->dev, "codec doesn't support format %d\n", -+ params_format(params)); -+ -+ } -+ -+ return 0; -+} -+ -+/* mute the codec used by alsa core */ -+static int mxs_codec_dig_mute(struct snd_soc_dai *codec_dai, int mute) -+{ -+ struct mxs_adc_priv *mxs_adc = snd_soc_codec_get_drvdata(codec_dai->codec); -+ int l, r; -+ int ll, rr; -+ u32 reg, reg1, reg2; -+ u32 dac_mask = BM_AUDIOOUT_DACVOLUME_MUTE_LEFT | -+ BM_AUDIOOUT_DACVOLUME_MUTE_RIGHT; -+ -+ if (mute) { -+ reg = __raw_readl(mxs_adc->aout_base + \ -+ HW_AUDIOOUT_DACVOLUME); -+ -+ reg1 = reg & ~BM_AUDIOOUT_DACVOLUME_VOLUME_LEFT; -+ reg1 = reg1 & ~BM_AUDIOOUT_DACVOLUME_VOLUME_RIGHT; -+ -+ l = (reg & BM_AUDIOOUT_DACVOLUME_VOLUME_LEFT) >> -+ BP_AUDIOOUT_DACVOLUME_VOLUME_LEFT; -+ r = (reg & BM_AUDIOOUT_DACVOLUME_VOLUME_RIGHT) >> -+ BP_AUDIOOUT_DACVOLUME_VOLUME_RIGHT; -+ -+ /* fade out dac vol */ -+ while ((l > DAC_VOLUME_MIN) || (r > DAC_VOLUME_MIN)) { -+ l -= 0x8; -+ r -= 0x8; -+ ll = l > DAC_VOLUME_MIN ? l : DAC_VOLUME_MIN; -+ rr = r > DAC_VOLUME_MIN ? r : DAC_VOLUME_MIN; -+ reg2 = reg1 | BF_AUDIOOUT_DACVOLUME_VOLUME_LEFT(ll) -+ | BF_AUDIOOUT_DACVOLUME_VOLUME_RIGHT(rr); -+ __raw_writel(reg2, -+ mxs_adc->aout_base + HW_AUDIOOUT_DACVOLUME); -+ msleep(1); -+ } -+ -+ __raw_writel(dac_mask, -+ mxs_adc->aout_base + HW_AUDIOOUT_DACVOLUME_SET); -+ reg = reg | dac_mask; -+ __raw_writel(reg, -+ mxs_adc->aout_base + HW_AUDIOOUT_DACVOLUME); -+ } else -+ __raw_writel(dac_mask, -+ mxs_adc->aout_base + HW_AUDIOOUT_DACVOLUME_CLR); -+ -+ return 0; -+} -+ -+#define MXS_ADC_RATES SNDRV_PCM_RATE_8000_192000 -+#define MXS_ADC_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE) -+ -+static const struct snd_soc_dai_ops mxs_codec_dai_ops = { -+ .hw_params = mxs_pcm_hw_params, -+ .digital_mute = mxs_codec_dig_mute, -+}; -+ -+static struct snd_soc_dai_driver mxs_codec_dai_driver = { -+ .name = "mxs-builtin-codec-dai", -+ .playback = { -+ .stream_name = "Playback", -+ .channels_min = 2, -+ .channels_max = 2, -+ .rates = MXS_ADC_RATES, -+ .formats = MXS_ADC_FORMATS, -+ }, -+ .capture = { -+ .stream_name = "Capture", -+ .channels_min = 2, -+ .channels_max = 2, -+ .rates = MXS_ADC_RATES, -+ .formats = MXS_ADC_FORMATS, -+ }, -+ .ops = &mxs_codec_dai_ops, -+}; -+/* END MXS-ADC Codec DAI driver */ -+ -+/* MXS-ADC Codec driver */ -+static int mxs_codec_driver_probe(struct snd_soc_codec *codec) -+{ -+ int ret = 0; -+ /* We don't use snd_soc_codec_set_cache_io because we are using -+ * our own IO functions: write, read. */ -+ -+ mxs_codec_startup(codec); -+ -+ /* leading to standby state */ -+ ret = mxs_set_bias_level(codec, SND_SOC_BIAS_STANDBY); -+ if (ret) -+ goto err; -+ -+ return 0; -+ -+err: -+ mxs_codec_stop(codec); -+ -+ return ret; -+} -+ -+static int mxs_codec_driver_remove(struct snd_soc_codec *codec) -+{ -+ mxs_codec_stop(codec); -+ -+ return 0; -+} -+ -+// static int mxs_codec_driver_suspend(struct snd_soc_codec *codec) -+// { -+// /* TODO Enable power management. */ -+// return 0; -+// } -+ -+// static int mxs_codec_driver_resume(struct snd_soc_codec *codec) -+// { -+// /* TODO Enable power management. */ -+// return 0; -+// } -+ -+static struct snd_soc_codec_driver mxs_codec_driver = { -+ .probe = mxs_codec_driver_probe, -+ .remove = mxs_codec_driver_remove, -+// .suspend = mxs_codec_driver_suspend, -+// .resume = mxs_codec_driver_resume, -+ .set_bias_level = mxs_set_bias_level, -+ .reg_cache_size = ADC_REGNUM, -+ .reg_word_size = sizeof(u16), -+ .reg_cache_step = 1, -+// .reg_cache_default = mxsadc_regs, -+// .volatile_register = sgtl5000_volatile_register, -+ .controls = mxs_snd_controls, -+ .num_controls = ARRAY_SIZE(mxs_snd_controls), -+ .dapm_widgets = mxs_dapm_widgets, -+ .num_dapm_widgets = ARRAY_SIZE(mxs_dapm_widgets), -+ .dapm_routes = mxs_dapm_routes, -+ .num_dapm_routes = ARRAY_SIZE(mxs_dapm_routes), -+ .write = mxs_codec_write, -+ .read = mxs_codec_read, -+}; -+/* END MXS-ADC Codec driver */ -+ -+/* Underlying platform device that registers codec */ -+static int mxs_adc_probe(struct platform_device *pdev) -+{ -+ struct mxs_adc_priv *mxs_adc; -+ struct resource *r; -+ int ret; -+ -+ mxs_adc = devm_kzalloc(&pdev->dev, sizeof(struct mxs_adc_priv), GFP_KERNEL); -+ if (!mxs_adc) -+ return -ENOMEM; -+ -+ platform_set_drvdata(pdev, mxs_adc); -+ -+ /* audio-in IO memory */ -+ r = platform_get_resource_byname(pdev, IORESOURCE_MEM, "audioin"); -+ if (IS_ERR(r)) { -+ dev_err(&pdev->dev, "failed to get resource\n"); -+ return PTR_ERR(r); -+ } -+ -+ mxs_adc->ain_base = devm_ioremap(&pdev->dev, r->start, resource_size(r)); -+ if (IS_ERR(mxs_adc->ain_base)) { -+ dev_err(&pdev->dev, "ioremap failed\n"); -+ return PTR_ERR(mxs_adc->ain_base); -+ } -+ -+ /* audio-out IO memory */ -+ r = platform_get_resource_byname(pdev, IORESOURCE_MEM, "audioout"); -+ if (IS_ERR(r)) { -+ dev_err(&pdev->dev, "failed to get resource\n"); -+ return PTR_ERR(r); -+ } -+ -+ mxs_adc->aout_base = devm_ioremap(&pdev->dev, r->start, resource_size(r)); -+ if (IS_ERR(mxs_adc->aout_base)) { -+ dev_err(&pdev->dev, "ioremap failed\n"); -+ return PTR_ERR(mxs_adc->aout_base); -+ } -+ -+ /* rtc IO memory */ -+ r = platform_get_resource_byname(pdev, IORESOURCE_MEM, "rtc"); -+ if (IS_ERR(r)) { -+ dev_err(&pdev->dev, "failed to get resource\n"); -+ return PTR_ERR(r); -+ } -+ -+ mxs_adc->rtc_base = devm_ioremap(&pdev->dev, r->start, resource_size(r)); -+ if (IS_ERR(mxs_adc->rtc_base)) { -+ dev_err(&pdev->dev, "ioremap failed\n"); -+ return PTR_ERR(mxs_adc->rtc_base); -+ } -+ -+ /* Get audio clock */ -+ mxs_adc->clk = devm_clk_get(&pdev->dev, "filt"); -+ if (IS_ERR(mxs_adc->clk)) { -+ ret = PTR_ERR(mxs_adc->clk); -+ dev_err(&pdev->dev, "%s: Clock initialization failed\n", __func__); -+ return ret; -+ } -+ -+ /* Turn on audio clock */ -+ ret = clk_prepare_enable(mxs_adc->clk); -+ if (unlikely(ret != 0)) { -+ dev_err(&pdev->dev, "%s: Clock prepare or enable failed\n", __func__); -+ return ret; -+ } -+ -+ ret = snd_soc_register_codec(&pdev->dev, -+ &mxs_codec_driver,&mxs_codec_dai_driver, 1); -+ if (unlikely(ret != 0)) { -+ dev_err(&pdev->dev, "Codec registration failed\n"); -+ goto disable_clk; -+ } -+ -+ return 0; -+ -+disable_clk: -+ clk_disable_unprepare(mxs_adc->clk); -+ return ret; -+} -+ -+static int mxs_adc_remove(struct platform_device *pdev) -+{ -+ struct mxs_adc_priv *mxs_adc = platform_get_drvdata(pdev); -+ -+ clk_disable_unprepare(mxs_adc->clk); -+ snd_soc_unregister_codec(&pdev->dev); -+ -+ return 0; -+} -+ -+static const struct of_device_id mxs_adc_dt_ids[] = { -+ { .compatible = "fsl,mxs-builtin-codec", }, -+ { /* sentinel */ } -+}; -+MODULE_DEVICE_TABLE(of, mxs_adc_dt_ids); -+ -+static struct platform_driver mxs_adc_driver = { -+ .driver = { -+ .name = "mxs-builtin-codec", -+ .owner = THIS_MODULE, -+ .of_match_table = mxs_adc_dt_ids, -+ }, -+ .probe = mxs_adc_probe, -+ .remove = mxs_adc_remove, -+}; -+ -+module_platform_driver(mxs_adc_driver); -+/* END Underlying platform device that registers codec */ -+ -+MODULE_DESCRIPTION("Freescale MXS ADC/DAC SoC Codec Driver"); -+MODULE_AUTHOR("Michal Ulianko "); -+MODULE_LICENSE("GPL"); -diff --git a/sound/soc/codecs/mxs-builtin-codec.h b/sound/soc/codecs/mxs-builtin-codec.h -new file mode 100644 -index 0000000..75dee0b ---- /dev/null -+++ b/sound/soc/codecs/mxs-builtin-codec.h -@@ -0,0 +1,825 @@ -+#ifndef __MXS_ADC_CODEC_H -+ -+#include -+ -+/* MXS ADC/DAC registers */ -+#define DAC_CTRL_L 0 -+#define DAC_CTRL_H 1 -+#define DAC_STAT_L 2 -+#define DAC_STAT_H 3 -+#define DAC_SRR_L 4 -+#define DAC_VOLUME_L 6 -+#define DAC_VOLUME_H 7 -+#define DAC_DEBUG_L 8 -+#define DAC_DEBUG_H 9 -+#define DAC_HPVOL_L 10 -+#define DAC_HPVOL_H 11 -+#define DAC_PWRDN_L 12 -+#define DAC_PWRDN_H 13 -+#define DAC_REFCTRL_L 14 -+#define DAC_REFCTRL_H 15 -+#define DAC_ANACTRL_L 16 -+#define DAC_ANACTRL_H 17 -+#define DAC_TEST_L 18 -+#define DAC_TEST_H 19 -+#define DAC_BISTCTRL_L 20 -+#define DAC_BISTCTRL_H 21 -+#define DAC_BISTSTAT0_L 22 -+#define DAC_BISTSTAT0_H 23 -+#define DAC_BISTSTAT1_L 24 -+#define DAC_BISTSTAT1_H 25 -+#define DAC_ANACLKCTRL_L 26 -+#define DAC_ANACLKCTRL_H 27 -+#define DAC_DATA_L 28 -+#define DAC_DATA_H 29 -+#define DAC_SPEAKERCTRL_L 30 -+#define DAC_SPEAKERCTRL_H 31 -+#define DAC_VERSION_L 32 -+#define DAC_VERSION_H 33 -+#define ADC_CTRL_L 34 -+#define ADC_CTRL_H 35 -+#define ADC_STAT_L 36 -+#define ADC_STAT_H 37 -+#define ADC_SRR_L 38 -+#define ADC_SRR_H 39 -+#define ADC_VOLUME_L 40 -+#define ADC_VOLUME_H 41 -+#define ADC_DEBUG_L 42 -+#define ADC_DEBUG_H 43 -+#define ADC_ADCVOL_L 44 -+#define ADC_ADCVOL_H 45 -+#define ADC_MICLINE_L 46 -+#define ADC_MICLINE_H 47 -+#define ADC_ANACLKCTRL_L 48 -+#define ADC_ANACLKCTRL_H 49 -+#define ADC_DATA_L 50 -+#define ADC_DATA_H 51 -+ -+#define ADC_REGNUM 52 -+ -+#define DAC_VOLUME_MIN 0x37 -+#define DAC_VOLUME_MAX 0xFE -+#define ADC_VOLUME_MIN 0x37 -+#define ADC_VOLUME_MAX 0xFE -+#define HP_VOLUME_MAX 0x0 -+#define HP_VOLUME_MIN 0x7F -+#define LO_VOLUME_MAX 0x0 -+#define LO_VOLUME_MIN 0x1F -+ -+/* RTC */ -+#define HW_RTC_PERSISTENT0 (0x00000060) -+#define HW_RTC_PERSISTENT0_SET (0x00000064) -+#define HW_RTC_PERSISTENT0_CLR (0x00000068) -+#define HW_RTC_PERSISTENT0_TOG (0x0000006c) -+ -+// TODO -+//#define BM_RTC_PERSISTENT0_RELEASE_GND 0x00080000 -+ -+/* AUDIOOUT */ -+#define HW_AUDIOOUT_CTRL (0x00000000) -+#define HW_AUDIOOUT_CTRL_SET (0x00000004) -+#define HW_AUDIOOUT_CTRL_CLR (0x00000008) -+#define HW_AUDIOOUT_CTRL_TOG (0x0000000c) -+ -+#define BM_AUDIOOUT_CTRL_SFTRST 0x80000000 -+#define BM_AUDIOOUT_CTRL_CLKGATE 0x40000000 -+#define BP_AUDIOOUT_CTRL_RSRVD4 21 -+#define BM_AUDIOOUT_CTRL_RSRVD4 0x3FE00000 -+#define BF_AUDIOOUT_CTRL_RSRVD4(v) \ -+ (((v) << 21) & BM_AUDIOOUT_CTRL_RSRVD4) -+#define BP_AUDIOOUT_CTRL_DMAWAIT_COUNT 16 -+#define BM_AUDIOOUT_CTRL_DMAWAIT_COUNT 0x001F0000 -+#define BF_AUDIOOUT_CTRL_DMAWAIT_COUNT(v) \ -+ (((v) << 16) & BM_AUDIOOUT_CTRL_DMAWAIT_COUNT) -+#define BM_AUDIOOUT_CTRL_RSRVD3 0x00008000 -+#define BM_AUDIOOUT_CTRL_LR_SWAP 0x00004000 -+#define BM_AUDIOOUT_CTRL_EDGE_SYNC 0x00002000 -+#define BM_AUDIOOUT_CTRL_INVERT_1BIT 0x00001000 -+#define BP_AUDIOOUT_CTRL_RSRVD2 10 -+#define BM_AUDIOOUT_CTRL_RSRVD2 0x00000C00 -+#define BF_AUDIOOUT_CTRL_RSRVD2(v) \ -+ (((v) << 10) & BM_AUDIOOUT_CTRL_RSRVD2) -+#define BP_AUDIOOUT_CTRL_SS3D_EFFECT 8 -+#define BM_AUDIOOUT_CTRL_SS3D_EFFECT 0x00000300 -+#define BF_AUDIOOUT_CTRL_SS3D_EFFECT(v) \ -+ (((v) << 8) & BM_AUDIOOUT_CTRL_SS3D_EFFECT) -+#define BM_AUDIOOUT_CTRL_RSRVD1 0x00000080 -+#define BM_AUDIOOUT_CTRL_WORD_LENGTH 0x00000040 -+#define BM_AUDIOOUT_CTRL_DAC_ZERO_ENABLE 0x00000020 -+#define BM_AUDIOOUT_CTRL_LOOPBACK 0x00000010 -+#define BM_AUDIOOUT_CTRL_FIFO_UNDERFLOW_IRQ 0x00000008 -+#define BM_AUDIOOUT_CTRL_FIFO_OVERFLOW_IRQ 0x00000004 -+#define BM_AUDIOOUT_CTRL_FIFO_ERROR_IRQ_EN 0x00000002 -+#define BM_AUDIOOUT_CTRL_RUN 0x00000001 -+ -+#define HW_AUDIOOUT_STAT (0x00000010) -+#define HW_AUDIOOUT_STAT_SET (0x00000014) -+#define HW_AUDIOOUT_STAT_CLR (0x00000018) -+#define HW_AUDIOOUT_STAT_TOG (0x0000001c) -+ -+#define BM_AUDIOOUT_STAT_DAC_PRESENT 0x80000000 -+#define BP_AUDIOOUT_STAT_RSRVD1 0 -+#define BM_AUDIOOUT_STAT_RSRVD1 0x7FFFFFFF -+#define BF_AUDIOOUT_STAT_RSRVD1(v) \ -+ (((v) << 0) & BM_AUDIOOUT_STAT_RSRVD1) -+ -+#define HW_AUDIOOUT_DACSRR (0x00000020) -+#define HW_AUDIOOUT_DACSRR_SET (0x00000024) -+#define HW_AUDIOOUT_DACSRR_CLR (0x00000028) -+#define HW_AUDIOOUT_DACSRR_TOG (0x0000002c) -+ -+#define BM_AUDIOOUT_DACSRR_OSR 0x80000000 -+#define BV_AUDIOOUT_DACSRR_OSR__OSR6 0x0 -+#define BV_AUDIOOUT_DACSRR_OSR__OSR12 0x1 -+#define BP_AUDIOOUT_DACSRR_BASEMULT 28 -+#define BM_AUDIOOUT_DACSRR_BASEMULT 0x70000000 -+#define BF_AUDIOOUT_DACSRR_BASEMULT(v) \ -+ (((v) << 28) & BM_AUDIOOUT_DACSRR_BASEMULT) -+#define BV_AUDIOOUT_DACSRR_BASEMULT__SINGLE_RATE 0x1 -+#define BV_AUDIOOUT_DACSRR_BASEMULT__DOUBLE_RATE 0x2 -+#define BV_AUDIOOUT_DACSRR_BASEMULT__QUAD_RATE 0x4 -+#define BM_AUDIOOUT_DACSRR_RSRVD2 0x08000000 -+#define BP_AUDIOOUT_DACSRR_SRC_HOLD 24 -+#define BM_AUDIOOUT_DACSRR_SRC_HOLD 0x07000000 -+#define BF_AUDIOOUT_DACSRR_SRC_HOLD(v) \ -+ (((v) << 24) & BM_AUDIOOUT_DACSRR_SRC_HOLD) -+#define BP_AUDIOOUT_DACSRR_RSRVD1 21 -+#define BM_AUDIOOUT_DACSRR_RSRVD1 0x00E00000 -+#define BF_AUDIOOUT_DACSRR_RSRVD1(v) \ -+ (((v) << 21) & BM_AUDIOOUT_DACSRR_RSRVD1) -+#define BP_AUDIOOUT_DACSRR_SRC_INT 16 -+#define BM_AUDIOOUT_DACSRR_SRC_INT 0x001F0000 -+#define BF_AUDIOOUT_DACSRR_SRC_INT(v) \ -+ (((v) << 16) & BM_AUDIOOUT_DACSRR_SRC_INT) -+#define BP_AUDIOOUT_DACSRR_RSRVD0 13 -+#define BM_AUDIOOUT_DACSRR_RSRVD0 0x0000E000 -+#define BF_AUDIOOUT_DACSRR_RSRVD0(v) \ -+ (((v) << 13) & BM_AUDIOOUT_DACSRR_RSRVD0) -+#define BP_AUDIOOUT_DACSRR_SRC_FRAC 0 -+#define BM_AUDIOOUT_DACSRR_SRC_FRAC 0x00001FFF -+#define BF_AUDIOOUT_DACSRR_SRC_FRAC(v) \ -+ (((v) << 0) & BM_AUDIOOUT_DACSRR_SRC_FRAC) -+ -+#define HW_AUDIOOUT_DACVOLUME (0x00000030) -+#define HW_AUDIOOUT_DACVOLUME_SET (0x00000034) -+#define HW_AUDIOOUT_DACVOLUME_CLR (0x00000038) -+#define HW_AUDIOOUT_DACVOLUME_TOG (0x0000003c) -+ -+#define BP_AUDIOOUT_DACVOLUME_RSRVD4 29 -+#define BM_AUDIOOUT_DACVOLUME_RSRVD4 0xE0000000 -+#define BF_AUDIOOUT_DACVOLUME_RSRVD4(v) \ -+ (((v) << 29) & BM_AUDIOOUT_DACVOLUME_RSRVD4) -+#define BM_AUDIOOUT_DACVOLUME_VOLUME_UPDATE_LEFT 0x10000000 -+#define BP_AUDIOOUT_DACVOLUME_RSRVD3 26 -+#define BM_AUDIOOUT_DACVOLUME_RSRVD3 0x0C000000 -+#define BF_AUDIOOUT_DACVOLUME_RSRVD3(v) \ -+ (((v) << 26) & BM_AUDIOOUT_DACVOLUME_RSRVD3) -+#define BM_AUDIOOUT_DACVOLUME_EN_ZCD 0x02000000 -+#define BM_AUDIOOUT_DACVOLUME_MUTE_LEFT 0x01000000 -+#define BP_AUDIOOUT_DACVOLUME_VOLUME_LEFT 16 -+#define BM_AUDIOOUT_DACVOLUME_VOLUME_LEFT 0x00FF0000 -+#define BF_AUDIOOUT_DACVOLUME_VOLUME_LEFT(v) \ -+ (((v) << 16) & BM_AUDIOOUT_DACVOLUME_VOLUME_LEFT) -+#define BP_AUDIOOUT_DACVOLUME_RSRVD2 13 -+#define BM_AUDIOOUT_DACVOLUME_RSRVD2 0x0000E000 -+#define BF_AUDIOOUT_DACVOLUME_RSRVD2(v) \ -+ (((v) << 13) & BM_AUDIOOUT_DACVOLUME_RSRVD2) -+#define BM_AUDIOOUT_DACVOLUME_VOLUME_UPDATE_RIGHT 0x00001000 -+#define BP_AUDIOOUT_DACVOLUME_RSRVD1 9 -+#define BM_AUDIOOUT_DACVOLUME_RSRVD1 0x00000E00 -+#define BF_AUDIOOUT_DACVOLUME_RSRVD1(v) \ -+ (((v) << 9) & BM_AUDIOOUT_DACVOLUME_RSRVD1) -+#define BM_AUDIOOUT_DACVOLUME_MUTE_RIGHT 0x00000100 -+#define BP_AUDIOOUT_DACVOLUME_VOLUME_RIGHT 0 -+#define BM_AUDIOOUT_DACVOLUME_VOLUME_RIGHT 0x000000FF -+#define BF_AUDIOOUT_DACVOLUME_VOLUME_RIGHT(v) \ -+ (((v) << 0) & BM_AUDIOOUT_DACVOLUME_VOLUME_RIGHT) -+ -+#define HW_AUDIOOUT_DACDEBUG (0x00000040) -+#define HW_AUDIOOUT_DACDEBUG_SET (0x00000044) -+#define HW_AUDIOOUT_DACDEBUG_CLR (0x00000048) -+#define HW_AUDIOOUT_DACDEBUG_TOG (0x0000004c) -+ -+#define BM_AUDIOOUT_DACDEBUG_ENABLE_DACDMA 0x80000000 -+#define BP_AUDIOOUT_DACDEBUG_RSRVD2 12 -+#define BM_AUDIOOUT_DACDEBUG_RSRVD2 0x7FFFF000 -+#define BF_AUDIOOUT_DACDEBUG_RSRVD2(v) \ -+ (((v) << 12) & BM_AUDIOOUT_DACDEBUG_RSRVD2) -+#define BP_AUDIOOUT_DACDEBUG_RAM_SS 8 -+#define BM_AUDIOOUT_DACDEBUG_RAM_SS 0x00000F00 -+#define BF_AUDIOOUT_DACDEBUG_RAM_SS(v) \ -+ (((v) << 8) & BM_AUDIOOUT_DACDEBUG_RAM_SS) -+#define BP_AUDIOOUT_DACDEBUG_RSRVD1 6 -+#define BM_AUDIOOUT_DACDEBUG_RSRVD1 0x000000C0 -+#define BF_AUDIOOUT_DACDEBUG_RSRVD1(v) \ -+ (((v) << 6) & BM_AUDIOOUT_DACDEBUG_RSRVD1) -+#define BM_AUDIOOUT_DACDEBUG_SET_INTERRUPT1_CLK_CROSS 0x00000020 -+#define BM_AUDIOOUT_DACDEBUG_SET_INTERRUPT0_CLK_CROSS 0x00000010 -+#define BM_AUDIOOUT_DACDEBUG_SET_INTERRUPT1_HAND_SHAKE 0x00000008 -+#define BM_AUDIOOUT_DACDEBUG_SET_INTERRUPT0_HAND_SHAKE 0x00000004 -+#define BM_AUDIOOUT_DACDEBUG_DMA_PREQ 0x00000002 -+#define BM_AUDIOOUT_DACDEBUG_FIFO_STATUS 0x00000001 -+ -+#define HW_AUDIOOUT_HPVOL (0x00000050) -+#define HW_AUDIOOUT_HPVOL_SET (0x00000054) -+#define HW_AUDIOOUT_HPVOL_CLR (0x00000058) -+#define HW_AUDIOOUT_HPVOL_TOG (0x0000005c) -+ -+#define BP_AUDIOOUT_HPVOL_RSRVD5 29 -+#define BM_AUDIOOUT_HPVOL_RSRVD5 0xE0000000 -+#define BF_AUDIOOUT_HPVOL_RSRVD5(v) \ -+ (((v) << 29) & BM_AUDIOOUT_HPVOL_RSRVD5) -+#define BM_AUDIOOUT_HPVOL_VOLUME_UPDATE_PENDING 0x10000000 -+#define BP_AUDIOOUT_HPVOL_RSRVD4 26 -+#define BM_AUDIOOUT_HPVOL_RSRVD4 0x0C000000 -+#define BF_AUDIOOUT_HPVOL_RSRVD4(v) \ -+ (((v) << 26) & BM_AUDIOOUT_HPVOL_RSRVD4) -+#define BM_AUDIOOUT_HPVOL_EN_MSTR_ZCD 0x02000000 -+#define BM_AUDIOOUT_HPVOL_MUTE 0x01000000 -+#define BP_AUDIOOUT_HPVOL_RSRVD3 17 -+#define BM_AUDIOOUT_HPVOL_RSRVD3 0x00FE0000 -+#define BF_AUDIOOUT_HPVOL_RSRVD3(v) \ -+ (((v) << 17) & BM_AUDIOOUT_HPVOL_RSRVD3) -+#define BM_AUDIOOUT_HPVOL_SELECT 0x00010000 -+#define BM_AUDIOOUT_HPVOL_RSRVD2 0x00008000 -+#define BP_AUDIOOUT_HPVOL_VOL_LEFT 8 -+#define BM_AUDIOOUT_HPVOL_VOL_LEFT 0x00007F00 -+#define BF_AUDIOOUT_HPVOL_VOL_LEFT(v) \ -+ (((v) << 8) & BM_AUDIOOUT_HPVOL_VOL_LEFT) -+#define BM_AUDIOOUT_HPVOL_RSRVD1 0x00000080 -+#define BP_AUDIOOUT_HPVOL_VOL_RIGHT 0 -+#define BM_AUDIOOUT_HPVOL_VOL_RIGHT 0x0000007F -+#define BF_AUDIOOUT_HPVOL_VOL_RIGHT(v) \ -+ (((v) << 0) & BM_AUDIOOUT_HPVOL_VOL_RIGHT) -+ -+#define HW_AUDIOOUT_RESERVED (0x00000060) -+#define HW_AUDIOOUT_RESERVED_SET (0x00000064) -+#define HW_AUDIOOUT_RESERVED_CLR (0x00000068) -+#define HW_AUDIOOUT_RESERVED_TOG (0x0000006c) -+ -+#define BP_AUDIOOUT_RESERVED_RSRVD1 0 -+#define BM_AUDIOOUT_RESERVED_RSRVD1 0xFFFFFFFF -+#define BF_AUDIOOUT_RESERVED_RSRVD1(v) (v) -+ -+#define HW_AUDIOOUT_PWRDN (0x00000070) -+#define HW_AUDIOOUT_PWRDN_SET (0x00000074) -+#define HW_AUDIOOUT_PWRDN_CLR (0x00000078) -+#define HW_AUDIOOUT_PWRDN_TOG (0x0000007c) -+ -+#define BP_AUDIOOUT_PWRDN_RSRVD7 25 -+#define BM_AUDIOOUT_PWRDN_RSRVD7 0xFE000000 -+#define BF_AUDIOOUT_PWRDN_RSRVD7(v) \ -+ (((v) << 25) & BM_AUDIOOUT_PWRDN_RSRVD7) -+#define BM_AUDIOOUT_PWRDN_SPEAKER 0x01000000 -+#define BP_AUDIOOUT_PWRDN_RSRVD6 21 -+#define BM_AUDIOOUT_PWRDN_RSRVD6 0x00E00000 -+#define BF_AUDIOOUT_PWRDN_RSRVD6(v) \ -+ (((v) << 21) & BM_AUDIOOUT_PWRDN_RSRVD6) -+#define BM_AUDIOOUT_PWRDN_SELFBIAS 0x00100000 -+#define BP_AUDIOOUT_PWRDN_RSRVD5 17 -+#define BM_AUDIOOUT_PWRDN_RSRVD5 0x000E0000 -+#define BF_AUDIOOUT_PWRDN_RSRVD5(v) \ -+ (((v) << 17) & BM_AUDIOOUT_PWRDN_RSRVD5) -+#define BM_AUDIOOUT_PWRDN_RIGHT_ADC 0x00010000 -+#define BP_AUDIOOUT_PWRDN_RSRVD4 13 -+#define BM_AUDIOOUT_PWRDN_RSRVD4 0x0000E000 -+#define BF_AUDIOOUT_PWRDN_RSRVD4(v) \ -+ (((v) << 13) & BM_AUDIOOUT_PWRDN_RSRVD4) -+#define BM_AUDIOOUT_PWRDN_DAC 0x00001000 -+#define BP_AUDIOOUT_PWRDN_RSRVD3 9 -+#define BM_AUDIOOUT_PWRDN_RSRVD3 0x00000E00 -+#define BF_AUDIOOUT_PWRDN_RSRVD3(v) \ -+ (((v) << 9) & BM_AUDIOOUT_PWRDN_RSRVD3) -+#define BM_AUDIOOUT_PWRDN_ADC 0x00000100 -+#define BP_AUDIOOUT_PWRDN_RSRVD2 5 -+#define BM_AUDIOOUT_PWRDN_RSRVD2 0x000000E0 -+#define BF_AUDIOOUT_PWRDN_RSRVD2(v) \ -+ (((v) << 5) & BM_AUDIOOUT_PWRDN_RSRVD2) -+#define BM_AUDIOOUT_PWRDN_CAPLESS 0x00000010 -+#define BP_AUDIOOUT_PWRDN_RSRVD1 1 -+#define BM_AUDIOOUT_PWRDN_RSRVD1 0x0000000E -+#define BF_AUDIOOUT_PWRDN_RSRVD1(v) \ -+ (((v) << 1) & BM_AUDIOOUT_PWRDN_RSRVD1) -+#define BM_AUDIOOUT_PWRDN_HEADPHONE 0x00000001 -+ -+#define HW_AUDIOOUT_REFCTRL (0x00000080) -+#define HW_AUDIOOUT_REFCTRL_SET (0x00000084) -+#define HW_AUDIOOUT_REFCTRL_CLR (0x00000088) -+#define HW_AUDIOOUT_REFCTRL_TOG (0x0000008c) -+ -+#define BP_AUDIOOUT_REFCTRL_RSRVD4 27 -+#define BM_AUDIOOUT_REFCTRL_RSRVD4 0xF8000000 -+#define BF_AUDIOOUT_REFCTRL_RSRVD4(v) \ -+ (((v) << 27) & BM_AUDIOOUT_REFCTRL_RSRVD4) -+#define BM_AUDIOOUT_REFCTRL_FASTSETTLING 0x04000000 -+#define BM_AUDIOOUT_REFCTRL_RAISE_REF 0x02000000 -+#define BM_AUDIOOUT_REFCTRL_XTAL_BGR_BIAS 0x01000000 -+#define BM_AUDIOOUT_REFCTRL_RSRVD3 0x00800000 -+#define BP_AUDIOOUT_REFCTRL_VBG_ADJ 20 -+#define BM_AUDIOOUT_REFCTRL_VBG_ADJ 0x00700000 -+#define BF_AUDIOOUT_REFCTRL_VBG_ADJ(v) \ -+ (((v) << 20) & BM_AUDIOOUT_REFCTRL_VBG_ADJ) -+#define BM_AUDIOOUT_REFCTRL_LOW_PWR 0x00080000 -+#define BM_AUDIOOUT_REFCTRL_LW_REF 0x00040000 -+#define BP_AUDIOOUT_REFCTRL_BIAS_CTRL 16 -+#define BM_AUDIOOUT_REFCTRL_BIAS_CTRL 0x00030000 -+#define BF_AUDIOOUT_REFCTRL_BIAS_CTRL(v) \ -+ (((v) << 16) & BM_AUDIOOUT_REFCTRL_BIAS_CTRL) -+#define BM_AUDIOOUT_REFCTRL_RSRVD2 0x00008000 -+#define BM_AUDIOOUT_REFCTRL_VDDXTAL_TO_VDDD 0x00004000 -+#define BM_AUDIOOUT_REFCTRL_ADJ_ADC 0x00002000 -+#define BM_AUDIOOUT_REFCTRL_ADJ_VAG 0x00001000 -+#define BP_AUDIOOUT_REFCTRL_ADC_REFVAL 8 -+#define BM_AUDIOOUT_REFCTRL_ADC_REFVAL 0x00000F00 -+#define BF_AUDIOOUT_REFCTRL_ADC_REFVAL(v) \ -+ (((v) << 8) & BM_AUDIOOUT_REFCTRL_ADC_REFVAL) -+#define BP_AUDIOOUT_REFCTRL_VAG_VAL 4 -+#define BM_AUDIOOUT_REFCTRL_VAG_VAL 0x000000F0 -+#define BF_AUDIOOUT_REFCTRL_VAG_VAL(v) \ -+ (((v) << 4) & BM_AUDIOOUT_REFCTRL_VAG_VAL) -+#define BM_AUDIOOUT_REFCTRL_RSRVD1 0x00000008 -+#define BP_AUDIOOUT_REFCTRL_DAC_ADJ 0 -+#define BM_AUDIOOUT_REFCTRL_DAC_ADJ 0x00000007 -+#define BF_AUDIOOUT_REFCTRL_DAC_ADJ(v) \ -+ (((v) << 0) & BM_AUDIOOUT_REFCTRL_DAC_ADJ) -+ -+#define HW_AUDIOOUT_ANACTRL (0x00000090) -+#define HW_AUDIOOUT_ANACTRL_SET (0x00000094) -+#define HW_AUDIOOUT_ANACTRL_CLR (0x00000098) -+#define HW_AUDIOOUT_ANACTRL_TOG (0x0000009c) -+ -+#define BP_AUDIOOUT_ANACTRL_RSRVD8 29 -+#define BM_AUDIOOUT_ANACTRL_RSRVD8 0xE0000000 -+#define BF_AUDIOOUT_ANACTRL_RSRVD8(v) \ -+ (((v) << 29) & BM_AUDIOOUT_ANACTRL_RSRVD8) -+#define BM_AUDIOOUT_ANACTRL_SHORT_CM_STS 0x10000000 -+#define BP_AUDIOOUT_ANACTRL_RSRVD7 25 -+#define BM_AUDIOOUT_ANACTRL_RSRVD7 0x0E000000 -+#define BF_AUDIOOUT_ANACTRL_RSRVD7(v) \ -+ (((v) << 25) & BM_AUDIOOUT_ANACTRL_RSRVD7) -+#define BM_AUDIOOUT_ANACTRL_SHORT_LR_STS 0x01000000 -+#define BP_AUDIOOUT_ANACTRL_RSRVD6 22 -+#define BM_AUDIOOUT_ANACTRL_RSRVD6 0x00C00000 -+#define BF_AUDIOOUT_ANACTRL_RSRVD6(v) \ -+ (((v) << 22) & BM_AUDIOOUT_ANACTRL_RSRVD6) -+#define BP_AUDIOOUT_ANACTRL_SHORTMODE_CM 20 -+#define BM_AUDIOOUT_ANACTRL_SHORTMODE_CM 0x00300000 -+#define BF_AUDIOOUT_ANACTRL_SHORTMODE_CM(v) \ -+ (((v) << 20) & BM_AUDIOOUT_ANACTRL_SHORTMODE_CM) -+#define BM_AUDIOOUT_ANACTRL_RSRVD5 0x00080000 -+#define BP_AUDIOOUT_ANACTRL_SHORTMODE_LR 17 -+#define BM_AUDIOOUT_ANACTRL_SHORTMODE_LR 0x00060000 -+#define BF_AUDIOOUT_ANACTRL_SHORTMODE_LR(v) \ -+ (((v) << 17) & BM_AUDIOOUT_ANACTRL_SHORTMODE_LR) -+#define BP_AUDIOOUT_ANACTRL_RSRVD4 15 -+#define BM_AUDIOOUT_ANACTRL_RSRVD4 0x00018000 -+#define BF_AUDIOOUT_ANACTRL_RSRVD4(v) \ -+ (((v) << 15) & BM_AUDIOOUT_ANACTRL_RSRVD4) -+#define BP_AUDIOOUT_ANACTRL_SHORT_LVLADJL 12 -+#define BM_AUDIOOUT_ANACTRL_SHORT_LVLADJL 0x00007000 -+#define BF_AUDIOOUT_ANACTRL_SHORT_LVLADJL(v) \ -+ (((v) << 12) & BM_AUDIOOUT_ANACTRL_SHORT_LVLADJL) -+#define BM_AUDIOOUT_ANACTRL_RSRVD3 0x00000800 -+#define BP_AUDIOOUT_ANACTRL_SHORT_LVLADJR 8 -+#define BM_AUDIOOUT_ANACTRL_SHORT_LVLADJR 0x00000700 -+#define BF_AUDIOOUT_ANACTRL_SHORT_LVLADJR(v) \ -+ (((v) << 8) & BM_AUDIOOUT_ANACTRL_SHORT_LVLADJR) -+#define BP_AUDIOOUT_ANACTRL_RSRVD2 6 -+#define BM_AUDIOOUT_ANACTRL_RSRVD2 0x000000C0 -+#define BF_AUDIOOUT_ANACTRL_RSRVD2(v) \ -+ (((v) << 6) & BM_AUDIOOUT_ANACTRL_RSRVD2) -+#define BM_AUDIOOUT_ANACTRL_HP_HOLD_GND 0x00000020 -+#define BM_AUDIOOUT_ANACTRL_HP_CLASSAB 0x00000010 -+#define BP_AUDIOOUT_ANACTRL_RSRVD1 0 -+#define BM_AUDIOOUT_ANACTRL_RSRVD1 0x0000000F -+#define BF_AUDIOOUT_ANACTRL_RSRVD1(v) \ -+ (((v) << 0) & BM_AUDIOOUT_ANACTRL_RSRVD1) -+ -+#define HW_AUDIOOUT_TEST (0x000000a0) -+#define HW_AUDIOOUT_TEST_SET (0x000000a4) -+#define HW_AUDIOOUT_TEST_CLR (0x000000a8) -+#define HW_AUDIOOUT_TEST_TOG (0x000000ac) -+ -+#define BM_AUDIOOUT_TEST_RSRVD4 0x80000000 -+#define BP_AUDIOOUT_TEST_HP_ANTIPOP 28 -+#define BM_AUDIOOUT_TEST_HP_ANTIPOP 0x70000000 -+#define BF_AUDIOOUT_TEST_HP_ANTIPOP(v) \ -+ (((v) << 28) & BM_AUDIOOUT_TEST_HP_ANTIPOP) -+#define BM_AUDIOOUT_TEST_RSRVD3 0x08000000 -+#define BM_AUDIOOUT_TEST_TM_ADCIN_TOHP 0x04000000 -+#define BM_AUDIOOUT_TEST_TM_LOOP 0x02000000 -+#define BM_AUDIOOUT_TEST_TM_HPCOMMON 0x01000000 -+#define BP_AUDIOOUT_TEST_HP_I1_ADJ 22 -+#define BM_AUDIOOUT_TEST_HP_I1_ADJ 0x00C00000 -+#define BF_AUDIOOUT_TEST_HP_I1_ADJ(v) \ -+ (((v) << 22) & BM_AUDIOOUT_TEST_HP_I1_ADJ) -+#define BP_AUDIOOUT_TEST_HP_IALL_ADJ 20 -+#define BM_AUDIOOUT_TEST_HP_IALL_ADJ 0x00300000 -+#define BF_AUDIOOUT_TEST_HP_IALL_ADJ(v) \ -+ (((v) << 20) & BM_AUDIOOUT_TEST_HP_IALL_ADJ) -+#define BP_AUDIOOUT_TEST_RSRVD2 14 -+#define BM_AUDIOOUT_TEST_RSRVD2 0x000FC000 -+#define BF_AUDIOOUT_TEST_RSRVD2(v) \ -+ (((v) << 14) & BM_AUDIOOUT_TEST_RSRVD2) -+#define BM_AUDIOOUT_TEST_VAG_CLASSA 0x00002000 -+#define BM_AUDIOOUT_TEST_VAG_DOUBLE_I 0x00001000 -+#define BP_AUDIOOUT_TEST_RSRVD1 4 -+#define BM_AUDIOOUT_TEST_RSRVD1 0x00000FF0 -+#define BF_AUDIOOUT_TEST_RSRVD1(v) \ -+ (((v) << 4) & BM_AUDIOOUT_TEST_RSRVD1) -+#define BM_AUDIOOUT_TEST_ADCTODAC_LOOP 0x00000008 -+#define BM_AUDIOOUT_TEST_DAC_CLASSA 0x00000004 -+#define BM_AUDIOOUT_TEST_DAC_DOUBLE_I 0x00000002 -+#define BM_AUDIOOUT_TEST_DAC_DIS_RTZ 0x00000001 -+ -+#define HW_AUDIOOUT_BISTCTRL (0x000000b0) -+#define HW_AUDIOOUT_BISTCTRL_SET (0x000000b4) -+#define HW_AUDIOOUT_BISTCTRL_CLR (0x000000b8) -+#define HW_AUDIOOUT_BISTCTRL_TOG (0x000000bc) -+ -+#define BP_AUDIOOUT_BISTCTRL_RSVD0 4 -+#define BM_AUDIOOUT_BISTCTRL_RSVD0 0xFFFFFFF0 -+#define BF_AUDIOOUT_BISTCTRL_RSVD0(v) \ -+ (((v) << 4) & BM_AUDIOOUT_BISTCTRL_RSVD0) -+#define BM_AUDIOOUT_BISTCTRL_FAIL 0x00000008 -+#define BM_AUDIOOUT_BISTCTRL_PASS 0x00000004 -+#define BM_AUDIOOUT_BISTCTRL_DONE 0x00000002 -+#define BM_AUDIOOUT_BISTCTRL_START 0x00000001 -+ -+#define HW_AUDIOOUT_BISTSTAT0 (0x000000c0) -+#define HW_AUDIOOUT_BISTSTAT0_SET (0x000000c4) -+#define HW_AUDIOOUT_BISTSTAT0_CLR (0x000000c8) -+#define HW_AUDIOOUT_BISTSTAT0_TOG (0x000000cc) -+ -+#define BP_AUDIOOUT_BISTSTAT0_RSVD0 24 -+#define BM_AUDIOOUT_BISTSTAT0_RSVD0 0xFF000000 -+#define BF_AUDIOOUT_BISTSTAT0_RSVD0(v) \ -+ (((v) << 24) & BM_AUDIOOUT_BISTSTAT0_RSVD0) -+#define BP_AUDIOOUT_BISTSTAT0_DATA 0 -+#define BM_AUDIOOUT_BISTSTAT0_DATA 0x00FFFFFF -+#define BF_AUDIOOUT_BISTSTAT0_DATA(v) \ -+ (((v) << 0) & BM_AUDIOOUT_BISTSTAT0_DATA) -+ -+#define HW_AUDIOOUT_BISTSTAT1 (0x000000d0) -+#define HW_AUDIOOUT_BISTSTAT1_SET (0x000000d4) -+#define HW_AUDIOOUT_BISTSTAT1_CLR (0x000000d8) -+#define HW_AUDIOOUT_BISTSTAT1_TOG (0x000000dc) -+ -+#define BP_AUDIOOUT_BISTSTAT1_RSVD1 29 -+#define BM_AUDIOOUT_BISTSTAT1_RSVD1 0xE0000000 -+#define BF_AUDIOOUT_BISTSTAT1_RSVD1(v) \ -+ (((v) << 29) & BM_AUDIOOUT_BISTSTAT1_RSVD1) -+#define BP_AUDIOOUT_BISTSTAT1_STATE 24 -+#define BM_AUDIOOUT_BISTSTAT1_STATE 0x1F000000 -+#define BF_AUDIOOUT_BISTSTAT1_STATE(v) \ -+ (((v) << 24) & BM_AUDIOOUT_BISTSTAT1_STATE) -+#define BP_AUDIOOUT_BISTSTAT1_RSVD0 8 -+#define BM_AUDIOOUT_BISTSTAT1_RSVD0 0x00FFFF00 -+#define BF_AUDIOOUT_BISTSTAT1_RSVD0(v) \ -+ (((v) << 8) & BM_AUDIOOUT_BISTSTAT1_RSVD0) -+#define BP_AUDIOOUT_BISTSTAT1_ADDR 0 -+#define BM_AUDIOOUT_BISTSTAT1_ADDR 0x000000FF -+#define BF_AUDIOOUT_BISTSTAT1_ADDR(v) \ -+ (((v) << 0) & BM_AUDIOOUT_BISTSTAT1_ADDR) -+ -+#define HW_AUDIOOUT_ANACLKCTRL (0x000000e0) -+#define HW_AUDIOOUT_ANACLKCTRL_SET (0x000000e4) -+#define HW_AUDIOOUT_ANACLKCTRL_CLR (0x000000e8) -+#define HW_AUDIOOUT_ANACLKCTRL_TOG (0x000000ec) -+ -+#define BM_AUDIOOUT_ANACLKCTRL_CLKGATE 0x80000000 -+#define BP_AUDIOOUT_ANACLKCTRL_RSRVD3 5 -+#define BM_AUDIOOUT_ANACLKCTRL_RSRVD3 0x7FFFFFE0 -+#define BF_AUDIOOUT_ANACLKCTRL_RSRVD3(v) \ -+ (((v) << 5) & BM_AUDIOOUT_ANACLKCTRL_RSRVD3) -+#define BM_AUDIOOUT_ANACLKCTRL_INVERT_DACCLK 0x00000010 -+#define BM_AUDIOOUT_ANACLKCTRL_RSRVD2 0x00000008 -+#define BP_AUDIOOUT_ANACLKCTRL_DACDIV 0 -+#define BM_AUDIOOUT_ANACLKCTRL_DACDIV 0x00000007 -+#define BF_AUDIOOUT_ANACLKCTRL_DACDIV(v) \ -+ (((v) << 0) & BM_AUDIOOUT_ANACLKCTRL_DACDIV) -+ -+#define HW_AUDIOOUT_DATA (0x000000f0) -+#define HW_AUDIOOUT_DATA_SET (0x000000f4) -+#define HW_AUDIOOUT_DATA_CLR (0x000000f8) -+#define HW_AUDIOOUT_DATA_TOG (0x000000fc) -+ -+#define BP_AUDIOOUT_DATA_HIGH 16 -+#define BM_AUDIOOUT_DATA_HIGH 0xFFFF0000 -+#define BF_AUDIOOUT_DATA_HIGH(v) \ -+ (((v) << 16) & BM_AUDIOOUT_DATA_HIGH) -+#define BP_AUDIOOUT_DATA_LOW 0 -+#define BM_AUDIOOUT_DATA_LOW 0x0000FFFF -+#define BF_AUDIOOUT_DATA_LOW(v) \ -+ (((v) << 0) & BM_AUDIOOUT_DATA_LOW) -+ -+#define HW_AUDIOOUT_SPEAKERCTRL (0x00000100) -+#define HW_AUDIOOUT_SPEAKERCTRL_SET (0x00000104) -+#define HW_AUDIOOUT_SPEAKERCTRL_CLR (0x00000108) -+#define HW_AUDIOOUT_SPEAKERCTRL_TOG (0x0000010c) -+ -+#define BP_AUDIOOUT_SPEAKERCTRL_RSRVD2 25 -+#define BM_AUDIOOUT_SPEAKERCTRL_RSRVD2 0xFE000000 -+#define BF_AUDIOOUT_SPEAKERCTRL_RSRVD2(v) \ -+ (((v) << 25) & BM_AUDIOOUT_SPEAKERCTRL_RSRVD2) -+#define BM_AUDIOOUT_SPEAKERCTRL_MUTE 0x01000000 -+#define BP_AUDIOOUT_SPEAKERCTRL_I1_ADJ 22 -+#define BM_AUDIOOUT_SPEAKERCTRL_I1_ADJ 0x00C00000 -+#define BF_AUDIOOUT_SPEAKERCTRL_I1_ADJ(v) \ -+ (((v) << 22) & BM_AUDIOOUT_SPEAKERCTRL_I1_ADJ) -+#define BP_AUDIOOUT_SPEAKERCTRL_IALL_ADJ 20 -+#define BM_AUDIOOUT_SPEAKERCTRL_IALL_ADJ 0x00300000 -+#define BF_AUDIOOUT_SPEAKERCTRL_IALL_ADJ(v) \ -+ (((v) << 20) & BM_AUDIOOUT_SPEAKERCTRL_IALL_ADJ) -+#define BP_AUDIOOUT_SPEAKERCTRL_RSRVD1 16 -+#define BM_AUDIOOUT_SPEAKERCTRL_RSRVD1 0x000F0000 -+#define BF_AUDIOOUT_SPEAKERCTRL_RSRVD1(v) \ -+ (((v) << 16) & BM_AUDIOOUT_SPEAKERCTRL_RSRVD1) -+#define BP_AUDIOOUT_SPEAKERCTRL_POSDRIVER 14 -+#define BM_AUDIOOUT_SPEAKERCTRL_POSDRIVER 0x0000C000 -+#define BF_AUDIOOUT_SPEAKERCTRL_POSDRIVER(v) \ -+ (((v) << 14) & BM_AUDIOOUT_SPEAKERCTRL_POSDRIVER) -+#define BP_AUDIOOUT_SPEAKERCTRL_NEGDRIVER 12 -+#define BM_AUDIOOUT_SPEAKERCTRL_NEGDRIVER 0x00003000 -+#define BF_AUDIOOUT_SPEAKERCTRL_NEGDRIVER(v) \ -+ (((v) << 12) & BM_AUDIOOUT_SPEAKERCTRL_NEGDRIVER) -+#define BP_AUDIOOUT_SPEAKERCTRL_RSRVD0 0 -+#define BM_AUDIOOUT_SPEAKERCTRL_RSRVD0 0x00000FFF -+#define BF_AUDIOOUT_SPEAKERCTRL_RSRVD0(v) \ -+ (((v) << 0) & BM_AUDIOOUT_SPEAKERCTRL_RSRVD0) -+ -+#define HW_AUDIOOUT_VERSION (0x00000200) -+ -+#define BP_AUDIOOUT_VERSION_MAJOR 24 -+#define BM_AUDIOOUT_VERSION_MAJOR 0xFF000000 -+#define BF_AUDIOOUT_VERSION_MAJOR(v) \ -+ (((v) << 24) & BM_AUDIOOUT_VERSION_MAJOR) -+#define BP_AUDIOOUT_VERSION_MINOR 16 -+#define BM_AUDIOOUT_VERSION_MINOR 0x00FF0000 -+#define BF_AUDIOOUT_VERSION_MINOR(v) \ -+ (((v) << 16) & BM_AUDIOOUT_VERSION_MINOR) -+#define BP_AUDIOOUT_VERSION_STEP 0 -+#define BM_AUDIOOUT_VERSION_STEP 0x0000FFFF -+#define BF_AUDIOOUT_VERSION_STEP(v) \ -+ (((v) << 0) & BM_AUDIOOUT_VERSION_STEP) -+ -+/* AUDIOIN */ -+#define HW_AUDIOIN_CTRL (0x00000000) -+#define HW_AUDIOIN_CTRL_SET (0x00000004) -+#define HW_AUDIOIN_CTRL_CLR (0x00000008) -+#define HW_AUDIOIN_CTRL_TOG (0x0000000c) -+ -+#define BM_AUDIOIN_CTRL_SFTRST 0x80000000 -+#define BM_AUDIOIN_CTRL_CLKGATE 0x40000000 -+#define BP_AUDIOIN_CTRL_RSRVD3 21 -+#define BM_AUDIOIN_CTRL_RSRVD3 0x3FE00000 -+#define BF_AUDIOIN_CTRL_RSRVD3(v) \ -+ (((v) << 21) & BM_AUDIOIN_CTRL_RSRVD3) -+#define BP_AUDIOIN_CTRL_DMAWAIT_COUNT 16 -+#define BM_AUDIOIN_CTRL_DMAWAIT_COUNT 0x001F0000 -+#define BF_AUDIOIN_CTRL_DMAWAIT_COUNT(v) \ -+ (((v) << 16) & BM_AUDIOIN_CTRL_DMAWAIT_COUNT) -+#define BP_AUDIOIN_CTRL_RSRVD1 11 -+#define BM_AUDIOIN_CTRL_RSRVD1 0x0000F800 -+#define BF_AUDIOIN_CTRL_RSRVD1(v) \ -+ (((v) << 11) & BM_AUDIOIN_CTRL_RSRVD1) -+#define BM_AUDIOIN_CTRL_LR_SWAP 0x00000400 -+#define BM_AUDIOIN_CTRL_EDGE_SYNC 0x00000200 -+#define BM_AUDIOIN_CTRL_INVERT_1BIT 0x00000100 -+#define BM_AUDIOIN_CTRL_OFFSET_ENABLE 0x00000080 -+#define BM_AUDIOIN_CTRL_HPF_ENABLE 0x00000040 -+#define BM_AUDIOIN_CTRL_WORD_LENGTH 0x00000020 -+#define BM_AUDIOIN_CTRL_LOOPBACK 0x00000010 -+#define BM_AUDIOIN_CTRL_FIFO_UNDERFLOW_IRQ 0x00000008 -+#define BM_AUDIOIN_CTRL_FIFO_OVERFLOW_IRQ 0x00000004 -+#define BM_AUDIOIN_CTRL_FIFO_ERROR_IRQ_EN 0x00000002 -+#define BM_AUDIOIN_CTRL_RUN 0x00000001 -+ -+#define HW_AUDIOIN_STAT (0x00000010) -+#define HW_AUDIOIN_STAT_SET (0x00000014) -+#define HW_AUDIOIN_STAT_CLR (0x00000018) -+#define HW_AUDIOIN_STAT_TOG (0x0000001c) -+ -+#define BM_AUDIOIN_STAT_ADC_PRESENT 0x80000000 -+#define BP_AUDIOIN_STAT_RSRVD3 0 -+#define BM_AUDIOIN_STAT_RSRVD3 0x7FFFFFFF -+#define BF_AUDIOIN_STAT_RSRVD3(v) \ -+ (((v) << 0) & BM_AUDIOIN_STAT_RSRVD3) -+ -+#define HW_AUDIOIN_ADCSRR (0x00000020) -+#define HW_AUDIOIN_ADCSRR_SET (0x00000024) -+#define HW_AUDIOIN_ADCSRR_CLR (0x00000028) -+#define HW_AUDIOIN_ADCSRR_TOG (0x0000002c) -+ -+#define BM_AUDIOIN_ADCSRR_OSR 0x80000000 -+#define BV_AUDIOIN_ADCSRR_OSR__OSR6 0x0 -+#define BV_AUDIOIN_ADCSRR_OSR__OSR12 0x1 -+#define BP_AUDIOIN_ADCSRR_BASEMULT 28 -+#define BM_AUDIOIN_ADCSRR_BASEMULT 0x70000000 -+#define BF_AUDIOIN_ADCSRR_BASEMULT(v) \ -+ (((v) << 28) & BM_AUDIOIN_ADCSRR_BASEMULT) -+#define BV_AUDIOIN_ADCSRR_BASEMULT__SINGLE_RATE 0x1 -+#define BV_AUDIOIN_ADCSRR_BASEMULT__DOUBLE_RATE 0x2 -+#define BV_AUDIOIN_ADCSRR_BASEMULT__QUAD_RATE 0x4 -+#define BM_AUDIOIN_ADCSRR_RSRVD2 0x08000000 -+#define BP_AUDIOIN_ADCSRR_SRC_HOLD 24 -+#define BM_AUDIOIN_ADCSRR_SRC_HOLD 0x07000000 -+#define BF_AUDIOIN_ADCSRR_SRC_HOLD(v) \ -+ (((v) << 24) & BM_AUDIOIN_ADCSRR_SRC_HOLD) -+#define BP_AUDIOIN_ADCSRR_RSRVD1 21 -+#define BM_AUDIOIN_ADCSRR_RSRVD1 0x00E00000 -+#define BF_AUDIOIN_ADCSRR_RSRVD1(v) \ -+ (((v) << 21) & BM_AUDIOIN_ADCSRR_RSRVD1) -+#define BP_AUDIOIN_ADCSRR_SRC_INT 16 -+#define BM_AUDIOIN_ADCSRR_SRC_INT 0x001F0000 -+#define BF_AUDIOIN_ADCSRR_SRC_INT(v) \ -+ (((v) << 16) & BM_AUDIOIN_ADCSRR_SRC_INT) -+#define BP_AUDIOIN_ADCSRR_RSRVD0 13 -+#define BM_AUDIOIN_ADCSRR_RSRVD0 0x0000E000 -+#define BF_AUDIOIN_ADCSRR_RSRVD0(v) \ -+ (((v) << 13) & BM_AUDIOIN_ADCSRR_RSRVD0) -+#define BP_AUDIOIN_ADCSRR_SRC_FRAC 0 -+#define BM_AUDIOIN_ADCSRR_SRC_FRAC 0x00001FFF -+#define BF_AUDIOIN_ADCSRR_SRC_FRAC(v) \ -+ (((v) << 0) & BM_AUDIOIN_ADCSRR_SRC_FRAC) -+ -+#define HW_AUDIOIN_ADCVOLUME (0x00000030) -+#define HW_AUDIOIN_ADCVOLUME_SET (0x00000034) -+#define HW_AUDIOIN_ADCVOLUME_CLR (0x00000038) -+#define HW_AUDIOIN_ADCVOLUME_TOG (0x0000003c) -+ -+#define BP_AUDIOIN_ADCVOLUME_RSRVD5 29 -+#define BM_AUDIOIN_ADCVOLUME_RSRVD5 0xE0000000 -+#define BF_AUDIOIN_ADCVOLUME_RSRVD5(v) \ -+ (((v) << 29) & BM_AUDIOIN_ADCVOLUME_RSRVD5) -+#define BM_AUDIOIN_ADCVOLUME_VOLUME_UPDATE_LEFT 0x10000000 -+#define BP_AUDIOIN_ADCVOLUME_RSRVD4 26 -+#define BM_AUDIOIN_ADCVOLUME_RSRVD4 0x0C000000 -+#define BF_AUDIOIN_ADCVOLUME_RSRVD4(v) \ -+ (((v) << 26) & BM_AUDIOIN_ADCVOLUME_RSRVD4) -+#define BM_AUDIOIN_ADCVOLUME_EN_ZCD 0x02000000 -+#define BM_AUDIOIN_ADCVOLUME_RSRVD3 0x01000000 -+#define BP_AUDIOIN_ADCVOLUME_VOLUME_LEFT 16 -+#define BM_AUDIOIN_ADCVOLUME_VOLUME_LEFT 0x00FF0000 -+#define BF_AUDIOIN_ADCVOLUME_VOLUME_LEFT(v) \ -+ (((v) << 16) & BM_AUDIOIN_ADCVOLUME_VOLUME_LEFT) -+#define BP_AUDIOIN_ADCVOLUME_RSRVD2 13 -+#define BM_AUDIOIN_ADCVOLUME_RSRVD2 0x0000E000 -+#define BF_AUDIOIN_ADCVOLUME_RSRVD2(v) \ -+ (((v) << 13) & BM_AUDIOIN_ADCVOLUME_RSRVD2) -+#define BM_AUDIOIN_ADCVOLUME_VOLUME_UPDATE_RIGHT 0x00001000 -+#define BP_AUDIOIN_ADCVOLUME_RSRVD1 8 -+#define BM_AUDIOIN_ADCVOLUME_RSRVD1 0x00000F00 -+#define BF_AUDIOIN_ADCVOLUME_RSRVD1(v) \ -+ (((v) << 8) & BM_AUDIOIN_ADCVOLUME_RSRVD1) -+#define BP_AUDIOIN_ADCVOLUME_VOLUME_RIGHT 0 -+#define BM_AUDIOIN_ADCVOLUME_VOLUME_RIGHT 0x000000FF -+#define BF_AUDIOIN_ADCVOLUME_VOLUME_RIGHT(v) \ -+ (((v) << 0) & BM_AUDIOIN_ADCVOLUME_VOLUME_RIGHT) -+ -+#define HW_AUDIOIN_ADCDEBUG (0x00000040) -+#define HW_AUDIOIN_ADCDEBUG_SET (0x00000044) -+#define HW_AUDIOIN_ADCDEBUG_CLR (0x00000048) -+#define HW_AUDIOIN_ADCDEBUG_TOG (0x0000004c) -+ -+#define BM_AUDIOIN_ADCDEBUG_ENABLE_ADCDMA 0x80000000 -+#define BP_AUDIOIN_ADCDEBUG_RSRVD1 4 -+#define BM_AUDIOIN_ADCDEBUG_RSRVD1 0x7FFFFFF0 -+#define BF_AUDIOIN_ADCDEBUG_RSRVD1(v) \ -+ (((v) << 4) & BM_AUDIOIN_ADCDEBUG_RSRVD1) -+#define BM_AUDIOIN_ADCDEBUG_ADC_DMA_REQ_HAND_SHAKE_CLK_CROSS 0x00000008 -+#define BM_AUDIOIN_ADCDEBUG_SET_INTERRUPT3_HAND_SHAKE 0x00000004 -+#define BM_AUDIOIN_ADCDEBUG_DMA_PREQ 0x00000002 -+#define BM_AUDIOIN_ADCDEBUG_FIFO_STATUS 0x00000001 -+ -+#define HW_AUDIOIN_ADCVOL (0x00000050) -+#define HW_AUDIOIN_ADCVOL_SET (0x00000054) -+#define HW_AUDIOIN_ADCVOL_CLR (0x00000058) -+#define HW_AUDIOIN_ADCVOL_TOG (0x0000005c) -+ -+#define BP_AUDIOIN_ADCVOL_RSRVD4 29 -+#define BM_AUDIOIN_ADCVOL_RSRVD4 0xE0000000 -+#define BF_AUDIOIN_ADCVOL_RSRVD4(v) \ -+ (((v) << 29) & BM_AUDIOIN_ADCVOL_RSRVD4) -+#define BM_AUDIOIN_ADCVOL_VOLUME_UPDATE_PENDING 0x10000000 -+#define BP_AUDIOIN_ADCVOL_RSRVD3 26 -+#define BM_AUDIOIN_ADCVOL_RSRVD3 0x0C000000 -+#define BF_AUDIOIN_ADCVOL_RSRVD3(v) \ -+ (((v) << 26) & BM_AUDIOIN_ADCVOL_RSRVD3) -+#define BM_AUDIOIN_ADCVOL_EN_ADC_ZCD 0x02000000 -+#define BM_AUDIOIN_ADCVOL_MUTE 0x01000000 -+#define BP_AUDIOIN_ADCVOL_RSRVD2 14 -+#define BM_AUDIOIN_ADCVOL_RSRVD2 0x00FFC000 -+#define BF_AUDIOIN_ADCVOL_RSRVD2(v) \ -+ (((v) << 14) & BM_AUDIOIN_ADCVOL_RSRVD2) -+#define BP_AUDIOIN_ADCVOL_SELECT_LEFT 12 -+#define BM_AUDIOIN_ADCVOL_SELECT_LEFT 0x00003000 -+#define BF_AUDIOIN_ADCVOL_SELECT_LEFT(v) \ -+ (((v) << 12) & BM_AUDIOIN_ADCVOL_SELECT_LEFT) -+#define BP_AUDIOIN_ADCVOL_GAIN_LEFT 8 -+#define BM_AUDIOIN_ADCVOL_GAIN_LEFT 0x00000F00 -+#define BF_AUDIOIN_ADCVOL_GAIN_LEFT(v) \ -+ (((v) << 8) & BM_AUDIOIN_ADCVOL_GAIN_LEFT) -+#define BP_AUDIOIN_ADCVOL_RSRVD1 6 -+#define BM_AUDIOIN_ADCVOL_RSRVD1 0x000000C0 -+#define BF_AUDIOIN_ADCVOL_RSRVD1(v) \ -+ (((v) << 6) & BM_AUDIOIN_ADCVOL_RSRVD1) -+#define BP_AUDIOIN_ADCVOL_SELECT_RIGHT 4 -+#define BM_AUDIOIN_ADCVOL_SELECT_RIGHT 0x00000030 -+#define BF_AUDIOIN_ADCVOL_SELECT_RIGHT(v) \ -+ (((v) << 4) & BM_AUDIOIN_ADCVOL_SELECT_RIGHT) -+#define BP_AUDIOIN_ADCVOL_GAIN_RIGHT 0 -+#define BM_AUDIOIN_ADCVOL_GAIN_RIGHT 0x0000000F -+#define BF_AUDIOIN_ADCVOL_GAIN_RIGHT(v) \ -+ (((v) << 0) & BM_AUDIOIN_ADCVOL_GAIN_RIGHT) -+ -+#define HW_AUDIOIN_MICLINE (0x00000060) -+#define HW_AUDIOIN_MICLINE_SET (0x00000064) -+#define HW_AUDIOIN_MICLINE_CLR (0x00000068) -+#define HW_AUDIOIN_MICLINE_TOG (0x0000006c) -+ -+#define BP_AUDIOIN_MICLINE_RSRVD6 30 -+#define BM_AUDIOIN_MICLINE_RSRVD6 0xC0000000 -+#define BF_AUDIOIN_MICLINE_RSRVD6(v) \ -+ (((v) << 30) & BM_AUDIOIN_MICLINE_RSRVD6) -+#define BM_AUDIOIN_MICLINE_DIVIDE_LINE1 0x20000000 -+#define BM_AUDIOIN_MICLINE_DIVIDE_LINE2 0x10000000 -+#define BP_AUDIOIN_MICLINE_RSRVD5 25 -+#define BM_AUDIOIN_MICLINE_RSRVD5 0x0E000000 -+#define BF_AUDIOIN_MICLINE_RSRVD5(v) \ -+ (((v) << 25) & BM_AUDIOIN_MICLINE_RSRVD5) -+#define BM_AUDIOIN_MICLINE_MIC_SELECT 0x01000000 -+#define BP_AUDIOIN_MICLINE_RSRVD4 22 -+#define BM_AUDIOIN_MICLINE_RSRVD4 0x00C00000 -+#define BF_AUDIOIN_MICLINE_RSRVD4(v) \ -+ (((v) << 22) & BM_AUDIOIN_MICLINE_RSRVD4) -+#define BP_AUDIOIN_MICLINE_MIC_RESISTOR 20 -+#define BM_AUDIOIN_MICLINE_MIC_RESISTOR 0x00300000 -+#define BF_AUDIOIN_MICLINE_MIC_RESISTOR(v) \ -+ (((v) << 20) & BM_AUDIOIN_MICLINE_MIC_RESISTOR) -+#define BM_AUDIOIN_MICLINE_RSRVD3 0x00080000 -+#define BP_AUDIOIN_MICLINE_MIC_BIAS 16 -+#define BM_AUDIOIN_MICLINE_MIC_BIAS 0x00070000 -+#define BF_AUDIOIN_MICLINE_MIC_BIAS(v) \ -+ (((v) << 16) & BM_AUDIOIN_MICLINE_MIC_BIAS) -+#define BP_AUDIOIN_MICLINE_RSRVD2 6 -+#define BM_AUDIOIN_MICLINE_RSRVD2 0x0000FFC0 -+#define BF_AUDIOIN_MICLINE_RSRVD2(v) \ -+ (((v) << 6) & BM_AUDIOIN_MICLINE_RSRVD2) -+#define BP_AUDIOIN_MICLINE_MIC_CHOPCLK 4 -+#define BM_AUDIOIN_MICLINE_MIC_CHOPCLK 0x00000030 -+#define BF_AUDIOIN_MICLINE_MIC_CHOPCLK(v) \ -+ (((v) << 4) & BM_AUDIOIN_MICLINE_MIC_CHOPCLK) -+#define BP_AUDIOIN_MICLINE_RSRVD1 2 -+#define BM_AUDIOIN_MICLINE_RSRVD1 0x0000000C -+#define BF_AUDIOIN_MICLINE_RSRVD1(v) \ -+ (((v) << 2) & BM_AUDIOIN_MICLINE_RSRVD1) -+#define BP_AUDIOIN_MICLINE_MIC_GAIN 0 -+#define BM_AUDIOIN_MICLINE_MIC_GAIN 0x00000003 -+#define BF_AUDIOIN_MICLINE_MIC_GAIN(v) \ -+ (((v) << 0) & BM_AUDIOIN_MICLINE_MIC_GAIN) -+ -+#define HW_AUDIOIN_ANACLKCTRL (0x00000070) -+#define HW_AUDIOIN_ANACLKCTRL_SET (0x00000074) -+#define HW_AUDIOIN_ANACLKCTRL_CLR (0x00000078) -+#define HW_AUDIOIN_ANACLKCTRL_TOG (0x0000007c) -+ -+#define BM_AUDIOIN_ANACLKCTRL_CLKGATE 0x80000000 -+#define BP_AUDIOIN_ANACLKCTRL_RSRVD4 11 -+#define BM_AUDIOIN_ANACLKCTRL_RSRVD4 0x7FFFF800 -+#define BF_AUDIOIN_ANACLKCTRL_RSRVD4(v) \ -+ (((v) << 11) & BM_AUDIOIN_ANACLKCTRL_RSRVD4) -+#define BM_AUDIOIN_ANACLKCTRL_DITHER_OFF 0x00000400 -+#define BM_AUDIOIN_ANACLKCTRL_SLOW_DITHER 0x00000200 -+#define BM_AUDIOIN_ANACLKCTRL_INVERT_ADCCLK 0x00000100 -+#define BP_AUDIOIN_ANACLKCTRL_RSRVD3 6 -+#define BM_AUDIOIN_ANACLKCTRL_RSRVD3 0x000000C0 -+#define BF_AUDIOIN_ANACLKCTRL_RSRVD3(v) \ -+ (((v) << 6) & BM_AUDIOIN_ANACLKCTRL_RSRVD3) -+#define BP_AUDIOIN_ANACLKCTRL_ADCCLK_SHIFT 4 -+#define BM_AUDIOIN_ANACLKCTRL_ADCCLK_SHIFT 0x00000030 -+#define BF_AUDIOIN_ANACLKCTRL_ADCCLK_SHIFT(v) \ -+ (((v) << 4) & BM_AUDIOIN_ANACLKCTRL_ADCCLK_SHIFT) -+#define BM_AUDIOIN_ANACLKCTRL_RSRVD2 0x00000008 -+#define BP_AUDIOIN_ANACLKCTRL_ADCDIV 0 -+#define BM_AUDIOIN_ANACLKCTRL_ADCDIV 0x00000007 -+#define BF_AUDIOIN_ANACLKCTRL_ADCDIV(v) \ -+ (((v) << 0) & BM_AUDIOIN_ANACLKCTRL_ADCDIV) -+ -+#define HW_AUDIOIN_DATA (0x00000080) -+#define HW_AUDIOIN_DATA_SET (0x00000084) -+#define HW_AUDIOIN_DATA_CLR (0x00000088) -+#define HW_AUDIOIN_DATA_TOG (0x0000008c) -+ -+#define BP_AUDIOIN_DATA_HIGH 16 -+#define BM_AUDIOIN_DATA_HIGH 0xFFFF0000 -+#define BF_AUDIOIN_DATA_HIGH(v) \ -+ (((v) << 16) & BM_AUDIOIN_DATA_HIGH) -+#define BP_AUDIOIN_DATA_LOW 0 -+#define BM_AUDIOIN_DATA_LOW 0x0000FFFF -+#define BF_AUDIOIN_DATA_LOW(v) \ -+ (((v) << 0) & BM_AUDIOIN_DATA_LOW) -+ -+#define BV_AUDIOIN_ADCVOL_SELECT__MIC 0x00 -+ -+#endif /* __MXS_ADC_CODEC_H */ -diff --git a/sound/soc/mxs/Kconfig b/sound/soc/mxs/Kconfig -index 219235c..7612ef8 100644 ---- a/sound/soc/mxs/Kconfig -+++ b/sound/soc/mxs/Kconfig -@@ -19,3 +19,13 @@ config SND_SOC_MXS_SGTL5000 - a sgtl5000 codec. - - endif # SND_MXS_SOC -+ -+ -+config SND_MXS_SOC_BUILTIN -+ tristate "SoC Audio for Freescale i.MX23 built-in codec" -+ depends on ARCH_MXS -+ select SND_SOC_GENERIC_DMAENGINE_PCM -+ select SND_SOC_MXS_BUILTIN_CODEC -+ help -+ Say Y or M if you want to add support for codecs attached to -+ the MXS SAIF interface. -diff --git a/sound/soc/mxs/Makefile b/sound/soc/mxs/Makefile -index 565b5b5..cd0cf16 100644 ---- a/sound/soc/mxs/Makefile -+++ b/sound/soc/mxs/Makefile -@@ -8,3 +8,12 @@ obj-$(CONFIG_SND_MXS_SOC) += snd-soc-mxs.o snd-soc-mxs-pcm.o - snd-soc-mxs-sgtl5000-objs := mxs-sgtl5000.o - - obj-$(CONFIG_SND_SOC_MXS_SGTL5000) += snd-soc-mxs-sgtl5000.o -+ -+# i.MX23 built-in audio Machine and Platform support -+snd-soc-mxs-builtin-pcm-objs := mxs-builtin-pcm.o -+snd-soc-mxs-builtin-dai-objs := mxs-builtin-dai.o -+snd-soc-mxs-builtin-audio-objs := mxs-builtin-audio.o -+ -+obj-$(CONFIG_SND_MXS_SOC_BUILTIN) += snd-soc-mxs-builtin-pcm.o -+obj-$(CONFIG_SND_MXS_SOC_BUILTIN) += snd-soc-mxs-builtin-dai.o -+obj-$(CONFIG_SND_MXS_SOC_BUILTIN) += snd-soc-mxs-builtin-audio.o -diff --git a/sound/soc/mxs/mxs-builtin-audio.c b/sound/soc/mxs/mxs-builtin-audio.c -new file mode 100644 -index 0000000..7a27c63 ---- /dev/null -+++ b/sound/soc/mxs/mxs-builtin-audio.c -@@ -0,0 +1,120 @@ -+/* -+ * mxs-builtin-audio.c -- i.MX233 built-in codec ALSA Soc Audio driver -+ * -+ * Author: Michal Ulianko -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+static struct snd_soc_dai_link mxs_adc_dai_link[] = { -+ { -+ .name = "MXS ADC/DAC", -+ .stream_name = "MXS ADC/DAC", -+ .codec_dai_name = "mxs-builtin-codec-dai", -+// .codec_name = "mxs-builtin-codec", -+// .cpu_dai_name = "mxs-builtin-cpu-dai", -+// .platform_name = "mxs-builtin-cpu-dai", -+// .ops = &mxs_sgtl5000_hifi_ops, -+ }, -+}; -+ -+static struct snd_soc_card mxs_adc_audio = { -+ .name = "mxs-builtin-audio", -+ .owner = THIS_MODULE, -+ .dai_link = mxs_adc_dai_link, -+ .num_links = ARRAY_SIZE(mxs_adc_dai_link), -+}; -+ -+static int mxsadc_audio_probe_dt(struct platform_device *pdev) -+{ -+ struct device_node *np = pdev->dev.of_node; -+ struct device_node *cpu_dai_np, *codec_np; -+ int ret = 0; -+ -+ if (!np) -+ return 1; /* no device tree */ -+ -+ cpu_dai_np = of_parse_phandle(np, "cpu-dai", 0); -+ codec_np = of_parse_phandle(np, "audio-codec", 0); -+ if (!cpu_dai_np || !codec_np) { -+ dev_err(&pdev->dev, "phandle missing or invalid\n"); -+ return -EINVAL; -+ } -+ -+ mxs_adc_dai_link[0].codec_name = NULL; -+ mxs_adc_dai_link[0].codec_of_node = codec_np; -+ mxs_adc_dai_link[0].cpu_dai_name = NULL; -+ mxs_adc_dai_link[0].cpu_of_node = cpu_dai_np; -+ mxs_adc_dai_link[0].platform_name = NULL; -+ mxs_adc_dai_link[0].platform_of_node = cpu_dai_np; -+ -+// of_node_put(codec_np); -+// of_node_put(cpu_dai_np); -+ -+ return ret; -+} -+ -+static int mxsadc_audio_probe(struct platform_device *pdev) -+{ -+ struct snd_soc_card *card = &mxs_adc_audio; -+ int ret; -+ -+ ret = mxsadc_audio_probe_dt(pdev); -+ if (ret < 0) -+ return ret; -+ -+ card->dev = &pdev->dev; -+ platform_set_drvdata(pdev, card); -+ -+ ret = snd_soc_register_card(card); -+ if (ret) { -+ dev_err(&pdev->dev, "snd_soc_register_card failed (%d)\n", ret); -+ return ret; -+ } -+ -+ return 0; -+} -+ -+static int mxsadc_audio_remove(struct platform_device *pdev) -+{ -+ struct snd_soc_card *card = platform_get_drvdata(pdev); -+ -+ snd_soc_unregister_card(card); -+ -+ return 0; -+} -+ -+static const struct of_device_id mxs_adc_audio_dt_ids[] = { -+ { .compatible = "fsl,mxs-builtin-audio", }, -+ { /* sentinel */ } -+}; -+MODULE_DEVICE_TABLE(of, mxs_adc_audio_dt_ids); -+ -+static struct platform_driver mxs_adc_audio_driver = { -+ .driver = { -+ .name = "mxs-builtin-audio", -+ .owner = THIS_MODULE, -+ .of_match_table = mxs_adc_audio_dt_ids, -+ }, -+ .probe = mxsadc_audio_probe, -+ .remove = mxsadc_audio_remove, -+}; -+ -+module_platform_driver(mxs_adc_audio_driver); -+ -+MODULE_DESCRIPTION("Freescale MXS ADC/DAC SoC Machine Driver"); -+MODULE_AUTHOR("Michal Ulianko "); -+MODULE_LICENSE("GPL"); -diff --git a/sound/soc/mxs/mxs-builtin-dai.c b/sound/soc/mxs/mxs-builtin-dai.c -new file mode 100644 -index 0000000..de29256 ---- /dev/null -+++ b/sound/soc/mxs/mxs-builtin-dai.c -@@ -0,0 +1,588 @@ -+/* -+ * mxs-builtin-dai.c -- i.MX233 built-in codec ALSA Soc Audio driver -+ * -+ * Author: Michal Ulianko -+ * -+ * Based on sound/soc/mxs/mxs-adc.c for kernel 2.6.35 -+ * by Vladislav Buzov -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#include "../codecs/mxs-builtin-codec.h" -+#include "mxs-builtin-pcm.h" -+ -+#define ADC_VOLUME_MIN 0x37 -+ -+/* TODO Use codec IO function soc snd write etc, instead of __writel __readl */ -+ -+// TODO use container_of -+struct mxs_irq_data { -+ struct snd_pcm_substream *substream; -+ struct mxs_adc_priv *mxs_adc; -+}; -+ -+struct mxs_adc_priv { -+ struct mxs_irq_data irq_data; -+ int dma_adc_err_irq; -+ int dma_dac_err_irq; -+ int hp_short_irq; -+ void __iomem *audioin_base; -+ void __iomem *audioout_base; -+ void __iomem *rtc_base; -+}; -+ -+typedef struct { -+ struct work_struct work; -+ struct timer_list timer; -+ -+ /* target workqueue and CPU ->timer uses to queue ->work */ -+ struct workqueue_struct *wq; -+ int cpu; -+ -+ struct mxs_adc_priv *mxs_adc; -+} my_delayed_work_t; -+ -+// static struct delayed_work work; -+// static struct delayed_work adc_ramp_work; -+// static struct delayed_work dac_ramp_work; -+// static struct delayed_work test; -+static my_delayed_work_t work; -+static my_delayed_work_t adc_ramp_work; -+static my_delayed_work_t dac_ramp_work; -+static my_delayed_work_t test; -+static bool adc_ramp_done = 1; -+static bool dac_ramp_done = 1; -+ -+static inline void mxs_adc_schedule_work(struct delayed_work *work) -+{ -+ schedule_delayed_work(work, HZ / 10); -+} -+ -+static void mxs_adc_work(struct work_struct *work) -+{ -+ struct mxs_adc_priv *mxs_adc = ((my_delayed_work_t *)work)->mxs_adc; -+ /* disable irq */ -+ disable_irq(mxs_adc->hp_short_irq); -+ -+ while (true) { -+ __raw_writel(BM_AUDIOOUT_PWRDN_HEADPHONE, -+ mxs_adc->audioout_base + HW_AUDIOOUT_PWRDN_CLR); -+ msleep(10); -+ if ((__raw_readl(mxs_adc->audioout_base + HW_AUDIOOUT_ANACTRL) -+ & BM_AUDIOOUT_ANACTRL_SHORT_LR_STS) != 0) { -+ /* rearm the short protection */ -+ __raw_writel(BM_AUDIOOUT_ANACTRL_SHORTMODE_LR, -+ mxs_adc->audioout_base + HW_AUDIOOUT_ANACTRL_CLR); -+ __raw_writel(BM_AUDIOOUT_ANACTRL_SHORT_LR_STS, -+ mxs_adc->audioout_base + HW_AUDIOOUT_ANACTRL_CLR); -+ __raw_writel(BF_AUDIOOUT_ANACTRL_SHORTMODE_LR(0x1), -+ mxs_adc->audioout_base + HW_AUDIOOUT_ANACTRL_SET); -+ -+ __raw_writel(BM_AUDIOOUT_PWRDN_HEADPHONE, -+ mxs_adc->audioout_base + HW_AUDIOOUT_PWRDN_SET); -+ printk(KERN_WARNING "WARNING : Headphone LR short!\r\n"); -+ } else { -+ printk(KERN_WARNING "INFO : Headphone LR no longer short!\r\n"); -+ break; -+ } -+ msleep(1000); -+ } -+ -+ /* power up the HEADPHONE and un-mute the HPVOL */ -+ __raw_writel(BM_AUDIOOUT_HPVOL_MUTE, -+ mxs_adc->audioout_base + HW_AUDIOOUT_HPVOL_CLR); -+ __raw_writel(BM_AUDIOOUT_PWRDN_HEADPHONE, -+ mxs_adc->audioout_base + HW_AUDIOOUT_PWRDN_CLR); -+ -+ /* enable irq for next short detect*/ -+ enable_irq(mxs_adc->hp_short_irq); -+} -+ -+static void mxs_adc_schedule_ramp_work(struct delayed_work *work) -+{ -+ schedule_delayed_work(work, msecs_to_jiffies(2)); -+ adc_ramp_done = 0; -+} -+ -+static void mxs_adc_ramp_work(struct work_struct *work) -+{ -+ struct mxs_adc_priv *mxs_adc = ((my_delayed_work_t *)work)->mxs_adc; -+ u32 reg = 0; -+ u32 reg1 = 0; -+ u32 reg2 = 0; -+ u32 l, r; -+ u32 ll, rr; -+ int i; -+ -+ reg = __raw_readl(mxs_adc->audioin_base + \ -+ HW_AUDIOIN_ADCVOLUME); -+ -+ reg1 = reg & ~BM_AUDIOIN_ADCVOLUME_VOLUME_LEFT; -+ reg1 = reg1 & ~BM_AUDIOIN_ADCVOLUME_VOLUME_RIGHT; -+ /* minimize adc volume */ -+ reg2 = reg1 | -+ BF_AUDIOIN_ADCVOLUME_VOLUME_LEFT(ADC_VOLUME_MIN) | -+ BF_AUDIOIN_ADCVOLUME_VOLUME_RIGHT(ADC_VOLUME_MIN); -+ __raw_writel(reg2, -+ mxs_adc->audioin_base + HW_AUDIOIN_ADCVOLUME); -+ msleep(1); -+ -+ l = (reg & BM_AUDIOIN_ADCVOLUME_VOLUME_LEFT) >> -+ BP_AUDIOIN_ADCVOLUME_VOLUME_LEFT; -+ r = (reg & BM_AUDIOIN_ADCVOLUME_VOLUME_RIGHT) >> -+ BP_AUDIOIN_ADCVOLUME_VOLUME_RIGHT; -+ -+ /* fade in adc vol */ -+ for (i = ADC_VOLUME_MIN; (i < l) || (i < r);) { -+ i += 0x8; -+ ll = i < l ? i : l; -+ rr = i < r ? i : r; -+ reg2 = reg1 | -+ BF_AUDIOIN_ADCVOLUME_VOLUME_LEFT(ll) | -+ BF_AUDIOIN_ADCVOLUME_VOLUME_RIGHT(rr); -+ __raw_writel(reg2, -+ mxs_adc->audioin_base + HW_AUDIOIN_ADCVOLUME); -+ msleep(1); -+ } -+ adc_ramp_done = 1; -+} -+ -+static void mxs_dac_schedule_ramp_work(struct delayed_work *work) -+{ -+ schedule_delayed_work(work, msecs_to_jiffies(2)); -+ dac_ramp_done = 0; -+} -+ -+static void mxs_dac_ramp_work(struct work_struct *work) -+{ -+ struct mxs_adc_priv *mxs_adc = ((my_delayed_work_t *)work)->mxs_adc; -+ u32 reg = 0; -+ u32 reg1 = 0; -+ u32 l, r; -+ u32 ll, rr; -+ int i; -+ -+ /* unmute hp and speaker */ -+ __raw_writel(BM_AUDIOOUT_HPVOL_MUTE, -+ mxs_adc->audioout_base + HW_AUDIOOUT_HPVOL_CLR); -+ __raw_writel(BM_AUDIOOUT_SPEAKERCTRL_MUTE, -+ mxs_adc->audioout_base + HW_AUDIOOUT_SPEAKERCTRL_CLR); -+ -+ reg = __raw_readl(mxs_adc->audioout_base + \ -+ HW_AUDIOOUT_HPVOL); -+ -+ reg1 = reg & ~BM_AUDIOOUT_HPVOL_VOL_LEFT; -+ reg1 = reg1 & ~BM_AUDIOOUT_HPVOL_VOL_RIGHT; -+ -+ l = (reg & BM_AUDIOOUT_HPVOL_VOL_LEFT) >> -+ BP_AUDIOOUT_HPVOL_VOL_LEFT; -+ r = (reg & BM_AUDIOOUT_HPVOL_VOL_RIGHT) >> -+ BP_AUDIOOUT_HPVOL_VOL_RIGHT; -+ /* fade in hp vol */ -+ for (i = 0x7f; i > 0 ;) { -+ i -= 0x8; -+ ll = i > (int)l ? i : l; -+ rr = i > (int)r ? i : r; -+ reg = reg1 | BF_AUDIOOUT_HPVOL_VOL_LEFT(ll) -+ | BF_AUDIOOUT_HPVOL_VOL_RIGHT(rr); -+ __raw_writel(reg, -+ mxs_adc->audioout_base + HW_AUDIOOUT_HPVOL); -+ msleep(1); -+ } -+ dac_ramp_done = 1; -+} -+ -+/* IRQs */ -+static irqreturn_t mxs_short_irq(int irq, void *dev_id) -+{ -+ struct mxs_adc_priv *mxs_adc = dev_id; -+ //struct snd_pcm_substream *substream = mxs_adc->irq_data.substream; -+ -+ __raw_writel(BM_AUDIOOUT_ANACTRL_SHORTMODE_LR, -+ mxs_adc->audioout_base + HW_AUDIOOUT_ANACTRL_CLR); -+ __raw_writel(BM_AUDIOOUT_ANACTRL_SHORT_LR_STS, -+ mxs_adc->audioout_base + HW_AUDIOOUT_ANACTRL_CLR); -+ __raw_writel(BF_AUDIOOUT_ANACTRL_SHORTMODE_LR(0x1), -+ mxs_adc->audioout_base + HW_AUDIOOUT_ANACTRL_SET); -+ -+ __raw_writel(BM_AUDIOOUT_HPVOL_MUTE, -+ mxs_adc->audioout_base + HW_AUDIOOUT_HPVOL_SET); -+ __raw_writel(BM_AUDIOOUT_PWRDN_HEADPHONE, -+ mxs_adc->audioout_base + HW_AUDIOOUT_PWRDN_SET); -+ __raw_writel(BM_AUDIOOUT_ANACTRL_HP_CLASSAB, -+ mxs_adc->audioout_base + HW_AUDIOOUT_ANACTRL_SET); -+ -+ mxs_adc_schedule_work((struct delayed_work *) &work); -+ return IRQ_HANDLED; -+} -+ -+static irqreturn_t mxs_err_irq(int irq, void *dev_id) -+{ -+ struct mxs_adc_priv *mxs_adc = dev_id; -+ struct snd_pcm_substream *substream = mxs_adc->irq_data.substream; -+ int playback = substream->stream == SNDRV_PCM_STREAM_PLAYBACK ? 1 : 0; -+ u32 ctrl_reg; -+ u32 overflow_mask; -+ u32 underflow_mask; -+ -+ if (playback) { -+ ctrl_reg = __raw_readl(mxs_adc->audioout_base + HW_AUDIOOUT_CTRL); -+ underflow_mask = BM_AUDIOOUT_CTRL_FIFO_UNDERFLOW_IRQ; -+ overflow_mask = BM_AUDIOOUT_CTRL_FIFO_OVERFLOW_IRQ; -+ } else { -+ ctrl_reg = __raw_readl(mxs_adc->audioin_base + HW_AUDIOIN_CTRL); -+ underflow_mask = BM_AUDIOIN_CTRL_FIFO_UNDERFLOW_IRQ; -+ overflow_mask = BM_AUDIOIN_CTRL_FIFO_OVERFLOW_IRQ; -+ } -+ -+ if (ctrl_reg & underflow_mask) { -+ printk(KERN_DEBUG "%s underflow detected\n", -+ playback ? "DAC" : "ADC"); -+ -+ if (playback) -+ __raw_writel( -+ BM_AUDIOOUT_CTRL_FIFO_UNDERFLOW_IRQ, -+ mxs_adc->audioout_base + HW_AUDIOOUT_CTRL_CLR); -+ else -+ __raw_writel( -+ BM_AUDIOIN_CTRL_FIFO_UNDERFLOW_IRQ, -+ mxs_adc->audioin_base + HW_AUDIOIN_CTRL_CLR); -+ -+ } else if (ctrl_reg & overflow_mask) { -+ printk(KERN_DEBUG "%s overflow detected\n", -+ playback ? "DAC" : "ADC"); -+ -+ if (playback) -+ __raw_writel( -+ BM_AUDIOOUT_CTRL_FIFO_OVERFLOW_IRQ, -+ mxs_adc->audioout_base + HW_AUDIOOUT_CTRL_CLR); -+ else -+ __raw_writel(BM_AUDIOIN_CTRL_FIFO_OVERFLOW_IRQ, -+ mxs_adc->audioin_base + HW_AUDIOIN_CTRL_CLR); -+ } else -+ printk(KERN_WARNING "Unknown DAC error interrupt\n"); -+ -+ return IRQ_HANDLED; -+} -+/* END IRQs */ -+ -+static int mxs_trigger(struct snd_pcm_substream *substream, -+ int cmd, -+ struct snd_soc_dai *cpu_dai) -+{ -+ struct mxs_adc_priv *mxs_adc = snd_soc_dai_get_drvdata(cpu_dai); -+ int playback = substream->stream == SNDRV_PCM_STREAM_PLAYBACK ? 1 : 0; -+ int ret = 0; -+ -+ switch (cmd) { -+ case SNDRV_PCM_TRIGGER_START: -+ case SNDRV_PCM_TRIGGER_RESUME: -+ case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: -+ -+ if (playback) { -+ /* enable the fifo error interrupt */ -+ __raw_writel(BM_AUDIOOUT_CTRL_FIFO_ERROR_IRQ_EN, -+ mxs_adc->audioout_base + HW_AUDIOOUT_CTRL_SET); -+ /* write a data to data reg to trigger the transfer */ -+ __raw_writel(0x0, -+ mxs_adc->audioout_base + HW_AUDIOOUT_DATA); -+ mxs_dac_schedule_ramp_work((struct delayed_work *) &dac_ramp_work); -+ } else { -+// mxs_dma_get_info(prtd->dma_ch, &dma_info); -+// cur_bar1 = dma_info.buf_addr; -+// xfer_count1 = dma_info.xfer_count; -+ -+ __raw_writel(BM_AUDIOIN_CTRL_RUN, -+ mxs_adc->audioin_base + HW_AUDIOIN_CTRL_SET); -+ udelay(100); -+ -+// mxs_dma_get_info(prtd->dma_ch, &dma_info); -+// cur_bar2 = dma_info.buf_addr; -+// xfer_count2 = dma_info.xfer_count; -+// -+// /* check if DMA getting stuck */ -+// if ((xfer_count1 == xfer_count2) && (cur_bar1 == cur_bar2)) -+// /* read a data from data reg to trigger the receive */ -+// reg = __raw_readl(mxs_adc->audioin_base + HW_AUDIOIN_DATA); -+ -+ mxs_adc_schedule_ramp_work((struct delayed_work *) &adc_ramp_work); -+ } -+ break; -+ -+ case SNDRV_PCM_TRIGGER_SUSPEND: -+ case SNDRV_PCM_TRIGGER_STOP: -+ case SNDRV_PCM_TRIGGER_PAUSE_PUSH: -+ -+ if (playback) { -+// printk(KERN_INFO "SNDRV_PCM_TRIGGER_START\n"); -+// printk(KERN_INFO "ctrl:%x\n", __raw_readl(mxs_adc->audioout_base + HW_AUDIOOUT_CTRL)); -+// printk(KERN_INFO "stat:%x\n", __raw_readl(mxs_adc->audioout_base + HW_AUDIOOUT_STAT)); -+// printk(KERN_INFO "srr:%x\n", __raw_readl(mxs_adc->audioout_base + HW_AUDIOOUT_DACSRR)); -+// printk(KERN_INFO "vol:%x\n", __raw_readl(mxs_adc->audioout_base + HW_AUDIOOUT_DACVOLUME)); -+// printk(KERN_INFO "debug:%x\n", __raw_readl(mxs_adc->audioout_base + HW_AUDIOOUT_DACDEBUG)); -+// printk(KERN_INFO "hpvol:%x\n", __raw_readl(mxs_adc->audioout_base + HW_AUDIOOUT_HPVOL)); -+// printk(KERN_INFO "pwrdn:%x\n", __raw_readl(mxs_adc->audioout_base + HW_AUDIOOUT_PWRDN)); -+// printk(KERN_INFO "refc:%x\n", __raw_readl(mxs_adc->audioout_base + HW_AUDIOOUT_REFCTRL)); -+// printk(KERN_INFO "anac:%x\n", __raw_readl(mxs_adc->audioout_base + HW_AUDIOOUT_ANACTRL)); -+// printk(KERN_INFO "test:%x\n", __raw_readl(mxs_adc->audioout_base + HW_AUDIOOUT_TEST)); -+// printk(KERN_INFO "bist:%x\n", __raw_readl(mxs_adc->audioout_base + HW_AUDIOOUT_BISTCTRL)); -+// printk(KERN_INFO "anaclk:%x\n", __raw_readl(mxs_adc->audioout_base + HW_AUDIOOUT_ANACLKCTRL)); -+ -+ if (dac_ramp_done == 0) { -+ cancel_delayed_work((struct delayed_work *) &dac_ramp_work); -+ dac_ramp_done = 1; -+ } -+ __raw_writel(BM_AUDIOOUT_HPVOL_MUTE, -+ mxs_adc->audioout_base + HW_AUDIOOUT_HPVOL_SET); -+ __raw_writel(BM_AUDIOOUT_SPEAKERCTRL_MUTE, -+ mxs_adc->audioout_base + HW_AUDIOOUT_SPEAKERCTRL_SET); -+ /* disable the fifo error interrupt */ -+ __raw_writel(BM_AUDIOOUT_CTRL_FIFO_ERROR_IRQ_EN, -+ mxs_adc->audioout_base + HW_AUDIOOUT_CTRL_CLR); -+ mdelay(50); -+ } else { -+ if (adc_ramp_done == 0) { -+ cancel_delayed_work((struct delayed_work *) &adc_ramp_work); -+ adc_ramp_done = 1; -+ } -+ __raw_writel(BM_AUDIOIN_CTRL_RUN, -+ mxs_adc->audioin_base + HW_AUDIOIN_CTRL_CLR); -+ } -+ break; -+ -+ default: -+ printk(KERN_ERR "TRIGGER ERROR\n"); -+ ret = -EINVAL; -+ } -+ -+ return ret; -+} -+ -+static int mxs_startup(struct snd_pcm_substream *substream, -+ struct snd_soc_dai *cpu_dai) -+{ -+ struct mxs_adc_priv *mxs_adc = snd_soc_dai_get_drvdata(cpu_dai); -+ int playback = substream->stream == SNDRV_PCM_STREAM_PLAYBACK ? 1 : 0; -+ mxs_adc->irq_data.mxs_adc = mxs_adc; -+ mxs_adc->irq_data.substream = substream; -+ -+ work.mxs_adc = mxs_adc; -+ adc_ramp_work.mxs_adc = mxs_adc; -+ dac_ramp_work.mxs_adc = mxs_adc; -+ test.mxs_adc = mxs_adc; -+ INIT_DELAYED_WORK(&work, mxs_adc_work); -+ INIT_DELAYED_WORK(&adc_ramp_work, mxs_adc_ramp_work); -+ INIT_DELAYED_WORK(&dac_ramp_work, mxs_dac_ramp_work); -+ -+ /* Enable error interrupt */ -+ if (playback) { -+ __raw_writel(BM_AUDIOOUT_CTRL_FIFO_OVERFLOW_IRQ, -+ mxs_adc->audioout_base + HW_AUDIOOUT_CTRL_CLR); -+ __raw_writel(BM_AUDIOOUT_CTRL_FIFO_UNDERFLOW_IRQ, -+ mxs_adc->audioout_base + HW_AUDIOOUT_CTRL_CLR); -+ } else { -+ __raw_writel(BM_AUDIOIN_CTRL_FIFO_OVERFLOW_IRQ, -+ mxs_adc->audioin_base + HW_AUDIOIN_CTRL_CLR); -+ __raw_writel(BM_AUDIOIN_CTRL_FIFO_UNDERFLOW_IRQ, -+ mxs_adc->audioin_base + HW_AUDIOIN_CTRL_CLR); -+ __raw_writel(BM_AUDIOIN_CTRL_FIFO_ERROR_IRQ_EN, -+ mxs_adc->audioin_base + HW_AUDIOIN_CTRL_SET); -+ } -+ -+ return 0; -+} -+ -+static void mxs_shutdown(struct snd_pcm_substream *substream, -+ struct snd_soc_dai *cpu_dai) -+{ -+ struct mxs_adc_priv *mxs_adc = snd_soc_dai_get_drvdata(cpu_dai); -+ int playback = substream->stream == SNDRV_PCM_STREAM_PLAYBACK ? 1 : 0; -+ -+ /* Disable error interrupt */ -+ if (playback) { -+ __raw_writel(BM_AUDIOOUT_CTRL_FIFO_ERROR_IRQ_EN, -+ mxs_adc->audioout_base + HW_AUDIOOUT_CTRL_CLR); -+ } else { -+ __raw_writel(BM_AUDIOIN_CTRL_FIFO_ERROR_IRQ_EN, -+ mxs_adc->audioin_base + HW_AUDIOIN_CTRL_CLR); -+ } -+} -+ -+#define MXS_ADC_RATES SNDRV_PCM_RATE_8000_192000 -+#define MXS_ADC_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE) -+ -+static const struct snd_soc_dai_ops mxs_adc_dai_ops = { -+ .startup = mxs_startup, -+ .trigger = mxs_trigger, -+ .shutdown = mxs_shutdown, -+}; -+ -+static int mxs_dai_probe(struct snd_soc_dai *dai) -+{ -+ // TODO This does not make any sense. -+ struct mxs_adc_priv *mxs_adc = dev_get_drvdata(dai->dev); -+ -+ snd_soc_dai_set_drvdata(dai, mxs_adc); -+ -+ return 0; -+} -+ -+static struct snd_soc_dai_driver mxs_adc_dai = { -+ .name = "mxs-builtin-cpu-dai", -+ .probe = mxs_dai_probe, -+ .playback = { -+ .channels_min = 2, -+ .channels_max = 2, -+ .rates = MXS_ADC_RATES, -+ .formats = MXS_ADC_FORMATS, -+ }, -+ .capture = { -+ .channels_min = 2, -+ .channels_max = 2, -+ .rates = MXS_ADC_RATES, -+ .formats = MXS_ADC_FORMATS, -+ }, -+ .ops = &mxs_adc_dai_ops, -+}; -+ -+static const struct snd_soc_component_driver mxs_adc_component = { -+ .name = "mxs-xxx", //TODO change this name -+}; -+ -+static int mxs_adc_probe(struct platform_device *pdev) -+{ -+ struct device_node *np = pdev->dev.of_node; -+ struct mxs_adc_priv *mxs_adc; -+ int ret = 0; -+ -+ if (!np) -+ return -EINVAL; -+ -+ mxs_adc = devm_kzalloc(&pdev->dev, sizeof(*mxs_adc), GFP_KERNEL); -+ if (!mxs_adc) -+ return -ENOMEM; -+ -+ mxs_adc->audioout_base = devm_ioremap(&pdev->dev, 0x80048000, 0x2000); -+ if (IS_ERR(mxs_adc->audioout_base)) -+ return PTR_ERR(mxs_adc->audioout_base); -+ -+ mxs_adc->audioin_base = devm_ioremap(&pdev->dev, 0x8004c000, 0x2000); -+ if (IS_ERR(mxs_adc->audioin_base)) -+ return PTR_ERR(mxs_adc->audioin_base); -+ -+ mxs_adc->rtc_base = devm_ioremap(&pdev->dev, 0x8005c000, 0x2000); -+ if (IS_ERR(mxs_adc->rtc_base)) -+ return PTR_ERR(mxs_adc->rtc_base); -+ -+ /* Get IRQ numbers */ -+ mxs_adc->dma_adc_err_irq = platform_get_irq(pdev, 0); -+ if (mxs_adc->dma_adc_err_irq < 0) { -+ ret = mxs_adc->dma_adc_err_irq; -+ dev_err(&pdev->dev, "failed to get ADC DMA ERR irq resource: %d\n", ret); -+ return ret; -+ } -+ -+ mxs_adc->dma_dac_err_irq = platform_get_irq(pdev, 1); -+ if (mxs_adc->dma_dac_err_irq < 0) { -+ ret = mxs_adc->dma_dac_err_irq; -+ dev_err(&pdev->dev, "failed to get DAC DMA ERR irq resource: %d\n", ret); -+ return ret; -+ } -+ -+ mxs_adc->hp_short_irq = platform_get_irq(pdev, 2); -+ if (mxs_adc->hp_short_irq < 0) { -+ ret = mxs_adc->hp_short_irq; -+ dev_err(&pdev->dev, "failed to get HP_SHORT irq resource: %d\n", ret); -+ return ret; -+ } -+ -+ /* Request IRQs */ -+ ret = devm_request_irq(&pdev->dev, mxs_adc->dma_adc_err_irq, mxs_err_irq, 0, "MXS DAC and ADC Error", -+ mxs_adc); -+ if (ret) { -+ printk(KERN_ERR "%s: Unable to request ADC/DAC error irq %d\n", -+ __func__, mxs_adc->dma_adc_err_irq); -+ return ret; -+ } -+ -+ ret = devm_request_irq(&pdev->dev, mxs_adc->dma_dac_err_irq, mxs_err_irq, 0, "MXS DAC and ADC Error", -+ mxs_adc); -+ if (ret) { -+ printk(KERN_ERR "%s: Unable to request ADC/DAC error irq %d\n", -+ __func__, mxs_adc->dma_dac_err_irq); -+ return ret; -+ } -+ -+ ret = devm_request_irq(&pdev->dev, mxs_adc->hp_short_irq, mxs_short_irq, -+ IRQF_SHARED, "MXS DAC and ADC HP SHORT", mxs_adc); -+ if (ret) { -+ printk(KERN_ERR "%s: Unable to request ADC/DAC HP SHORT irq %d\n", -+ __func__, mxs_adc->hp_short_irq); -+ return ret; -+ } -+ -+ platform_set_drvdata(pdev, mxs_adc); -+ -+ ret = snd_soc_register_component(&pdev->dev, &mxs_adc_component, &mxs_adc_dai, 1); -+ if (ret) { -+ dev_err(&pdev->dev, "register DAI failed\n"); -+ return ret; -+ } -+ -+ ret = mxs_adc_pcm_platform_register(&pdev->dev); -+ if (ret) { -+ dev_err(&pdev->dev, "register PCM failed: %d\n", ret); -+ goto failed_pdev_alloc; -+ } -+ -+ return 0; -+ -+failed_pdev_alloc: -+ snd_soc_unregister_component(&pdev->dev); -+ -+ return ret; -+} -+ -+static int mxs_adc_remove(struct platform_device *pdev) -+{ -+ mxs_adc_pcm_platform_unregister(&pdev->dev); -+ snd_soc_unregister_component(&pdev->dev); -+ -+ return 0; -+} -+ -+static const struct of_device_id mxs_adc_dai_dt_ids[] = { -+ { .compatible = "fsl,mxs-builtin-cpu-dai", }, -+ { /* sentinel */ } -+}; -+MODULE_DEVICE_TABLE(of, mxs_adc_dai_dt_ids); -+ -+static struct platform_driver mxs_adc_dai_driver = { -+ .probe = mxs_adc_probe, -+ .remove = mxs_adc_remove, -+ -+ .driver = { -+ .name = "mxs-builtin-cpu-dai", -+ .owner = THIS_MODULE, -+ .of_match_table = mxs_adc_dai_dt_ids, -+ }, -+}; -+ -+module_platform_driver(mxs_adc_dai_driver); -+ -+MODULE_DESCRIPTION("Freescale MXS ADC/DAC SoC Codec DAI Driver"); -+MODULE_AUTHOR("Michal Ulianko "); -+MODULE_LICENSE("GPL"); -diff --git a/sound/soc/mxs/mxs-builtin-pcm.c b/sound/soc/mxs/mxs-builtin-pcm.c -new file mode 100644 -index 0000000..9f155df ---- /dev/null -+++ b/sound/soc/mxs/mxs-builtin-pcm.c -@@ -0,0 +1,69 @@ -+/* -+ * Copyright (C) 2011 Freescale Semiconductor, Inc. All Rights Reserved. -+ * -+ * Based on sound/soc/imx/imx-pcm-dma-mx2.c -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License as published by -+ * the Free Software Foundation; either version 2 of the License, or -+ * (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License along -+ * with this program; if not, write to the Free Software Foundation, Inc., -+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. -+ */ -+ -+#include -+#include -+#include -+ -+#include -+#include -+#include -+#include -+ -+#include "mxs-builtin-pcm.h" -+ -+static const struct snd_pcm_hardware snd_mxs_hardware = { -+ .info = SNDRV_PCM_INFO_MMAP | -+ SNDRV_PCM_INFO_MMAP_VALID | -+ SNDRV_PCM_INFO_PAUSE | -+ SNDRV_PCM_INFO_RESUME | -+ SNDRV_PCM_INFO_INTERLEAVED, -+ .formats = SNDRV_PCM_FMTBIT_S16_LE | -+ SNDRV_PCM_FMTBIT_S20_3LE | -+ SNDRV_PCM_FMTBIT_S24_LE, -+ .channels_min = 2, -+ .channels_max = 2, -+ .period_bytes_min = 32, -+ .period_bytes_max = 8192, -+ .periods_min = 1, -+ .periods_max = 52, -+ .buffer_bytes_max = 64 * 1024, -+ .fifo_size = 32, -+}; -+ -+static const struct snd_dmaengine_pcm_config mxs_dmaengine_pcm_config = { -+ .pcm_hardware = &snd_mxs_hardware, -+ .prealloc_buffer_size = 64 * 1024, -+}; -+ -+int mxs_adc_pcm_platform_register(struct device *dev) -+{ -+ return snd_dmaengine_pcm_register(dev, &mxs_dmaengine_pcm_config, -+ SND_DMAENGINE_PCM_FLAG_NO_RESIDUE); -+} -+EXPORT_SYMBOL_GPL(mxs_adc_pcm_platform_register); -+ -+void mxs_adc_pcm_platform_unregister(struct device *dev) -+{ -+ snd_dmaengine_pcm_unregister(dev); -+} -+EXPORT_SYMBOL_GPL(mxs_adc_pcm_platform_unregister); -+ -+MODULE_LICENSE("GPL"); -diff --git a/sound/soc/mxs/mxs-builtin-pcm.h b/sound/soc/mxs/mxs-builtin-pcm.h -new file mode 100644 -index 0000000..2fba109 ---- /dev/null -+++ b/sound/soc/mxs/mxs-builtin-pcm.h -@@ -0,0 +1,25 @@ -+/* -+ * Copyright (C) 2011 Freescale Semiconductor, Inc. All Rights Reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License as published by -+ * the Free Software Foundation; either version 2 of the License, or -+ * (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License along -+ * with this program; if not, write to the Free Software Foundation, Inc., -+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. -+ */ -+ -+#ifndef _MXS_PCM_H -+#define _MXS_PCM_H -+ -+int mxs_adc_pcm_platform_register(struct device *dev); -+void mxs_adc_pcm_platform_unregister(struct device *dev); -+ -+#endif --- -2.4.3 - diff --git a/core/linux-armv5-rc/0005-at91-ariag25-updates.patch b/core/linux-armv5-rc/0001-at91-ariag25-updates.patch similarity index 95% rename from core/linux-armv5-rc/0005-at91-ariag25-updates.patch rename to core/linux-armv5-rc/0001-at91-ariag25-updates.patch index 9c5be86ce..4a0c83c44 100644 --- a/core/linux-armv5-rc/0005-at91-ariag25-updates.patch +++ b/core/linux-armv5-rc/0001-at91-ariag25-updates.patch @@ -1,7 +1,7 @@ -From eb51d1cb5bce9627563695e385b39b891e998a4c Mon Sep 17 00:00:00 2001 +From add69dc91b475d71a299f0c1576793e5c1635b5c Mon Sep 17 00:00:00 2001 From: Douglas Gilbert <[mailto:dgilbert@interlog.com]> Date: Mon, 12 Aug 2013 10:36:25 -0500 -Subject: [PATCH 5/6] at91: ariag25 updates +Subject: [PATCH 1/2] at91: ariag25 updates v2: dropped at91sam9x5 usart fix, as merged mainline @@ -89,5 +89,5 @@ index e9ced30..8308515 100644 usb0: ohci@00600000 { -- -2.4.3 +2.4.5 diff --git a/core/linux-armv5-rc/0002-ARM-dts-imx23-olinuxino-enable-mxs-builtin-audio.patch b/core/linux-armv5-rc/0002-ARM-dts-imx23-olinuxino-enable-mxs-builtin-audio.patch deleted file mode 100644 index 186fc943c..000000000 --- a/core/linux-armv5-rc/0002-ARM-dts-imx23-olinuxino-enable-mxs-builtin-audio.patch +++ /dev/null @@ -1,54 +0,0 @@ -From 4ce602d47cfe84584d3254cc5d9210dcde51abdc Mon Sep 17 00:00:00 2001 -From: Robert Nelson -Date: Mon, 12 Aug 2013 11:27:22 -0500 -Subject: [PATCH 2/6] ARM: dts: imx23-olinuxino: enable mxs-builtin-audio - -Signed-off-by: Robert Nelson ---- - arch/arm/boot/dts/imx23-olinuxino.dts | 25 +++++++++++++++++++++++++ - 1 file changed, 25 insertions(+) - -diff --git a/arch/arm/boot/dts/imx23-olinuxino.dts b/arch/arm/boot/dts/imx23-olinuxino.dts -index 8204539..db0fd3f 100644 ---- a/arch/arm/boot/dts/imx23-olinuxino.dts -+++ b/arch/arm/boot/dts/imx23-olinuxino.dts -@@ -89,6 +89,25 @@ - usbphy0: usbphy@8007c000 { - status = "okay"; - }; -+ -+ codec: mxs-builtin-codec { -+ compatible = "fsl,mxs-builtin-codec"; -+ reg = <0x80048000 0x2000>, <0x8004c000 0x2000>, -+ <0x8005c000 0x2000>; -+ reg-names = "audioout", "audioin", "rtc"; -+ clocks = <&clks 31>; -+ clock-names = "filt"; -+ }; -+ -+ platform_dai: mxs-builtin-cpu-dai { -+ compatible = "fsl,mxs-builtin-cpu-dai"; -+ reg = <0x80048000 0x2000>, <0x8004c000 0x2000>, -+ <0x8005c000 0x2000>; -+ reg-names = "audioout", "audioin", "rtc"; -+ interrupts = <8 6 4>; -+ dmas = <&dma_apbx 0>, <&dma_apbx 1>; -+ dma-names = "rx", "tx"; -+ }; - }; - }; - -@@ -127,4 +146,10 @@ - gpios = <&gpio2 1 GPIO_ACTIVE_HIGH>; - }; - }; -+ -+ mxs-builtin-audio { -+ compatible = "fsl,mxs-builtin-audio"; -+ audio-codec = <&codec>; -+ cpu-dai = <&platform_dai>; -+ }; - }; --- -2.4.3 - diff --git a/core/linux-armv5-rc/0006-at91-arietta-g25-support.patch b/core/linux-armv5-rc/0002-at91-arietta-g25-support.patch similarity index 97% rename from core/linux-armv5-rc/0006-at91-arietta-g25-support.patch rename to core/linux-armv5-rc/0002-at91-arietta-g25-support.patch index 533e7a3e2..61301b206 100644 --- a/core/linux-armv5-rc/0006-at91-arietta-g25-support.patch +++ b/core/linux-armv5-rc/0002-at91-arietta-g25-support.patch @@ -1,7 +1,7 @@ -From 002ce387a17a7be9b625e05d1cb7e2f227aa7ca7 Mon Sep 17 00:00:00 2001 +From 2b820ecb336ca5c14227bb293a983ede0bf53523 Mon Sep 17 00:00:00 2001 From: Kevin Mihelich Date: Sat, 13 Jun 2015 13:46:30 -0600 -Subject: [PATCH 6/6] at91: arietta-g25 support +Subject: [PATCH 2/2] at91: arietta-g25 support Signed-off-by: Kevin Mihelich --- @@ -13,7 +13,7 @@ Signed-off-by: Kevin Mihelich create mode 100644 arch/arm/boot/dts/at91-arietta256.dts diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile -index 992736b..b91ed4d 100644 +index 246473a..1d33487 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -31,6 +31,8 @@ dtb-$(CONFIG_SOC_SAM_V4_V5) += \ @@ -22,9 +22,9 @@ index 992736b..b91ed4d 100644 at91-ariag25.dtb \ + at91-arietta128.dtb \ + at91-arietta256.dtb \ + at91-ariettag25.dtb \ at91-cosino_mega2560.dtb \ - at91sam9g15ek.dtb \ - at91sam9g25ek.dtb \ + at91-kizboxmini.dtb \ diff --git a/arch/arm/boot/dts/at91-arietta128.dts b/arch/arm/boot/dts/at91-arietta128.dts new file mode 100644 index 0000000..e43533d @@ -376,5 +376,5 @@ index 0000000..cbae789 + +}; -- -2.4.3 +2.4.5 diff --git a/core/linux-armv5-rc/0003-imx23-I2C-fixes.patch b/core/linux-armv5-rc/0003-imx23-I2C-fixes.patch deleted file mode 100644 index 19392b19c..000000000 --- a/core/linux-armv5-rc/0003-imx23-I2C-fixes.patch +++ /dev/null @@ -1,126 +0,0 @@ -From 211315da444680859fca69b2377d1c3a30d7c2b0 Mon Sep 17 00:00:00 2001 -From: Kevin Mihelich -Date: Wed, 18 Jun 2014 21:55:51 -0600 -Subject: [PATCH 3/6] imx23 I2C fixes - ---- - arch/arm/boot/dts/imx23-olinuxino.dts | 35 ++++++++++++++++++++++++++++++ - arch/arm/boot/dts/imx23.dtsi | 41 ++++++++++++++++++++++++++++++++++- - 2 files changed, 75 insertions(+), 1 deletion(-) - -diff --git a/arch/arm/boot/dts/imx23-olinuxino.dts b/arch/arm/boot/dts/imx23-olinuxino.dts -index db0fd3f..aca7625 100644 ---- a/arch/arm/boot/dts/imx23-olinuxino.dts -+++ b/arch/arm/boot/dts/imx23-olinuxino.dts -@@ -74,6 +74,25 @@ - status = "okay"; - }; - -+ i2c0: i2c@80058000 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&i2c1_pins_a>; -+ status = "okay"; -+ -+ sgtl5000: codec@0a { -+ compatible = "fsl,sgtl5000"; -+ reg = <0x0a>; -+ VDDA-supply = <®_3p3v>; -+ VDDIO-supply = <®_3p3v>; -+ }; -+ -+ at24@51 { -+ compatible = "at24,24c32"; -+ pagesize = <32>; -+ reg = <0x51>; -+ }; -+ }; -+ - duart: serial@80070000 { - pinctrl-names = "default"; - pinctrl-0 = <&duart_pins_a>; -@@ -134,6 +153,22 @@ - startup-delay-us = <300>; /* LAN9215 requires a POR of 200us minimum */ - gpio = <&gpio0 17 0>; - }; -+ -+ reg_3p3v: 3p3v { -+ compatible = "regulator-fixed"; -+ regulator-name = "3P3V"; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ regulator-always-on; -+ }; -+ }; -+ -+ sound { -+ compatible = "fsl,imx28-evk-sgtl5000", -+ "fsl,mxs-audio-sgtl5000"; -+ model = "imx28-evk-sgtl5000"; -+ saif-controllers = <&saif0 &saif1>; -+ audio-codec = <&sgtl5000>; - }; - - leds { -diff --git a/arch/arm/boot/dts/imx23.dtsi b/arch/arm/boot/dts/imx23.dtsi -index bbcfb5a..54b6a83 100644 ---- a/arch/arm/boot/dts/imx23.dtsi -+++ b/arch/arm/boot/dts/imx23.dtsi -@@ -308,6 +308,39 @@ - fsl,voltage = ; - fsl,pull-up = ; - }; -+ -+ i2c0_pins_a: i2c0@0 { -+ reg = <0>; -+ fsl,pinmux-ids = < -+ 0x01e0 /* MX23_PAD_I2C_SCL__I2C_SCL */ -+ 0x01f0 /* MX23_PAD_I2C_SDA__I2C_SDA */ -+ >; -+ fsl,drive-strength = <1>; -+ fsl,voltage = <1>; -+ fsl,pull-up = <1>; -+ }; -+ -+ i2c1_pins_a: i2c1@0 { -+ reg = <0>; -+ fsl,pinmux-ids = < -+ 0x1171 /* MX23_PAD_LCD_ENABLE__I2C_SCL */ -+ 0x1181 /* MX23_PAD_LCD_HSYNC__I2C_SDA */ -+ >; -+ fsl,drive-strength = <1>; -+ fsl,voltage = <1>; -+ fsl,pull-up = <1>; -+ }; -+ -+ i2c2_pins_a: i2c2@0 { -+ reg = <0>; -+ fsl,pinmux-ids = < -+ 0x2031 /* MX23_PAD_SSP1_DATA1__I2C_SCL */ -+ 0x2041 /* MX23_PAD_SSP1_DATA2__I2C_SDA */ -+ >; -+ fsl,drive-strength = <1>; -+ fsl,voltage = <1>; -+ fsl,pull-up = <1>; -+ }; - }; - - digctl@8001c000 { -@@ -444,8 +477,14 @@ - status = "disabled"; - }; - -- i2c@80058000 { -+ i2c0: i2c@80058000 { -+ #address-cells = <1>; -+ #size-cells = <0>; -+ compatible = "fsl,imx23-i2c"; - reg = <0x80058000 0x2000>; -+ interrupts = <27 26>; -+ clock-frequency = <100000>; -+ fsl,i2c-dma-channel = <3>; - dmas = <&dma_apbx 3>; - dma-names = "rx-tx"; - status = "disabled"; --- -2.4.3 - diff --git a/core/linux-armv5-rc/0004-Added-DTS-with-mxs-builtin-entries-for-testing-the-a.patch b/core/linux-armv5-rc/0004-Added-DTS-with-mxs-builtin-entries-for-testing-the-a.patch deleted file mode 100644 index c2223eb5e..000000000 --- a/core/linux-armv5-rc/0004-Added-DTS-with-mxs-builtin-entries-for-testing-the-a.patch +++ /dev/null @@ -1,173 +0,0 @@ -From a304cd81213a2b631a0c7900b324c867a922ad0c Mon Sep 17 00:00:00 2001 -From: Michal Ulianko -Date: Tue, 30 Jul 2013 14:28:17 +0200 -Subject: [PATCH 4/6] Added DTS with mxs-builtin-* entries for testing the - audio driver. - ---- - arch/arm/boot/dts/imx23-audio.dts | 153 ++++++++++++++++++++++++++++++++++++++ - 1 file changed, 153 insertions(+) - create mode 100644 arch/arm/boot/dts/imx23-audio.dts - -diff --git a/arch/arm/boot/dts/imx23-audio.dts b/arch/arm/boot/dts/imx23-audio.dts -new file mode 100644 -index 0000000..1555896 ---- /dev/null -+++ b/arch/arm/boot/dts/imx23-audio.dts -@@ -0,0 +1,153 @@ -+/* -+ * Copyright 2012 Freescale Semiconductor, Inc. -+ * -+ * Author: Fabio Estevam -+ * -+ * The code contained herein is licensed under the GNU General Public -+ * License. You may obtain a copy of the GNU General Public License -+ * Version 2 or later at the following locations: -+ * -+ * http://www.opensource.org/licenses/gpl-license.html -+ * http://www.gnu.org/copyleft/gpl.html -+ */ -+ -+/* -+ * DTS for testing mxs-builtin-audio. -+ */ -+ -+/dts-v1/; -+/include/ "imx23.dtsi" -+ -+/ { -+ model = "i.MX23 Olinuxino Low Cost Board"; -+ compatible = "olimex,imx23-olinuxino", "fsl,imx23"; -+ -+ memory { -+ reg = <0x40000000 0x04000000>; -+ }; -+ -+ apb@80000000 { -+ apbh@80000000 { -+ ssp0: ssp@80010000 { -+ compatible = "fsl,imx23-mmc"; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&mmc0_4bit_pins_a &mmc0_pins_fixup>; -+ bus-width = <4>; -+ broken-cd; -+ status = "okay"; -+ }; -+ -+ pinctrl@80018000 { -+ pinctrl-names = "default"; -+ // TODO Can gpio_keys use pinctrl? -+ pinctrl-0 = <&hog_pins_a &btns_pins_a>; -+ -+ hog_pins_a: hog@0 { -+ reg = <0>; -+ fsl,pinmux-ids = < -+ 0x0113 /* MX23_PAD_GPMI_ALE__GPIO_0_17 */ -+ >; -+ fsl,drive-strength = <0>; -+ fsl,voltage = <1>; -+ fsl,pull-up = <0>; -+ }; -+ -+ led_pin_gpio2_1: led_gpio2_1@0 { -+ reg = <0>; -+ fsl,pinmux-ids = < -+ 0x2013 /* MX23_PAD_SSP1_DETECT__GPIO_2_1 */ -+ >; -+ fsl,drive-strength = <0>; -+ fsl,voltage = <1>; -+ fsl,pull-up = <0>; -+ }; -+ -+ btns_pins_a: btns@0 { -+ reg = <0>; -+ fsl,pinmux-ids = < -+ 0x0033 /* MX23_PAD_GPMI_D03__GPIO_0_3 */ -+ 0x0043 /* MX23_PAD_GPMI_D04__GPIO_0_4 */ -+ 0x0053 /* MX23_PAD_GPMI_D05__GPIO_0_5 */ -+ 0x0063 /* MX23_PAD_GPMI_D06__GPIO_0_6 */ -+ 0x0073 /* MX23_PAD_GPMI_D07__GPIO_0_7 */ -+ >; -+ fsl,voltage = <1>; -+ fsl,pull-up = <1>; -+ }; -+ }; -+ -+ ssp1: ssp@80034000 { -+ #address-cells = <1>; -+ #size-cells = <0>; -+ compatible = "fsl,imx23-spi"; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&spi2_pins_a>; -+ status = "okay"; -+ }; -+ }; -+ -+ apbx@80040000 { -+ duart: serial@80070000 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&duart_pins_a>; -+ status = "okay"; -+ }; -+ -+ auart0: serial@8006c000 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&auart0_2pins_a>; -+ status = "okay"; -+ }; -+ -+ usbphy0: usbphy@8007c000 { -+ status = "okay"; -+ }; -+ -+ codec: mxs-builtin-codec { -+ compatible = "fsl,mxs-builtin-codec"; -+ reg = <0x80048000 0x2000>, <0x8004c000 0x2000>, -+ <0x8005c000 0x2000>; -+ reg-names = "audioout", "audioin", "rtc"; -+ clocks = <&clks 31>; -+ clock-names = "filt"; -+ }; -+ -+ platform_dai: mxs-builtin-cpu-dai { -+ compatible = "fsl,mxs-builtin-cpu-dai"; -+ reg = <0x80048000 0x2000>, <0x8004c000 0x2000>, -+ <0x8005c000 0x2000>; -+ reg-names = "audioout", "audioin", "rtc"; -+ interrupts = <8 6 4>; -+ dmas = <&dma_apbx 0>, <&dma_apbx 1>; -+ dma-names = "rx", "tx"; -+ }; -+ }; -+ }; -+ -+ ahb@80080000 { -+ usb0: usb@80080000 { -+ vbus-supply = <®_usb0_vbus>; -+ status = "okay"; -+ }; -+ }; -+ -+ regulators { -+ compatible = "simple-bus"; -+ -+ reg_usb0_vbus: usb0_vbus { -+ compatible = "regulator-fixed"; -+ regulator-name = "usb0_vbus"; -+ regulator-min-microvolt = <5000000>; -+ regulator-max-microvolt = <5000000>; -+ enable-active-high; -+ startup-delay-us = <300>; /* LAN9215 requires a POR of 200us minimum */ -+ gpio = <&gpio0 17 0>; -+ }; -+ }; -+ -+ mxs-builtin-audio { -+ compatible = "fsl,mxs-builtin-audio"; -+ audio-codec = <&codec>; -+ cpu-dai = <&platform_dai>; -+ }; -+}; --- -2.4.3 - diff --git a/core/linux-armv5-rc/PKGBUILD b/core/linux-armv5-rc/PKGBUILD index bbf300e89..660cf3ac5 100644 --- a/core/linux-armv5-rc/PKGBUILD +++ b/core/linux-armv5-rc/PKGBUILD @@ -3,8 +3,8 @@ buildarch=2 -_rcver=4.1 -_rcrel=8 +_rcver=4.2 +_rcrel=1 pkgbase=linux-armv5-rc _srcname=linux-4.$((${_rcver##*.}-1)) @@ -19,22 +19,14 @@ makedepends=('xmlto' 'docbook-xsl' 'kmod' 'inetutils' 'bc' 'git') options=('!strip') source=("http://www.kernel.org/pub/linux/kernel/v4.x/${_srcname}.tar.xz" "https://www.kernel.org/pub/linux/kernel/v4.x/testing/patch-${_rcver}-rc${_rcrel}.xz" - '0001-Added-ASoC-driver-for-i.MX233-s-builtin-ADC-DAC-code.patch' - '0002-ARM-dts-imx23-olinuxino-enable-mxs-builtin-audio.patch' - '0003-imx23-I2C-fixes.patch' - '0004-Added-DTS-with-mxs-builtin-entries-for-testing-the-a.patch' - '0005-at91-ariag25-updates.patch' - '0006-at91-arietta-g25-support.patch' + '0001-at91-ariag25-updates.patch' + '0002-at91-arietta-g25-support.patch' 'config') -md5sums=('a86916bd12798220da9eb4a1eec3616d' - '9bd2e3045ff03759558a5d94a27dfdc4' - '1576643242d4c2a4ef3f69c62cba953c' - 'dc460708c043cac8c70e733fcd6e1a9b' - 'e29707ad7bf5b2d357ad6d96cd9d88ac' - 'decd45d4861dbf461196e6af4e34e423' - '8c926477e229099a35ce4b67c13dcc6a' - '069885e001c96ed6095dedd9bf840141' - '80cc6e66dd3ac0c33bf15b975a466085') +md5sums=('fe9dc0f6729f36400ea81aa41d614c37' + 'bfd9e8391b982eedf8037d697ab7c1b6' + '3546c330c90f674bf823ca989f63a6f1' + 'fe0776a546e62cbd2c6b3696a4932ea4' + '9cf2fbc3873cbb57b8990fc2aa9e5390') prepare() { cd "${srcdir}/${_srcname}" @@ -43,12 +35,8 @@ prepare() { git apply --whitespace=nowarn ../patch-${_rcver}-rc${_rcrel} # ALARM patches - git apply ../0001-Added-ASoC-driver-for-i.MX233-s-builtin-ADC-DAC-code.patch - git apply ../0002-ARM-dts-imx23-olinuxino-enable-mxs-builtin-audio.patch - git apply ../0003-imx23-I2C-fixes.patch - git apply ../0004-Added-DTS-with-mxs-builtin-entries-for-testing-the-a.patch - git apply ../0005-at91-ariag25-updates.patch - git apply ../0006-at91-arietta-g25-support.patch + git apply ../0001-at91-ariag25-updates.patch + git apply ../0002-at91-arietta-g25-support.patch cat "${srcdir}/config" > ./.config diff --git a/core/linux-armv5-rc/config b/core/linux-armv5-rc/config index 498d1f041..232707539 100644 --- a/core/linux-armv5-rc/config +++ b/core/linux-armv5-rc/config @@ -1,6 +1,6 @@ # # Automatically generated file; DO NOT EDIT. -# Linux/arm 4.1.0-rc8-1 Kernel Configuration +# Linux/arm 4.2.0-rc1-1 Kernel Configuration # CONFIG_ARM=y CONFIG_ARM_HAS_SG_CHAIN=y @@ -97,11 +97,11 @@ CONFIG_TASK_IO_ACCOUNTING=y # RCU Subsystem # CONFIG_TINY_RCU=y +# CONFIG_RCU_EXPERT is not set CONFIG_SRCU=y # CONFIG_TASKS_RCU is not set # CONFIG_RCU_STALL_COMMON is not set # CONFIG_TREE_RCU_TRACE is not set -CONFIG_RCU_KTHREAD_PRIO=0 # CONFIG_RCU_EXPEDITE_BOOT is not set CONFIG_BUILD_BIN2C=y CONFIG_IKCONFIG=y @@ -127,6 +127,7 @@ CONFIG_CFS_BANDWIDTH=y CONFIG_RT_GROUP_SCHED=y CONFIG_BLK_CGROUP=y # CONFIG_DEBUG_BLK_CGROUP is not set +CONFIG_CGROUP_WRITEBACK=y # CONFIG_CHECKPOINT_RESTORE is not set CONFIG_NAMESPACES=y CONFIG_UTS_NS=y @@ -243,6 +244,7 @@ CONFIG_MODULE_UNLOAD=y # CONFIG_MODULE_SRCVERSION_ALL is not set # CONFIG_MODULE_SIG is not set # CONFIG_MODULE_COMPRESS is not set +CONFIG_MODULES_TREE_LOOKUP=y CONFIG_BLOCK=y CONFIG_LBDAF=y CONFIG_BLK_DEV_BSG=y @@ -428,6 +430,7 @@ CONFIG_HAVE_ARCH_PFN_VALID=y # CONFIG_HIGHMEM is not set CONFIG_HW_PERF_EVENTS=y CONFIG_ARCH_WANT_GENERAL_HUGETLB=y +# CONFIG_ARM_MODULE_PLTS is not set CONFIG_FLATMEM=y CONFIG_FLAT_NODE_MEM_MAP=y CONFIG_HAVE_MEMBLOCK=y @@ -557,6 +560,7 @@ CONFIG_ARCH_SUSPEND_POSSIBLE=y CONFIG_ARM_CPU_SUSPEND=y CONFIG_ARCH_HIBERNATION_POSSIBLE=y CONFIG_NET=y +CONFIG_NET_INGRESS=y # # Networking options @@ -600,7 +604,7 @@ CONFIG_SYN_COOKIES=y CONFIG_NET_UDP_TUNNEL=m CONFIG_NET_FOU=m CONFIG_NET_FOU_IP_TUNNELS=y -CONFIG_GENEVE=m +# CONFIG_GENEVE_CORE is not set CONFIG_INET_AH=m CONFIG_INET_ESP=m CONFIG_INET_IPCOMP=m @@ -625,6 +629,7 @@ CONFIG_TCP_CONG_VENO=m CONFIG_TCP_CONG_YEAH=m CONFIG_TCP_CONG_ILLINOIS=m CONFIG_TCP_CONG_DCTCP=m +# CONFIG_TCP_CONG_CDG is not set CONFIG_DEFAULT_CUBIC=y # CONFIG_DEFAULT_RENO is not set CONFIG_DEFAULT_TCP_CONG="cubic" @@ -665,6 +670,7 @@ CONFIG_BRIDGE_NETFILTER=m # # Core Netfilter Configuration # +CONFIG_NETFILTER_INGRESS=y CONFIG_NETFILTER_NETLINK=m CONFIG_NETFILTER_NETLINK_ACCT=m CONFIG_NETFILTER_NETLINK_QUEUE=m @@ -711,6 +717,7 @@ CONFIG_NF_NAT_REDIRECT=m CONFIG_NETFILTER_SYNPROXY=m CONFIG_NF_TABLES=m CONFIG_NF_TABLES_INET=m +# CONFIG_NF_TABLES_NETDEV is not set CONFIG_NFT_EXTHDR=m CONFIG_NFT_META=m CONFIG_NFT_CT=m @@ -990,7 +997,6 @@ CONFIG_BATMAN_ADV_MCAST=y CONFIG_OPENVSWITCH=m CONFIG_OPENVSWITCH_GRE=m CONFIG_OPENVSWITCH_VXLAN=m -CONFIG_OPENVSWITCH_GENEVE=m # CONFIG_VSOCKETS is not set # CONFIG_NETLINK_MMAP is not set # CONFIG_NETLINK_DIAG is not set @@ -1117,8 +1123,10 @@ CONFIG_BT_DEBUGFS=y # CONFIG_BT_INTEL=m CONFIG_BT_BCM=m +CONFIG_BT_RTL=m CONFIG_BT_HCIBTUSB=m CONFIG_BT_HCIBTUSB_BCM=y +CONFIG_BT_HCIBTUSB_RTL=y CONFIG_BT_HCIBTSDIO=m CONFIG_BT_HCIUART=m CONFIG_BT_HCIUART_H4=y @@ -1169,6 +1177,7 @@ CONFIG_MAC80211_LEDS=y # CONFIG_MAC80211_DEBUGFS is not set # CONFIG_MAC80211_MESSAGE_TRACING is not set # CONFIG_MAC80211_DEBUG_MENU is not set +CONFIG_MAC80211_STA_HASH_MAX_SIZE=0 CONFIG_WIMAX=m CONFIG_WIMAX_DEBUG_LEVEL=8 CONFIG_RFKILL=m @@ -1185,6 +1194,7 @@ CONFIG_NFC=m CONFIG_NFC_DIGITAL=m CONFIG_NFC_NCI=m CONFIG_NFC_NCI_SPI=y +# CONFIG_NFC_NCI_UART is not set CONFIG_NFC_HCI=m CONFIG_NFC_SHDLC=y @@ -1203,8 +1213,7 @@ CONFIG_NFC_MRVL=m CONFIG_NFC_MRVL_USB=m CONFIG_NFC_ST21NFCA=m CONFIG_NFC_ST21NFCA_I2C=m -CONFIG_NFC_ST21NFCB=m -CONFIG_NFC_ST21NFCB_I2C=m +# CONFIG_NFC_ST_NCI is not set CONFIG_NFC_NXP_NCI=m CONFIG_NFC_NXP_NCI_I2C=m CONFIG_HAVE_BPF_JIT=y @@ -1247,9 +1256,6 @@ CONFIG_DMA_SHARED_BUFFER=y # # Bus devices # -CONFIG_ARM_CCI=y -CONFIG_ARM_CCI400_COMMON=y -CONFIG_ARM_CCI400_PMU=y # CONFIG_ARM_CCN is not set # CONFIG_BRCMSTB_GISB_ARB is not set # CONFIG_VEXPRESS_CONFIG is not set @@ -1347,6 +1353,7 @@ CONFIG_MTD_NAND_IDS=y CONFIG_MTD_NAND_ATMEL=y # CONFIG_MTD_NAND_NANDSIM is not set # CONFIG_MTD_NAND_GPMI_NAND is not set +# CONFIG_MTD_NAND_BRCMNAND is not set # CONFIG_MTD_NAND_PLATFORM is not set # CONFIG_MTD_NAND_HISI504 is not set # CONFIG_MTD_ONENAND is not set @@ -1365,10 +1372,6 @@ CONFIG_MTD_UBI_GLUEBI=y # CONFIG_MTD_UBI_BLOCK is not set CONFIG_DTC=y CONFIG_OF=y - -# -# Device Tree and Open Firmware support -# # CONFIG_OF_UNITTEST is not set CONFIG_OF_FLATTREE=y CONFIG_OF_EARLY_FLATTREE=y @@ -1387,7 +1390,6 @@ CONFIG_BLK_DEV=y # CONFIG_BLK_DEV_NULL_BLK is not set CONFIG_ZRAM=m # CONFIG_ZRAM_LZ4_COMPRESS is not set -# CONFIG_ZRAM_DEBUG is not set # CONFIG_BLK_DEV_COW_COMMON is not set CONFIG_BLK_DEV_LOOP=y CONFIG_BLK_DEV_LOOP_MIN_COUNT=8 @@ -1397,7 +1399,6 @@ CONFIG_BLK_DEV_LOOP_MIN_COUNT=8 CONFIG_BLK_DEV_RAM=y CONFIG_BLK_DEV_RAM_COUNT=4 CONFIG_BLK_DEV_RAM_SIZE=8192 -# CONFIG_BLK_DEV_PMEM is not set # CONFIG_CDROM_PKTCDVD is not set # CONFIG_ATA_OVER_ETH is not set # CONFIG_MG_DISK is not set @@ -1458,6 +1459,10 @@ CONFIG_EEPROM_93CX6=m # Intel MIC Bus Driver # +# +# SCIF Bus Driver +# + # # Intel MIC Host Driver # @@ -1465,8 +1470,13 @@ CONFIG_EEPROM_93CX6=m # # Intel MIC Card Driver # + +# +# SCIF Driver +# # CONFIG_ECHO is not set # CONFIG_CXL_BASE is not set +# CONFIG_CXL_KERNEL_API is not set # # SCSI device support @@ -1522,6 +1532,7 @@ CONFIG_VXLAN=m # CONFIG_NETPOLL is not set # CONFIG_NET_POLL_CONTROLLER is not set CONFIG_TUN=m +# CONFIG_TUN_VNET_CROSS_LE is not set CONFIG_VETH=m # CONFIG_NLMON is not set @@ -1546,11 +1557,14 @@ CONFIG_CS89x0_PLATFORM=y CONFIG_DM9000=y # CONFIG_DM9000_FORCE_SIMPLE_PHY_POLL is not set # CONFIG_DNET is not set +CONFIG_NET_VENDOR_EZCHIP=y +# CONFIG_EZCHIP_NPS_MANAGEMENT_ENET is not set # CONFIG_NET_VENDOR_FARADAY is not set CONFIG_NET_VENDOR_FREESCALE=y CONFIG_FEC=y # CONFIG_FSL_PQ_MDIO is not set # CONFIG_FSL_XGMAC_MDIO is not set +# CONFIG_GIANFAR is not set CONFIG_NET_VENDOR_HISILICON=y # CONFIG_HIX5HD2_GMAC is not set # CONFIG_HIP04_ETH is not set @@ -1563,6 +1577,7 @@ CONFIG_NET_VENDOR_MICROCHIP=y # CONFIG_ETHOC is not set CONFIG_NET_VENDOR_QUALCOMM=y # CONFIG_QCA7000 is not set +CONFIG_NET_VENDOR_RENESAS=y CONFIG_NET_VENDOR_ROCKER=y CONFIG_NET_VENDOR_SAMSUNG=y # CONFIG_SXGBE_ETH is not set @@ -1602,6 +1617,7 @@ CONFIG_DAVICOM_PHY=y # CONFIG_STE10XP is not set # CONFIG_LSI_ET1011C_PHY is not set CONFIG_MICREL_PHY=y +# CONFIG_DP83867_PHY is not set # CONFIG_FIXED_PHY is not set # CONFIG_MDIO_BITBANG is not set # CONFIG_MDIO_BUS_MUX_GPIO is not set @@ -1740,6 +1756,7 @@ CONFIG_RT2X00_LIB_FIRMWARE=y CONFIG_RT2X00_LIB_CRYPTO=y CONFIG_RT2X00_LIB_LEDS=y # CONFIG_RT2X00_DEBUG is not set +# CONFIG_WL_MEDIATEK is not set CONFIG_RTL_CARDS=m CONFIG_RTL8192CU=m CONFIG_RTLWIFI=m @@ -1770,12 +1787,14 @@ CONFIG_IEEE802154_FAKELB=m CONFIG_IEEE802154_AT86RF230=m CONFIG_IEEE802154_MRF24J40=m CONFIG_IEEE802154_CC2520=m +# CONFIG_IEEE802154_ATUSB is not set # CONFIG_ISDN is not set # # Input device support # CONFIG_INPUT=y +CONFIG_INPUT_LEDS=y CONFIG_INPUT_FF_MEMLESS=m CONFIG_INPUT_POLLDEV=y # CONFIG_INPUT_SPARSEKMAP is not set @@ -1887,6 +1906,7 @@ CONFIG_TOUCHSCREEN_ADS7846=m # CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set # CONFIG_TOUCHSCREEN_TOUCHWIN is not set # CONFIG_TOUCHSCREEN_PIXCIR is not set +# CONFIG_TOUCHSCREEN_WDT87XX_I2C is not set # CONFIG_TOUCHSCREEN_WM97XX is not set # CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set CONFIG_TOUCHSCREEN_MC13783=m @@ -1931,6 +1951,7 @@ CONFIG_INPUT_CMA3000=m CONFIG_INPUT_CMA3000_I2C=m CONFIG_INPUT_SOC_BUTTON_ARRAY=m CONFIG_INPUT_DRV260X_HAPTICS=m +# CONFIG_INPUT_DRV2665_HAPTICS is not set CONFIG_INPUT_DRV2667_HAPTICS=m # @@ -2001,6 +2022,7 @@ CONFIG_SERIAL_MXS_AUART_CONSOLE=y # CONFIG_SERIAL_FSL_LPUART is not set # CONFIG_SERIAL_CONEXANT_DIGICOLOR is not set # CONFIG_SERIAL_ST_ASC is not set +# CONFIG_SERIAL_STM32 is not set CONFIG_SERIAL_MCTRL_GPIO=y # CONFIG_TTY_PRINTK is not set # CONFIG_HVC_DCC is not set @@ -2091,6 +2113,7 @@ CONFIG_SPI_ATMEL=y CONFIG_SPI_MXS=y # CONFIG_SPI_XCOMM is not set # CONFIG_SPI_XILINX is not set +# CONFIG_SPI_ZYNQMP_GQSPI is not set # CONFIG_SPI_DESIGNWARE is not set # @@ -2242,9 +2265,12 @@ CONFIG_POWER_SUPPLY=y # CONFIG_CHARGER_MANAGER is not set # CONFIG_CHARGER_BQ2415X is not set # CONFIG_CHARGER_BQ24190 is not set +# CONFIG_CHARGER_BQ24257 is not set # CONFIG_CHARGER_BQ24735 is not set +# CONFIG_CHARGER_BQ25890 is not set # CONFIG_CHARGER_SMB347 is not set # CONFIG_BATTERY_GAUGE_LTC2941 is not set +# CONFIG_CHARGER_RT9455 is not set CONFIG_POWER_RESET=y CONFIG_POWER_RESET_AT91_POWEROFF=y CONFIG_POWER_RESET_AT91_RESET=y @@ -2364,6 +2390,7 @@ CONFIG_SENSORS_MC13783_ADC=m # CONFIG_SENSORS_AMC6821 is not set # CONFIG_SENSORS_INA209 is not set # CONFIG_SENSORS_INA2XX is not set +# CONFIG_SENSORS_TC74 is not set # CONFIG_SENSORS_THMC50 is not set # CONFIG_SENSORS_TMP102 is not set # CONFIG_SENSORS_TMP103 is not set @@ -2563,7 +2590,6 @@ CONFIG_MEDIA_RADIO_SUPPORT=y CONFIG_MEDIA_SDR_SUPPORT=y CONFIG_MEDIA_RC_SUPPORT=y CONFIG_MEDIA_CONTROLLER=y -CONFIG_MEDIA_CONTROLLER_DVB=y CONFIG_VIDEO_DEV=m CONFIG_VIDEO_V4L2_SUBDEV_API=y CONFIG_VIDEO_V4L2=m @@ -2944,6 +2970,7 @@ CONFIG_DVB_TUNER_ITD1000=m CONFIG_DVB_TUNER_CX24113=m CONFIG_DVB_TDA826X=m CONFIG_DVB_CX24116=m +CONFIG_DVB_CX24120=m CONFIG_DVB_SI21XX=m CONFIG_DVB_TS2020=m CONFIG_DVB_DS3000=m @@ -3158,6 +3185,7 @@ CONFIG_SND_JACK=y # CONFIG_SND_HRTIMER is not set # CONFIG_SND_DYNAMIC_MINORS is not set CONFIG_SND_SUPPORT_OLD_API=y +CONFIG_SND_PROC_FS=y CONFIG_SND_VERBOSE_PROCFS=y # CONFIG_SND_VERBOSE_PRINTK is not set # CONFIG_SND_DEBUG is not set @@ -3179,6 +3207,7 @@ CONFIG_SND_DRIVERS=y # # HD-Audio # +CONFIG_SND_HDA_PREALLOC_SIZE=64 CONFIG_SND_ARM=y # CONFIG_SND_ARMAACI is not set @@ -3205,7 +3234,9 @@ CONFIG_SND_SOC=y CONFIG_SND_SOC_GENERIC_DMAENGINE_PCM=y CONFIG_SND_ATMEL_SOC=y CONFIG_SND_ATMEL_SOC_PDC=y +CONFIG_SND_ATMEL_SOC_SSC_PDC=y CONFIG_SND_ATMEL_SOC_DMA=y +CONFIG_SND_ATMEL_SOC_SSC_DMA=y CONFIG_SND_ATMEL_SOC_SSC=y CONFIG_SND_AT91_SOC_SAM9G20_WM8731=y CONFIG_SND_ATMEL_SOC_WM8904=y @@ -3227,7 +3258,6 @@ CONFIG_SND_AT91_SOC_SAM9X5_WM8731=y # CONFIG_SND_SOC_IMX_AUDMUX is not set CONFIG_SND_MXS_SOC=y CONFIG_SND_SOC_MXS_SGTL5000=y -CONFIG_SND_MXS_SOC_BUILTIN=y # CONFIG_SND_SOC_QCOM is not set # CONFIG_SND_SOC_XTFPGA_I2S is not set CONFIG_SND_SOC_I2C_AND_SPI=y @@ -3235,6 +3265,7 @@ CONFIG_SND_SOC_I2C_AND_SPI=y # # CODEC drivers # +# CONFIG_SND_SOC_AC97_CODEC is not set # CONFIG_SND_SOC_ADAU1701 is not set # CONFIG_SND_SOC_AK4104 is not set # CONFIG_SND_SOC_AK4554 is not set @@ -3269,6 +3300,7 @@ CONFIG_SND_SOC_SGTL5000=y # CONFIG_SND_SOC_STA350 is not set # CONFIG_SND_SOC_TAS2552 is not set # CONFIG_SND_SOC_TAS5086 is not set +# CONFIG_SND_SOC_TAS571X is not set # CONFIG_SND_SOC_TFA9879 is not set # CONFIG_SND_SOC_TLV320AIC23_I2C is not set # CONFIG_SND_SOC_TLV320AIC23_SPI is not set @@ -3293,7 +3325,6 @@ CONFIG_SND_SOC_WM8731=y CONFIG_SND_SOC_WM8904=y # CONFIG_SND_SOC_WM8962 is not set # CONFIG_SND_SOC_WM8978 is not set -CONFIG_SND_SOC_MXS_BUILTIN_CODEC=y # CONFIG_SND_SOC_TPA6130A2 is not set # CONFIG_SND_SIMPLE_CARD is not set # CONFIG_SOUND_PRIME is not set @@ -3421,6 +3452,7 @@ CONFIG_USB_OTG=y # CONFIG_USB_OTG_WHITELIST is not set # CONFIG_USB_OTG_BLACKLIST_HUB is not set CONFIG_USB_OTG_FSM=y +# CONFIG_USB_ULPI_BUS is not set # CONFIG_USB_MON is not set # CONFIG_USB_WUSB is not set # CONFIG_USB_WUSB_CBAF is not set @@ -3512,7 +3544,6 @@ CONFIG_USB_DWC2=y # # CONFIG_USB_DWC2_PERIPHERAL is not set CONFIG_USB_DWC2_DUAL_ROLE=y -CONFIG_USB_DWC2_PLATFORM=y # CONFIG_USB_DWC2_DEBUG is not set # CONFIG_USB_DWC2_TRACK_MISSED_SOFS is not set CONFIG_USB_CHIPIDEA=y @@ -3718,6 +3749,7 @@ CONFIG_MMC_SPI=y # CONFIG_MMC_VUB300 is not set # CONFIG_MMC_USHC is not set # CONFIG_MMC_USDHI6ROL0 is not set +# CONFIG_MMC_MTK is not set # CONFIG_MEMSTICK is not set CONFIG_NEW_LEDS=y CONFIG_LEDS_CLASS=y @@ -3726,6 +3758,8 @@ CONFIG_LEDS_CLASS=y # # LED drivers # +# CONFIG_LEDS_BCM6328 is not set +# CONFIG_LEDS_BCM6358 is not set # CONFIG_LEDS_LM3530 is not set # CONFIG_LEDS_LM3642 is not set # CONFIG_LEDS_PCA9532 is not set @@ -3745,6 +3779,7 @@ CONFIG_LEDS_PWM=y # CONFIG_LEDS_LT3593 is not set # CONFIG_LEDS_MC13783 is not set # CONFIG_LEDS_TCA6507 is not set +# CONFIG_LEDS_TLC591XX is not set # CONFIG_LEDS_LM355x is not set # @@ -3772,12 +3807,15 @@ CONFIG_LEDS_TRIGGER_DEFAULT_ON=y # CONFIG_LEDS_TRIGGER_TRANSIENT is not set # CONFIG_LEDS_TRIGGER_CAMERA is not set # CONFIG_ACCESSIBILITY is not set +CONFIG_EDAC_ATOMIC_SCRUB=y +CONFIG_EDAC_SUPPORT=y # CONFIG_EDAC is not set CONFIG_RTC_LIB=y CONFIG_RTC_CLASS=y CONFIG_RTC_HCTOSYS=y -CONFIG_RTC_SYSTOHC=y CONFIG_RTC_HCTOSYS_DEVICE="rtc0" +CONFIG_RTC_SYSTOHC=y +CONFIG_RTC_SYSTOHC_DEVICE="rtc0" # CONFIG_RTC_DEBUG is not set # @@ -3865,7 +3903,6 @@ CONFIG_RTC_DRV_AT91SAM9=y CONFIG_RTC_DRV_STMP=y CONFIG_RTC_DRV_MC13XXX=y # CONFIG_RTC_DRV_SNVS is not set -# CONFIG_RTC_DRV_XGENE is not set # # HID Sensor RTC drivers @@ -4038,6 +4075,7 @@ CONFIG_LIRC_ZILOG=m # # Android # +# CONFIG_STAGING_BOARD is not set CONFIG_USB_WPAN_HCD=m CONFIG_WIMAX_GDM72XX=m CONFIG_WIMAX_GDM72XX_QOS=y @@ -4058,6 +4096,7 @@ CONFIG_FB_TFT_BD663474=m CONFIG_FB_TFT_HX8340BN=m CONFIG_FB_TFT_HX8347D=m CONFIG_FB_TFT_HX8353D=m +# CONFIG_FB_TFT_HX8357D is not set CONFIG_FB_TFT_ILI9163=m CONFIG_FB_TFT_ILI9320=m CONFIG_FB_TFT_ILI9325=m @@ -4091,6 +4130,7 @@ CONFIG_COMMON_CLK=y # # CONFIG_COMMON_CLK_SI5351 is not set # CONFIG_COMMON_CLK_SI570 is not set +# CONFIG_COMMON_CLK_CDCE925 is not set # CONFIG_CLK_QORIQ is not set # CONFIG_COMMON_CLK_PWM is not set # CONFIG_COMMON_CLK_PXA is not set @@ -4105,6 +4145,7 @@ CONFIG_COMMON_CLK=y # CONFIG_CLKSRC_OF=y CONFIG_CLKSRC_MMIO=y +# CONFIG_ARM_TIMER_SP804 is not set CONFIG_ATMEL_PIT=y # CONFIG_SH_TIMER_CMT is not set # CONFIG_SH_TIMER_MTU2 is not set @@ -4125,6 +4166,7 @@ CONFIG_ATMEL_PIT=y # # SOC (System On Chip) specific Drivers # +# CONFIG_SUNXI_SRAM is not set # CONFIG_SOC_TI is not set # CONFIG_PM_DEVFREQ is not set # CONFIG_EXTCON is not set @@ -4153,6 +4195,8 @@ CONFIG_KXCJK1013=m CONFIG_MMA9551_CORE=m CONFIG_MMA9551=m CONFIG_MMA9553=m +# CONFIG_STK8312 is not set +# CONFIG_STK8BA50 is not set # # Analog to digital converters @@ -4213,6 +4257,7 @@ CONFIG_AD5755=m CONFIG_AD5764=m CONFIG_AD5791=m CONFIG_AD7303=m +# CONFIG_M62332 is not set CONFIG_MAX517=m CONFIG_MAX5821=m CONFIG_MCP4725=m @@ -4270,6 +4315,7 @@ CONFIG_IIO_ADIS_LIB_BUFFER=y CONFIG_ADJD_S311=m CONFIG_AL3320A=m CONFIG_APDS9300=m +# CONFIG_BH1750 is not set CONFIG_CM32181=m CONFIG_CM3232=m CONFIG_CM3323=m @@ -4280,6 +4326,7 @@ CONFIG_HID_SENSOR_ALS=m CONFIG_HID_SENSOR_PROX=m CONFIG_JSA1212=m CONFIG_LTR501=m +# CONFIG_STK3310 is not set CONFIG_TCS3414=m CONFIG_TCS3472=m CONFIG_SENSORS_TSL2563=m @@ -4293,9 +4340,11 @@ CONFIG_AK8975=m CONFIG_AK09911=m CONFIG_MAG3110=m CONFIG_HID_SENSOR_MAGNETOMETER_3D=m +# CONFIG_MMC35240 is not set CONFIG_IIO_ST_MAGN_3AXIS=m CONFIG_IIO_ST_MAGN_I2C_3AXIS=m CONFIG_IIO_ST_MAGN_SPI_3AXIS=m +# CONFIG_BMC150_MAGN is not set # # Inclinometer sensors @@ -4357,6 +4406,8 @@ CONFIG_ATMEL_AIC_IRQ=y # PHY Subsystem # # CONFIG_GENERIC_PHY is not set +# CONFIG_PHY_PXA_28NM_HSIC is not set +# CONFIG_PHY_PXA_28NM_USB2 is not set # CONFIG_BCM_KONA_USB2_PHY is not set # CONFIG_PHY_SAMSUNG_USB2 is not set # CONFIG_POWERCAP is not set @@ -4410,6 +4461,7 @@ CONFIG_F2FS_FS_XATTR=y CONFIG_F2FS_FS_POSIX_ACL=y CONFIG_F2FS_FS_SECURITY=y # CONFIG_F2FS_CHECK_FS is not set +# CONFIG_F2FS_FS_ENCRYPTION is not set CONFIG_FS_POSIX_ACL=y CONFIG_EXPORTFS=y CONFIG_FILE_LOCKING=y @@ -4465,6 +4517,7 @@ CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" CONFIG_PROC_FS=y CONFIG_PROC_SYSCTL=y CONFIG_PROC_PAGE_MONITOR=y +# CONFIG_PROC_CHILDREN is not set CONFIG_KERNFS=y CONFIG_SYSFS=y CONFIG_TMPFS=y @@ -4561,6 +4614,7 @@ CONFIG_CIFS_DEBUG=y # CONFIG_CIFS_DEBUG2 is not set CONFIG_CIFS_DFS_UPCALL=y CONFIG_CIFS_SMB2=y +# CONFIG_CIFS_SMB311 is not set CONFIG_CIFS_FSCACHE=y # CONFIG_NCP_FS is not set # CONFIG_CODA_FS is not set @@ -4672,6 +4726,7 @@ CONFIG_HAVE_DEBUG_KMEMLEAK=y CONFIG_PANIC_ON_OOPS_VALUE=0 CONFIG_PANIC_TIMEOUT=0 CONFIG_SCHED_DEBUG=y +CONFIG_SCHED_INFO=y CONFIG_SCHEDSTATS=y # CONFIG_SCHED_STACK_END_CHECK is not set # CONFIG_DEBUG_TIMEKEEPING is not set @@ -4707,6 +4762,7 @@ CONFIG_SCHEDSTATS=y # CONFIG_TORTURE_TEST is not set # CONFIG_RCU_TORTURE_TEST is not set # CONFIG_RCU_TRACE is not set +# CONFIG_RCU_EQS_DEBUG is not set # CONFIG_DEBUG_BLOCK_EXT_DEVT is not set # CONFIG_NOTIFIER_ERROR_INJECTION is not set # CONFIG_FAULT_INJECTION is not set @@ -4784,7 +4840,10 @@ CONFIG_CRYPTO_HASH=y CONFIG_CRYPTO_HASH2=y CONFIG_CRYPTO_RNG=y CONFIG_CRYPTO_RNG2=y +CONFIG_CRYPTO_RNG_DEFAULT=y CONFIG_CRYPTO_PCOMP2=y +CONFIG_CRYPTO_AKCIPHER2=y +# CONFIG_CRYPTO_RSA is not set CONFIG_CRYPTO_MANAGER=y CONFIG_CRYPTO_MANAGER2=y CONFIG_CRYPTO_USER=m @@ -4802,7 +4861,9 @@ CONFIG_CRYPTO_AUTHENC=m # CONFIG_CRYPTO_CCM=y CONFIG_CRYPTO_GCM=y +# CONFIG_CRYPTO_CHACHA20POLY1305 is not set CONFIG_CRYPTO_SEQIV=y +CONFIG_CRYPTO_ECHAINIV=m # # Block modes @@ -4830,6 +4891,7 @@ CONFIG_CRYPTO_CRC32C=y # CONFIG_CRYPTO_CRC32 is not set CONFIG_CRYPTO_CRCT10DIF=y CONFIG_CRYPTO_GHASH=y +# CONFIG_CRYPTO_POLY1305 is not set CONFIG_CRYPTO_MD4=m CONFIG_CRYPTO_MD5=y CONFIG_CRYPTO_MICHAEL_MIC=m @@ -4857,6 +4919,7 @@ CONFIG_CRYPTO_DES=y # CONFIG_CRYPTO_FCRYPT is not set # CONFIG_CRYPTO_KHAZAD is not set # CONFIG_CRYPTO_SALSA20 is not set +# CONFIG_CRYPTO_CHACHA20 is not set # CONFIG_CRYPTO_SEED is not set # CONFIG_CRYPTO_SERPENT is not set # CONFIG_CRYPTO_TEA is not set @@ -4868,6 +4931,7 @@ CONFIG_CRYPTO_DES=y CONFIG_CRYPTO_DEFLATE=y # CONFIG_CRYPTO_ZLIB is not set CONFIG_CRYPTO_LZO=y +# CONFIG_CRYPTO_842 is not set # CONFIG_CRYPTO_LZ4 is not set # CONFIG_CRYPTO_LZ4HC is not set @@ -4875,11 +4939,17 @@ CONFIG_CRYPTO_LZO=y # Random Number Generation # CONFIG_CRYPTO_ANSI_CPRNG=m -# CONFIG_CRYPTO_DRBG_MENU is not set +CONFIG_CRYPTO_DRBG_MENU=y +CONFIG_CRYPTO_DRBG_HMAC=y +# CONFIG_CRYPTO_DRBG_HASH is not set +# CONFIG_CRYPTO_DRBG_CTR is not set +CONFIG_CRYPTO_DRBG=y +CONFIG_CRYPTO_JITTERENTROPY=y CONFIG_CRYPTO_USER_API=m CONFIG_CRYPTO_USER_API_HASH=m CONFIG_CRYPTO_USER_API_SKCIPHER=m CONFIG_CRYPTO_USER_API_RNG=m +# CONFIG_CRYPTO_USER_API_AEAD is not set CONFIG_CRYPTO_HW=y CONFIG_CRYPTO_DEV_ATMEL_AES=y CONFIG_CRYPTO_DEV_ATMEL_TDES=y @@ -4889,6 +4959,7 @@ CONFIG_CRYPTO_DEV_MXS_DCP=y CONFIG_ARM_CRYPTO=y CONFIG_CRYPTO_SHA1_ARM=y CONFIG_CRYPTO_SHA256_ARM=y +# CONFIG_CRYPTO_SHA512_ARM is not set CONFIG_CRYPTO_AES_ARM=y # CONFIG_BINARY_PRINTF is not set @@ -4904,6 +4975,7 @@ CONFIG_GENERIC_NET_UTILS=y CONFIG_GENERIC_PCI_IOMAP=y CONFIG_GENERIC_IO=y CONFIG_STMP_DEVICE=y +CONFIG_PERCPU_RWSEM=y CONFIG_ARCH_USE_CMPXCHG_LOCKREF=y CONFIG_CRC_CCITT=y CONFIG_CRC16=y