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alarm/uboot-veyron to 2018.07-1

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This commit is contained in:
Kevin Mihelich 2018-09-03 02:07:31 +00:00
parent f9e9d94a27
commit a45dc08075
6 changed files with 119 additions and 57 deletions
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59
alarm/uboot-veyron/0001-rk3288-set-CONFIG_SYS_TEXT_BASE-for-depthcharge.patch
View file

@ -1,25 +1,50 @@
From c359ae27d1c204cf2594c357f3abf22e343d6ec8 Mon Sep 17 00:00:00 2001
From 223613ac9734ac242407d59e2cc9be3e6c32daf5 Mon Sep 17 00:00:00 2001
From: Kevin Mihelich <kevin@archlinuxarm.org>
Date: Mon, 7 Aug 2017 23:10:58 -0600
Subject: [PATCH 1/4] rk3288: set CONFIG_SYS_TEXT_BASE for depthcharge
---
include/configs/rk3288_common.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
configs/chromebit_mickey_defconfig | 2 +-
configs/chromebook_jerry_defconfig | 2 +-
configs/chromebook_minnie_defconfig | 2 +-
3 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/include/configs/rk3288_common.h b/include/configs/rk3288_common.h
index c7757f023f..07e51bafb1 100644
--- a/include/configs/rk3288_common.h
+++ b/include/configs/rk3288_common.h
@@ -27,7 +27,7 @@
/* Bootrom will load u-boot binary to 0x0 once return from SPL */
#define CONFIG_SYS_TEXT_BASE 0x00000000
#else
-#define CONFIG_SYS_TEXT_BASE 0x00100000
+#define CONFIG_SYS_TEXT_BASE 0x02000100
#endif
#define CONFIG_SYS_INIT_SP_ADDR 0x00100000
#define CONFIG_SYS_LOAD_ADDR 0x00800800
diff --git a/configs/chromebit_mickey_defconfig b/configs/chromebit_mickey_defconfig
index 37121771df..abf7dbb688 100644
--- a/configs/chromebit_mickey_defconfig
+++ b/configs/chromebit_mickey_defconfig
@@ -1,6 +1,6 @@
CONFIG_ARM=y
CONFIG_ARCH_ROCKCHIP=y
-CONFIG_SYS_TEXT_BASE=0x00100000
+CONFIG_SYS_TEXT_BASE=0x02000100
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_ROCKCHIP_RK3288=y
# CONFIG_SPL_MMC_SUPPORT is not set
diff --git a/configs/chromebook_jerry_defconfig b/configs/chromebook_jerry_defconfig
index 1b1c53e687..da1b3cedb8 100644
--- a/configs/chromebook_jerry_defconfig
+++ b/configs/chromebook_jerry_defconfig
@@ -1,6 +1,6 @@
CONFIG_ARM=y
CONFIG_ARCH_ROCKCHIP=y
-CONFIG_SYS_TEXT_BASE=0x00100000
+CONFIG_SYS_TEXT_BASE=0x02000100
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_ROCKCHIP_RK3288=y
# CONFIG_SPL_MMC_SUPPORT is not set
diff --git a/configs/chromebook_minnie_defconfig b/configs/chromebook_minnie_defconfig
index 3455fe50a8..71806cc8f4 100644
--- a/configs/chromebook_minnie_defconfig
+++ b/configs/chromebook_minnie_defconfig
@@ -1,6 +1,6 @@
CONFIG_ARM=y
CONFIG_ARCH_ROCKCHIP=y
-CONFIG_SYS_TEXT_BASE=0x00100000
+CONFIG_SYS_TEXT_BASE=0x02000100
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_ROCKCHIP_RK3288=y
# CONFIG_SPL_MMC_SUPPORT is not set
--
2.14.1
2.18.0

6
alarm/uboot-veyron/0002-rockchip-minnie-Add-a-.its-file-for-chromium.patch
View file

@ -1,10 +1,10 @@
From 8fe64bf19f3341886fdc4edd727fd3773a131100 Mon Sep 17 00:00:00 2001
From a51a820c341036900231c1cd1177de0a1c20dd79 Mon Sep 17 00:00:00 2001
From: Kevin Mihelich <kevin@archlinuxarm.org>
Date: Tue, 8 Aug 2017 18:40:45 -0600
Subject: [PATCH 2/4] rockchip: minnie: Add a .its file for chromium
---
doc/chromium/chromebook_minnie.its | 42 ++++++++++++++++++++++++++++++++++++++
doc/chromium/chromebook_minnie.its | 42 ++++++++++++++++++++++++++++++
1 file changed, 42 insertions(+)
create mode 100644 doc/chromium/chromebook_minnie.its
@ -57,5 +57,5 @@ index 0000000000..0efc1f0bdf
+ };
+};
--
2.14.1
2.18.0

6
alarm/uboot-veyron/0003-rockchip-mickey-Add-a-.its-file-for-chromium.patch
View file

@ -1,10 +1,10 @@
From 42325e59c81bf8892280d6da0831df314ae4663c Mon Sep 17 00:00:00 2001
From 1ba13491026558a0584616947ea5de054b3b6310 Mon Sep 17 00:00:00 2001
From: Kevin Mihelich <kevin@archlinuxarm.org>
Date: Tue, 8 Aug 2017 18:43:03 -0600
Subject: [PATCH 3/4] rockchip: mickey: Add a .its file for chromium
---
doc/chromium/chromebit_mickey.its | 42 +++++++++++++++++++++++++++++++++++++++
doc/chromium/chromebit_mickey.its | 42 +++++++++++++++++++++++++++++++
1 file changed, 42 insertions(+)
create mode 100644 doc/chromium/chromebit_mickey.its
@ -57,5 +57,5 @@ index 0000000000..44174a5edd
+ };
+};
--
2.14.1
2.18.0

25
alarm/uboot-veyron/0004-dtoc-python2-compatibility.patch
View file

@ -1,25 +0,0 @@
From 0e89248a96f4f1ec2825b9c14a86b87c6490f04e Mon Sep 17 00:00:00 2001
From: Kevin Mihelich <kevin@archlinuxarm.org>
Date: Wed, 6 Sep 2017 21:29:42 -0600
Subject: [PATCH 4/4] dtoc: python2 compatibility
---
scripts/Makefile.spl | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/scripts/Makefile.spl b/scripts/Makefile.spl
index dd8065d87d..93ed4f00dd 100644
--- a/scripts/Makefile.spl
+++ b/scripts/Makefile.spl
@@ -246,7 +246,7 @@ quiet_cmd_fdtgrep = FDTGREP $@
$(obj)/$(SPL_BIN).dtb: dts/dt.dtb $(objtree)/tools/fdtgrep FORCE
$(call if_changed,fdtgrep)
-pythonpath = PYTHONPATH=tools
+pythonpath = PYTHONPATH=tools $(PYTHON)
quiet_cmd_dtocc = DTOC C $@
cmd_dtocc = $(pythonpath) $(srctree)/tools/dtoc/dtoc -d $(obj)/$(SPL_BIN).dtb -o $@ platdata
--
2.14.1

62
alarm/uboot-veyron/0004-rockchip-jerry-Revert-.its-changes.patch Normal file
View file

@ -0,0 +1,62 @@
From 566ac9360786d1b404507893336f1e576e5f4279 Mon Sep 17 00:00:00 2001
From: Kevin Mihelich <kevin@archlinuxarm.org>
Date: Sun, 2 Sep 2018 19:20:16 -0600
Subject: [PATCH 4/4] rockchip: jerry: Revert .its changes
---
doc/chromium/chromebook_jerry.its | 16 ++++++++--------
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git a/doc/chromium/chromebook_jerry.its b/doc/chromium/chromebook_jerry.its
index 7505a20535..8cff840e00 100644
--- a/doc/chromium/chromebook_jerry.its
+++ b/doc/chromium/chromebook_jerry.its
@@ -5,7 +5,7 @@
#address-cells = <1>;
images {
- kernel {
+ kernel@1 {
description = "U-Boot mainline";
type = "kernel_noload";
arch = "arm";
@@ -14,29 +14,29 @@
compression = "none";
load = <0>;
entry = <0>;
- hash-2 {
+ hash@2 {
algo = "sha1";
};
};
- fdt-1{
+ fdt@1{
description = "rk3288-veryron-jerry.dtb";
data = /incbin/("../../b/chromebook_jerry/u-boot.dtb");
type = "flat_dt";
arch = "arm";
compression = "none";
- hash-1{
+ hash@1{
algo = "sha1";
};
};
};
configurations {
- default = "config-1";
- config-1 {
+ default = "config@1";
+ config@1 {
description = "Boot U-Boot";
- kernel = "kernel";
- fdt = "fdt-1";
+ kernel = "kernel@1";
+ fdt = "fdt@1";
};
};
};
--
2.18.0

18
alarm/uboot-veyron/PKGBUILD
View file

@ -5,26 +5,26 @@ buildarch=4
pkgbase=uboot-veyron
pkgname=('uboot-minnie' 'uboot-mickey' 'uboot-jerry')
pkgver=2017.11
pkgver=2018.07
pkgrel=1
arch=('armv7h')
url="http://git.denx.de/u-boot.git/"
license=('GPL')
makedepends=('git' 'bc' 'dtc' 'vboot-utils' 'python2' 'swig')
conflicts=('linux-veyron' 'linux-armv7-chromebook')
conflicts=('linux-veyron' 'linux-armv7-chromebook' 'linux-armv7-rc-chromebook')
install=${pkgbase}.install
source=("ftp://ftp.denx.de/pub/u-boot/u-boot-${pkgver/rc/-rc}.tar.bz2"
'0001-rk3288-set-CONFIG_SYS_TEXT_BASE-for-depthcharge.patch'
'0002-rockchip-minnie-Add-a-.its-file-for-chromium.patch'
'0003-rockchip-mickey-Add-a-.its-file-for-chromium.patch'
'0004-dtoc-python2-compatibility.patch'
'0004-rockchip-jerry-Revert-.its-changes.patch'
'boot.txt'
'mkscr')
md5sums=('7848f6fd197e2c6ef2eb483dd5bd2858'
'1ff4ad552e1c5d32ff0a561f2d6ac702'
'a7560967318753fbb2a60b0e15c5254d'
'612a0be69d8d55187ffe1782802cf566'
'b2080e9a988a5be5356ef1f782ec23f2'
md5sums=('2b8eaa30dd118b29889669070da22bb0'
'95e897b1cecb10cbefd9d3303101f326'
'1e59cda42c8b50bf7dc133dd38daecdc'
'7cbca7f7052c352e23c178eb5f97da90'
'0743c29a757d4299efb0532e651c78ca'
'029cb473f59f08834b54cdc3e34c9672'
'021623a04afd29ac3f368977140cfbfd')
@ -33,7 +33,7 @@ prepare() {
git apply ../0001-rk3288-set-CONFIG_SYS_TEXT_BASE-for-depthcharge.patch
git apply ../0002-rockchip-minnie-Add-a-.its-file-for-chromium.patch
git apply ../0003-rockchip-mickey-Add-a-.its-file-for-chromium.patch
git apply ../0004-dtoc-python2-compatibility.patch
git apply ../0004-rockchip-jerry-Revert-.its-changes.patch
}
build() {