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https://github.com/archlinuxarm/PKGBUILDs.git
synced 2024-11-08 22:45:43 +00:00
core/linux-imx6-cubox remove memset patch
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commit
c0c6a953e2
3 changed files with 5 additions and 214 deletions
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@ -24,12 +24,10 @@ options=('!strip')
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source=("https://github.com/solidrun/linux-imx6/archive/${_commit}.tar.gz"
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'config'
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'change-default-console-loglevel.pat'
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'memset.patch')
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'change-default-console-loglevel.pat')
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md5sums=('8126b6539bec11097fc28be644b486dc'
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'606f6e7cf7adba60a1a3f338a0bb642f'
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'9d3c56a4b999c8bfbd4018089a62f662'
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'39be2896f0b968d61a19b33da75ce6e0')
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'0c2db5b3e90c445d7659bd95490ca95f'
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'9d3c56a4b999c8bfbd4018089a62f662')
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prepare() {
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cd "${srcdir}/${_srcname}"
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@ -47,9 +45,6 @@ prepare() {
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# (relevant patch sent upstream: https://lkml.org/lkml/2011/7/26/227)
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patch -Np1 -i "${srcdir}/change-default-console-loglevel.pat"
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msg2 "Fix memset for GCC 4.8"
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patch -p1 -i "${srcdir}/memset.patch"
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}
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build() {
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@ -1,6 +1,6 @@
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#
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# Automatically generated make config: don't edit
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# Linux/arm 3.0.35-9 Kernel Configuration
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# Linux/arm 3.0.35-10 Kernel Configuration
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#
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CONFIG_ARM=y
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CONFIG_HAVE_PWM=y
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@ -327,7 +327,7 @@ CONFIG_MACH_MX6Q_SABRELITE=y
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CONFIG_MACH_MX6Q_SABRESD=y
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CONFIG_MACH_MX6Q_SABREAUTO=y
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CONFIG_MACH_MX6Q_HDMIDONGLE=y
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CONFIG_MACH_C1=y
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CONFIG_MACH_HB=y
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CONFIG_MACH_CUBOX_I=y
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#
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@ -1,204 +0,0 @@
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--- a/arch/arm/lib/memset.S
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+++ b/arch/arm/lib/memset.S
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@@ -19,9 +19,9 @@
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1: subs r2, r2, #4 @ 1 do we have enough
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blt 5f @ 1 bytes to align with?
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cmp r3, #2 @ 1
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- strltb r1, [r0], #1 @ 1
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- strleb r1, [r0], #1 @ 1
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- strb r1, [r0], #1 @ 1
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+ strltb r1, [ip], #1 @ 1
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+ strleb r1, [ip], #1 @ 1
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+ strb r1, [ip], #1 @ 1
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add r2, r2, r3 @ 1 (r2 = r2 - (4 - r3))
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/*
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* The pointer is now aligned and the length is adjusted. Try doing the
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@@ -29,10 +29,14 @@
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*/
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ENTRY(memset)
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- ands r3, r0, #3 @ 1 unaligned?
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+/*
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+ * Preserve the contents of r0 for the return value.
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+ */
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+ mov ip, r0
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+ ands r3, ip, #3 @ 1 unaligned?
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bne 1b @ 1
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/*
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- * we know that the pointer in r0 is aligned to a word boundary.
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+ * we know that the pointer in ip is aligned to a word boundary.
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*/
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orr r1, r1, r1, lsl #8
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orr r1, r1, r1, lsl #16
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@@ -43,29 +47,28 @@ ENTRY(memset)
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#if ! CALGN(1)+0
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/*
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- * We need an extra register for this loop - save the return address and
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- * use the LR
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+ * We need 2 extra registers for this loop - use r8 and the LR
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*/
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- str lr, [sp, #-4]!
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- mov ip, r1
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+ stmfd sp!, {r8, lr}
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+ mov r8, r1
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mov lr, r1
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2: subs r2, r2, #64
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- stmgeia r0!, {r1, r3, ip, lr} @ 64 bytes at a time.
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- stmgeia r0!, {r1, r3, ip, lr}
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- stmgeia r0!, {r1, r3, ip, lr}
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- stmgeia r0!, {r1, r3, ip, lr}
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+ stmgeia ip!, {r1, r3, r8, lr} @ 64 bytes at a time.
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+ stmgeia ip!, {r1, r3, r8, lr}
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+ stmgeia ip!, {r1, r3, r8, lr}
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+ stmgeia ip!, {r1, r3, r8, lr}
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bgt 2b
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- ldmeqfd sp!, {pc} @ Now <64 bytes to go.
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+ ldmeqfd sp!, {r8, pc} @ Now <64 bytes to go.
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/*
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* No need to correct the count; we're only testing bits from now on
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*/
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tst r2, #32
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- stmneia r0!, {r1, r3, ip, lr}
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- stmneia r0!, {r1, r3, ip, lr}
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+ stmneia ip!, {r1, r3, r8, lr}
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+ stmneia ip!, {r1, r3, r8, lr}
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tst r2, #16
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- stmneia r0!, {r1, r3, ip, lr}
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- ldr lr, [sp], #4
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+ stmneia ip!, {r1, r3, r8, lr}
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+ ldmfd sp!, {r8, lr}
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#else
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@@ -74,54 +77,54 @@ ENTRY(memset)
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* whole cache lines at once.
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*/
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- stmfd sp!, {r4-r7, lr}
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+ stmfd sp!, {r4-r8, lr}
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mov r4, r1
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mov r5, r1
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mov r6, r1
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mov r7, r1
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- mov ip, r1
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+ mov r8, r1
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mov lr, r1
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cmp r2, #96
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- tstgt r0, #31
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+ tstgt ip, #31
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ble 3f
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- and ip, r0, #31
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- rsb ip, ip, #32
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- sub r2, r2, ip
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- movs ip, ip, lsl #(32 - 4)
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- stmcsia r0!, {r4, r5, r6, r7}
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- stmmiia r0!, {r4, r5}
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- tst ip, #(1 << 30)
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- mov ip, r1
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- strne r1, [r0], #4
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+ and r8, ip, #31
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+ rsb r8, r8, #32
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+ sub r2, r2, r8
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+ movs r8, r8, lsl #(32 - 4)
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+ stmcsia ip!, {r4, r5, r6, r7}
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+ stmmiia ip!, {r4, r5}
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+ tst r8, #(1 << 30)
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+ mov r8, r1
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+ strne r1, [ip], #4
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3: subs r2, r2, #64
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- stmgeia r0!, {r1, r3-r7, ip, lr}
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- stmgeia r0!, {r1, r3-r7, ip, lr}
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+ stmgeia ip!, {r1, r3-r8, lr}
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+ stmgeia ip!, {r1, r3-r8, lr}
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bgt 3b
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- ldmeqfd sp!, {r4-r7, pc}
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+ ldmeqfd sp!, {r4-r8, pc}
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tst r2, #32
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- stmneia r0!, {r1, r3-r7, ip, lr}
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+ stmneia ip!, {r1, r3-r8, lr}
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tst r2, #16
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- stmneia r0!, {r4-r7}
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- ldmfd sp!, {r4-r7, lr}
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+ stmneia ip!, {r4-r7}
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+ ldmfd sp!, {r4-r8, lr}
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#endif
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4: tst r2, #8
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- stmneia r0!, {r1, r3}
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+ stmneia ip!, {r1, r3}
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tst r2, #4
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- strne r1, [r0], #4
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+ strne r1, [ip], #4
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/*
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* When we get here, we've got less than 4 bytes to zero. We
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* may have an unaligned pointer as well.
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*/
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5: tst r2, #2
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- strneb r1, [r0], #1
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- strneb r1, [r0], #1
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+ strneb r1, [ip], #1
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+ strneb r1, [ip], #1
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tst r2, #1
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- strneb r1, [r0], #1
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+ strneb r1, [ip], #1
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mov pc, lr
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ENDPROC(memset)
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--- a/arch/arm/lib/memset.S
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+++ b/arch/arm/lib/memset.S
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@@ -14,31 +14,15 @@
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.text
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.align 5
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- .word 0
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-
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-1: subs r2, r2, #4 @ 1 do we have enough
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- blt 5f @ 1 bytes to align with?
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- cmp r3, #2 @ 1
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- strltb r1, [ip], #1 @ 1
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- strleb r1, [ip], #1 @ 1
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- strb r1, [ip], #1 @ 1
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- add r2, r2, r3 @ 1 (r2 = r2 - (4 - r3))
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-/*
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- * The pointer is now aligned and the length is adjusted. Try doing the
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- * memset again.
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- */
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ENTRY(memset)
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-/*
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- * Preserve the contents of r0 for the return value.
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- */
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- mov ip, r0
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- ands r3, ip, #3 @ 1 unaligned?
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- bne 1b @ 1
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+ ands r3, r0, #3 @ 1 unaligned?
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+ mov ip, r0 @ preserve r0 as return value
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+ bne 6f @ 1
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/*
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* we know that the pointer in ip is aligned to a word boundary.
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*/
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- orr r1, r1, r1, lsl #8
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+1: orr r1, r1, r1, lsl #8
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orr r1, r1, r1, lsl #16
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mov r3, r1
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cmp r2, #16
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@@ -127,4 +111,13 @@ ENTRY(memset)
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tst r2, #1
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strneb r1, [ip], #1
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mov pc, lr
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+
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+6: subs r2, r2, #4 @ 1 do we have enough
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+ blt 5b @ 1 bytes to align with?
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+ cmp r3, #2 @ 1
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+ strltb r1, [ip], #1 @ 1
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+ strleb r1, [ip], #1 @ 1
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+ strb r1, [ip], #1 @ 1
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+ add r2, r2, r3 @ 1 (r2 = r2 - (4 - r3))
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+ b 1b
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ENDPROC(memset)
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