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extra/libvpx: patch fix
This commit is contained in:
parent
0cc1a3c06f
commit
cddf054867
3 changed files with 36 additions and 346 deletions
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@ -1,30 +1,33 @@
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From ac94b8f1653ee9a459aa26a65243d11b8c308064 Mon Sep 17 00:00:00 2001
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From: Kevin Mihelich <kevin@archlinuxarm.org>
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Date: Sun, 15 Jan 2017 12:11:57 -0700
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Subject: [PATCH] ARM fixes
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---
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build/make/configure.sh | 21 +++++++++++----------
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configure | 2 ++
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2 files changed, 13 insertions(+), 10 deletions(-)
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diff --git a/build/make/configure.sh b/build/make/configure.sh
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diff --git a/build/make/configure.sh b/build/make/configure.sh
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index 4f0071b..56abe0e 100644
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index 007e02000..c7e9076b3 100644
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--- a/build/make/configure.sh
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--- a/build/make/configure.sh
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+++ b/build/make/configure.sh
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+++ b/build/make/configure.sh
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@@ -680,6 +680,10 @@ process_common_toolchain() {
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@@ -680,6 +680,14 @@ process_common_toolchain() {
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aarch64*)
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aarch64*)
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tgt_isa=arm64
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tgt_isa=arm64
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;;
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;;
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+ armv6*-gnueabihf)
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+ tgt_isa=armv6
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+ float_abi=hard
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+ ;;
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armv6*)
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tgt_isa=armv6
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;;
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@@ -691,6 +695,10 @@ process_common_toolchain() {
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tgt_isa=armv7
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float_abi=softfp
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;;
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+ armv5te*)
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+ armv5te*)
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+ tgt_isa=armv5te
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+ tgt_isa=armv5te
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+ float_abi=soft
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+ float_abi=soft
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+ ;;
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+ ;;
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*x86_64*|*amd64*)
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+ armv6*-gnueabihf)
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tgt_isa=x86_64
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+ tgt_isa=armv6
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;;
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+ float_abi=hard
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@@ -876,7 +884,7 @@ process_common_toolchain() {
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+ ;;
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armv7*-hardfloat* | armv7*-gnueabihf | arm-*-gnueabihf)
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tgt_isa=armv7
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float_abi=hard
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@@ -873,7 +881,7 @@ process_common_toolchain() {
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soft_enable neon
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soft_enable neon
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;;
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;;
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armv7|armv7s)
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armv7|armv7s)
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@ -33,7 +36,7 @@ index 4f0071b..56abe0e 100644
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# Only enable neon_asm when neon is also enabled.
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# Only enable neon_asm when neon is also enabled.
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enabled neon && soft_enable neon_asm
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enabled neon && soft_enable neon_asm
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# If someone tries to force it through, die.
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# If someone tries to force it through, die.
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@@ -927,13 +935,6 @@ process_common_toolchain() {
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@@ -894,13 +902,6 @@ process_common_toolchain() {
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check_add_asflags --defsym ARCHITECTURE=${arch_int}
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check_add_asflags --defsym ARCHITECTURE=${arch_int}
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tune_cflags="-mtune="
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tune_cflags="-mtune="
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if [ ${tgt_isa} = "armv7" ] || [ ${tgt_isa} = "armv7s" ]; then
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if [ ${tgt_isa} = "armv7" ] || [ ${tgt_isa} = "armv7s" ]; then
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@ -47,7 +50,7 @@ index 4f0071b..56abe0e 100644
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check_add_cflags -march=armv7-a -mfloat-abi=${float_abi}
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check_add_cflags -march=armv7-a -mfloat-abi=${float_abi}
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check_add_asflags -march=armv7-a -mfloat-abi=${float_abi}
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check_add_asflags -march=armv7-a -mfloat-abi=${float_abi}
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@@ -945,8 +946,8 @@ EOF
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@@ -912,8 +913,8 @@ EOF
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check_add_cflags -march=armv8-a
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check_add_cflags -march=armv8-a
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check_add_asflags -march=armv8-a
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check_add_asflags -march=armv8-a
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else
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else
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@ -59,14 +62,18 @@ index 4f0071b..56abe0e 100644
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enabled debug && add_asflags -g
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enabled debug && add_asflags -g
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diff --git a/configure b/configure
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diff --git a/configure b/configure
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index f82ee04..911733f 100755
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index fb732acf3..43a730fdb 100755
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--- a/configure
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--- a/configure
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+++ b/configure
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+++ b/configure
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@@ -97,6 +97,7 @@ EOF
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@@ -101,6 +101,8 @@ EOF
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all_platforms="${all_platforms} arm64-android-gcc"
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# all_platforms is a list of all supported target platforms. Maintain
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# alphabetically by architecture, generic-gnu last.
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+all_platforms="${all_platforms} armv5te-linux-gcc"
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all_platforms="${all_platforms} arm64-darwin-gcc"
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all_platforms="${all_platforms} arm64-darwin-gcc"
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all_platforms="${all_platforms} arm64-linux-gcc"
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all_platforms="${all_platforms} arm64-linux-gcc"
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all_platforms="${all_platforms} armv6-linux-rvct"
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+all_platforms="${all_platforms} armv5te-linux-gcc"
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+all_platforms="${all_platforms} armv6-linux-gcc"
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all_platforms="${all_platforms} armv7-android-gcc" #neon Cortex-A8
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all_platforms="${all_platforms} armv7-darwin-gcc" #neon Cortex-A8
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all_platforms="${all_platforms} armv7-linux-rvct" #neon Cortex-A8
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--
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2.11.0
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@ -1,317 +0,0 @@
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From 7361ef732b432e153496c30da66081d7e530c7f6 Mon Sep 17 00:00:00 2001
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From: Peter de Rivaz <peter.derivaz@argondesign.com>
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Date: Mon, 14 Dec 2015 16:35:29 +0000
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Subject: [PATCH] Fix for issue 1114 compile error
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In 32-bit build with --enable-shared, there is a lot of
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register pressure and register src_strideq is reused.
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The code needs to use the stack based version of src_stride,
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but this doesn't compile when used in an lea instruction.
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This patch also fixes a related segmentation fault caused by the
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implementation using src_strideq even though it has been
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reused.
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This patch also fixes the HBD subpel variance tests that fail
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when compiled without disable-optimizations.
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These failures were caused by local variables in the assembler
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routines colliding with the caller's stack frame.
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Change-Id: Ice9d4dafdcbdc6038ad5ee7c1c09a8f06deca362
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---
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vpx_dsp/x86/highbd_subpel_variance_impl_sse2.asm | 18 +++----
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vpx_dsp/x86/highbd_variance_sse2.c | 64 ++++++++++++++----------
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2 files changed, 44 insertions(+), 38 deletions(-)
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diff --git a/vpx_dsp/x86/highbd_subpel_variance_impl_sse2.asm b/vpx_dsp/x86/highbd_subpel_variance_impl_sse2.asm
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index 22d52a2..30ee81b 100644
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--- a/vpx_dsp/x86/highbd_subpel_variance_impl_sse2.asm
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+++ b/vpx_dsp/x86/highbd_subpel_variance_impl_sse2.asm
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@@ -79,20 +79,13 @@ SECTION .text
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%macro INC_SRC_BY_SRC_STRIDE 0
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%if ARCH_X86=1 && CONFIG_PIC=1
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- lea srcq, [srcq + src_stridemp*2]
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+ add srcq, src_stridemp
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+ add srcq, src_stridemp
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%else
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lea srcq, [srcq + src_strideq*2]
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%endif
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%endmacro
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-%macro INC_SRC_BY_SRC_2STRIDE 0
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-%if ARCH_X86=1 && CONFIG_PIC=1
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- lea srcq, [srcq + src_stridemp*4]
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-%else
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- lea srcq, [srcq + src_strideq*4]
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-%endif
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-%endmacro
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-
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%macro SUBPEL_VARIANCE 1-2 0 ; W
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%define bilin_filter_m bilin_filter_m_sse2
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%define filter_idx_shift 5
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@@ -984,8 +977,9 @@ SECTION .text
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.x_other_y_other_loop:
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movu m2, [srcq]
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movu m4, [srcq+2]
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- movu m3, [srcq+src_strideq*2]
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- movu m5, [srcq+src_strideq*2+2]
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+ INC_SRC_BY_SRC_STRIDE
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+ movu m3, [srcq]
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+ movu m5, [srcq+2]
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pmullw m2, filter_x_a
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pmullw m4, filter_x_b
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paddw m2, filter_rnd
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@@ -1018,7 +1012,7 @@ SECTION .text
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SUM_SSE m0, m2, m4, m3, m6, m7
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mova m0, m5
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- INC_SRC_BY_SRC_2STRIDE
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+ INC_SRC_BY_SRC_STRIDE
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lea dstq, [dstq + dst_strideq * 4]
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%if %2 == 1 ; avg
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add secq, sec_str
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diff --git a/vpx_dsp/x86/highbd_variance_sse2.c b/vpx_dsp/x86/highbd_variance_sse2.c
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index b45331c..81ec5db 100644
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--- a/vpx_dsp/x86/highbd_variance_sse2.c
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+++ b/vpx_dsp/x86/highbd_variance_sse2.c
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@@ -243,13 +243,18 @@ unsigned int vpx_highbd_12_mse8x8_sse2(const uint8_t *src8, int src_stride,
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}
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#if CONFIG_USE_X86INC
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+// The 2 unused parameters are place holders for PIC enabled build.
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+// These definitions are for functions defined in
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+// highbd_subpel_variance_impl_sse2.asm
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#define DECL(w, opt) \
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int vpx_highbd_sub_pixel_variance##w##xh_##opt(const uint16_t *src, \
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ptrdiff_t src_stride, \
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int x_offset, int y_offset, \
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const uint16_t *dst, \
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ptrdiff_t dst_stride, \
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- int height, unsigned int *sse);
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+ int height, \
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+ unsigned int *sse, \
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+ void *unused0, void *unused);
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#define DECLS(opt1, opt2) \
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DECL(8, opt1); \
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DECL(16, opt1)
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@@ -274,7 +279,7 @@ uint32_t vpx_highbd_8_sub_pixel_variance##w##x##h##_##opt(const uint8_t *src8, \
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int se = vpx_highbd_sub_pixel_variance##wf##xh_##opt(src, src_stride, \
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x_offset, y_offset, \
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dst, dst_stride, h, \
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- &sse); \
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+ &sse, NULL, NULL); \
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if (w > wf) { \
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unsigned int sse2; \
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int se2 = vpx_highbd_sub_pixel_variance##wf##xh_##opt(src + 16, \
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@@ -282,19 +287,20 @@ uint32_t vpx_highbd_8_sub_pixel_variance##w##x##h##_##opt(const uint8_t *src8, \
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x_offset, y_offset, \
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dst + 16, \
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dst_stride, \
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- h, &sse2); \
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+ h, &sse2, \
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+ NULL, NULL); \
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se += se2; \
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sse += sse2; \
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if (w > wf * 2) { \
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se2 = vpx_highbd_sub_pixel_variance##wf##xh_##opt(src + 32, src_stride, \
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x_offset, y_offset, \
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dst + 32, dst_stride, \
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- h, &sse2); \
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+ h, &sse2, NULL, NULL); \
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se += se2; \
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sse += sse2; \
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se2 = vpx_highbd_sub_pixel_variance##wf##xh_##opt( \
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src + 48, src_stride, x_offset, y_offset, \
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- dst + 48, dst_stride, h, &sse2); \
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+ dst + 48, dst_stride, h, &sse2, NULL, NULL); \
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se += se2; \
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sse += sse2; \
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} \
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@@ -312,7 +318,7 @@ uint32_t vpx_highbd_10_sub_pixel_variance##w##x##h##_##opt( \
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int se = vpx_highbd_sub_pixel_variance##wf##xh_##opt(src, src_stride, \
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x_offset, y_offset, \
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dst, dst_stride, \
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- h, &sse); \
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+ h, &sse, NULL, NULL); \
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if (w > wf) { \
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uint32_t sse2; \
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int se2 = vpx_highbd_sub_pixel_variance##wf##xh_##opt(src + 16, \
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@@ -320,20 +326,21 @@ uint32_t vpx_highbd_10_sub_pixel_variance##w##x##h##_##opt( \
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x_offset, y_offset, \
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dst + 16, \
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dst_stride, \
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- h, &sse2); \
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+ h, &sse2, \
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+ NULL, NULL); \
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se += se2; \
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sse += sse2; \
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if (w > wf * 2) { \
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se2 = vpx_highbd_sub_pixel_variance##wf##xh_##opt(src + 32, src_stride, \
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x_offset, y_offset, \
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dst + 32, dst_stride, \
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- h, &sse2); \
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+ h, &sse2, NULL, NULL); \
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se += se2; \
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sse += sse2; \
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se2 = vpx_highbd_sub_pixel_variance##wf##xh_##opt(src + 48, src_stride, \
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x_offset, y_offset, \
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dst + 48, dst_stride, \
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- h, &sse2); \
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+ h, &sse2, NULL, NULL); \
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se += se2; \
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sse += sse2; \
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} \
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@@ -359,27 +366,27 @@ uint32_t vpx_highbd_12_sub_pixel_variance##w##x##h##_##opt( \
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int se2 = vpx_highbd_sub_pixel_variance##wf##xh_##opt( \
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src + (start_row * src_stride), src_stride, \
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x_offset, y_offset, dst + (start_row * dst_stride), \
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- dst_stride, height, &sse2); \
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+ dst_stride, height, &sse2, NULL, NULL); \
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se += se2; \
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long_sse += sse2; \
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if (w > wf) { \
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se2 = vpx_highbd_sub_pixel_variance##wf##xh_##opt( \
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src + 16 + (start_row * src_stride), src_stride, \
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x_offset, y_offset, dst + 16 + (start_row * dst_stride), \
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- dst_stride, height, &sse2); \
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+ dst_stride, height, &sse2, NULL, NULL); \
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se += se2; \
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long_sse += sse2; \
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if (w > wf * 2) { \
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se2 = vpx_highbd_sub_pixel_variance##wf##xh_##opt( \
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src + 32 + (start_row * src_stride), src_stride, \
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x_offset, y_offset, dst + 32 + (start_row * dst_stride), \
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- dst_stride, height, &sse2); \
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+ dst_stride, height, &sse2, NULL, NULL); \
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se += se2; \
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long_sse += sse2; \
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se2 = vpx_highbd_sub_pixel_variance##wf##xh_##opt( \
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src + 48 + (start_row * src_stride), src_stride, \
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x_offset, y_offset, dst + 48 + (start_row * dst_stride), \
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- dst_stride, height, &sse2); \
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+ dst_stride, height, &sse2, NULL, NULL); \
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se += se2; \
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long_sse += sse2; \
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}\
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@@ -410,6 +417,7 @@ FNS(sse2, sse);
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#undef FNS
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#undef FN
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+// The 2 unused parameters are place holders for PIC enabled build.
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#define DECL(w, opt) \
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int vpx_highbd_sub_pixel_avg_variance##w##xh_##opt(const uint16_t *src, \
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ptrdiff_t src_stride, \
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@@ -419,7 +427,8 @@ int vpx_highbd_sub_pixel_avg_variance##w##xh_##opt(const uint16_t *src, \
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const uint16_t *sec, \
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ptrdiff_t sec_stride, \
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int height, \
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- unsigned int *sse);
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||||||
+ unsigned int *sse, \
|
|
||||||
+ void *unused0, void *unused);
|
|
||||||
#define DECLS(opt1) \
|
|
||||||
DECL(16, opt1) \
|
|
||||||
DECL(8, opt1)
|
|
||||||
@@ -439,23 +448,23 @@ uint32_t vpx_highbd_8_sub_pixel_avg_variance##w##x##h##_##opt( \
|
|
||||||
uint16_t *sec = CONVERT_TO_SHORTPTR(sec8); \
|
|
||||||
int se = vpx_highbd_sub_pixel_avg_variance##wf##xh_##opt( \
|
|
||||||
src, src_stride, x_offset, \
|
|
||||||
- y_offset, dst, dst_stride, sec, w, h, &sse); \
|
|
||||||
+ y_offset, dst, dst_stride, sec, w, h, &sse, NULL, NULL); \
|
|
||||||
if (w > wf) { \
|
|
||||||
uint32_t sse2; \
|
|
||||||
int se2 = vpx_highbd_sub_pixel_avg_variance##wf##xh_##opt( \
|
|
||||||
src + 16, src_stride, x_offset, y_offset, \
|
|
||||||
- dst + 16, dst_stride, sec + 16, w, h, &sse2); \
|
|
||||||
+ dst + 16, dst_stride, sec + 16, w, h, &sse2, NULL, NULL); \
|
|
||||||
se += se2; \
|
|
||||||
sse += sse2; \
|
|
||||||
if (w > wf * 2) { \
|
|
||||||
se2 = vpx_highbd_sub_pixel_avg_variance##wf##xh_##opt( \
|
|
||||||
src + 32, src_stride, x_offset, y_offset, \
|
|
||||||
- dst + 32, dst_stride, sec + 32, w, h, &sse2); \
|
|
||||||
+ dst + 32, dst_stride, sec + 32, w, h, &sse2, NULL, NULL); \
|
|
||||||
se += se2; \
|
|
||||||
sse += sse2; \
|
|
||||||
se2 = vpx_highbd_sub_pixel_avg_variance##wf##xh_##opt( \
|
|
||||||
src + 48, src_stride, x_offset, y_offset, \
|
|
||||||
- dst + 48, dst_stride, sec + 48, w, h, &sse2); \
|
|
||||||
+ dst + 48, dst_stride, sec + 48, w, h, &sse2, NULL, NULL); \
|
|
||||||
se += se2; \
|
|
||||||
sse += sse2; \
|
|
||||||
} \
|
|
||||||
@@ -475,14 +484,15 @@ uint32_t vpx_highbd_10_sub_pixel_avg_variance##w##x##h##_##opt( \
|
|
||||||
int se = vpx_highbd_sub_pixel_avg_variance##wf##xh_##opt( \
|
|
||||||
src, src_stride, x_offset, \
|
|
||||||
y_offset, dst, dst_stride, \
|
|
||||||
- sec, w, h, &sse); \
|
|
||||||
+ sec, w, h, &sse, NULL, NULL); \
|
|
||||||
if (w > wf) { \
|
|
||||||
uint32_t sse2; \
|
|
||||||
int se2 = vpx_highbd_sub_pixel_avg_variance##wf##xh_##opt( \
|
|
||||||
src + 16, src_stride, \
|
|
||||||
x_offset, y_offset, \
|
|
||||||
dst + 16, dst_stride, \
|
|
||||||
- sec + 16, w, h, &sse2); \
|
|
||||||
+ sec + 16, w, h, &sse2, \
|
|
||||||
+ NULL, NULL); \
|
|
||||||
se += se2; \
|
|
||||||
sse += sse2; \
|
|
||||||
if (w > wf * 2) { \
|
|
||||||
@@ -490,14 +500,16 @@ uint32_t vpx_highbd_10_sub_pixel_avg_variance##w##x##h##_##opt( \
|
|
||||||
src + 32, src_stride, \
|
|
||||||
x_offset, y_offset, \
|
|
||||||
dst + 32, dst_stride, \
|
|
||||||
- sec + 32, w, h, &sse2); \
|
|
||||||
+ sec + 32, w, h, &sse2, \
|
|
||||||
+ NULL, NULL); \
|
|
||||||
se += se2; \
|
|
||||||
sse += sse2; \
|
|
||||||
se2 = vpx_highbd_sub_pixel_avg_variance##wf##xh_##opt( \
|
|
||||||
src + 48, src_stride, \
|
|
||||||
x_offset, y_offset, \
|
|
||||||
dst + 48, dst_stride, \
|
|
||||||
- sec + 48, w, h, &sse2); \
|
|
||||||
+ sec + 48, w, h, &sse2, \
|
|
||||||
+ NULL, NULL); \
|
|
||||||
se += se2; \
|
|
||||||
sse += sse2; \
|
|
||||||
} \
|
|
||||||
@@ -525,7 +537,7 @@ uint32_t vpx_highbd_12_sub_pixel_avg_variance##w##x##h##_##opt( \
|
|
||||||
int se2 = vpx_highbd_sub_pixel_avg_variance##wf##xh_##opt( \
|
|
||||||
src + (start_row * src_stride), src_stride, x_offset, \
|
|
||||||
y_offset, dst + (start_row * dst_stride), dst_stride, \
|
|
||||||
- sec + (start_row * w), w, height, &sse2); \
|
|
||||||
+ sec + (start_row * w), w, height, &sse2, NULL, NULL); \
|
|
||||||
se += se2; \
|
|
||||||
long_sse += sse2; \
|
|
||||||
if (w > wf) { \
|
|
||||||
@@ -533,7 +545,7 @@ uint32_t vpx_highbd_12_sub_pixel_avg_variance##w##x##h##_##opt( \
|
|
||||||
src + 16 + (start_row * src_stride), src_stride, \
|
|
||||||
x_offset, y_offset, \
|
|
||||||
dst + 16 + (start_row * dst_stride), dst_stride, \
|
|
||||||
- sec + 16 + (start_row * w), w, height, &sse2); \
|
|
||||||
+ sec + 16 + (start_row * w), w, height, &sse2, NULL, NULL); \
|
|
||||||
se += se2; \
|
|
||||||
long_sse += sse2; \
|
|
||||||
if (w > wf * 2) { \
|
|
||||||
@@ -541,14 +553,14 @@ uint32_t vpx_highbd_12_sub_pixel_avg_variance##w##x##h##_##opt( \
|
|
||||||
src + 32 + (start_row * src_stride), src_stride, \
|
|
||||||
x_offset, y_offset, \
|
|
||||||
dst + 32 + (start_row * dst_stride), dst_stride, \
|
|
||||||
- sec + 32 + (start_row * w), w, height, &sse2); \
|
|
||||||
+ sec + 32 + (start_row * w), w, height, &sse2, NULL, NULL); \
|
|
||||||
se += se2; \
|
|
||||||
long_sse += sse2; \
|
|
||||||
se2 = vpx_highbd_sub_pixel_avg_variance##wf##xh_##opt( \
|
|
||||||
src + 48 + (start_row * src_stride), src_stride, \
|
|
||||||
x_offset, y_offset, \
|
|
||||||
dst + 48 + (start_row * dst_stride), dst_stride, \
|
|
||||||
- sec + 48 + (start_row * w), w, height, &sse2); \
|
|
||||||
+ sec + 48 + (start_row * w), w, height, &sse2, NULL, NULL); \
|
|
||||||
se += se2; \
|
|
||||||
long_sse += sse2; \
|
|
||||||
} \
|
|
||||||
--
|
|
||||||
2.7.0
|
|
||||||
|
|
|
@ -18,14 +18,14 @@ depends=('glibc' 'gcc-libs')
|
||||||
makedepends=('yasm' 'git')
|
makedepends=('yasm' 'git')
|
||||||
provides=('libvpx.so')
|
provides=('libvpx.so')
|
||||||
source=("libvpx-${pkgver}.tar.gz::https://github.com/webmproject/libvpx/archive/v${pkgver}.tar.gz"
|
source=("libvpx-${pkgver}.tar.gz::https://github.com/webmproject/libvpx/archive/v${pkgver}.tar.gz"
|
||||||
fix-armhf-link.patch)
|
0001-ARM-fixes.patch)
|
||||||
sha256sums=('cda8bb6f0e4848c018177d3a576fa83ed96d762554d7010fe4cfb9d70c22e588'
|
sha256sums=('cda8bb6f0e4848c018177d3a576fa83ed96d762554d7010fe4cfb9d70c22e588'
|
||||||
'66cbce8fc6a00e418fdc6d08b196861b699f45b1db115b2c707b9a70d1081348')
|
'c2c0f2e81a97edf8795e94a58c00ca6c43f44e1e82e5b122c209e7f6ee91e6e3')
|
||||||
|
|
||||||
prepare() {
|
prepare() {
|
||||||
cd libvpx-${pkgver}
|
cd libvpx-${pkgver}
|
||||||
|
|
||||||
patch -p1 -i ../fix-armhf-link.patch
|
patch -p1 -i ../0001-ARM-fixes.patch
|
||||||
}
|
}
|
||||||
|
|
||||||
build() {
|
build() {
|
||||||
|
|
Loading…
Reference in a new issue