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extra/libvpx: patch fix

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This commit is contained in:
Kevin Mihelich 2017-01-15 19:15:49 +00:00
parent 0cc1a3c06f
commit cddf054867
3 changed files with 36 additions and 346 deletions
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59
extra/libvpx/fix-armhf-link.patch → extra/libvpx/0001-ARM-fixes.patch
View file

@ -1,30 +1,33 @@
From ac94b8f1653ee9a459aa26a65243d11b8c308064 Mon Sep 17 00:00:00 2001
From: Kevin Mihelich <kevin@archlinuxarm.org>
Date: Sun, 15 Jan 2017 12:11:57 -0700
Subject: [PATCH] ARM fixes
---
build/make/configure.sh | 21 +++++++++++----------
configure | 2 ++
2 files changed, 13 insertions(+), 10 deletions(-)
diff --git a/build/make/configure.sh b/build/make/configure.sh
index 4f0071b..56abe0e 100644
index 007e02000..c7e9076b3 100644
--- a/build/make/configure.sh
+++ b/build/make/configure.sh
@@ -680,6 +680,10 @@ process_common_toolchain() {
@@ -680,6 +680,14 @@ process_common_toolchain() {
aarch64*)
tgt_isa=arm64
;;
+ armv6*-gnueabihf)
+ tgt_isa=armv6
+ float_abi=hard
+ ;;
armv6*)
tgt_isa=armv6
;;
@@ -691,6 +695,10 @@ process_common_toolchain() {
tgt_isa=armv7
float_abi=softfp
;;
+ armv5te*)
+ tgt_isa=armv5te
+ float_abi=soft
+ ;;
*x86_64*|*amd64*)
tgt_isa=x86_64
;;
@@ -876,7 +884,7 @@ process_common_toolchain() {
+ armv6*-gnueabihf)
+ tgt_isa=armv6
+ float_abi=hard
+ ;;
armv7*-hardfloat* | armv7*-gnueabihf | arm-*-gnueabihf)
tgt_isa=armv7
float_abi=hard
@@ -873,7 +881,7 @@ process_common_toolchain() {
soft_enable neon
;;
armv7|armv7s)
@ -33,7 +36,7 @@ index 4f0071b..56abe0e 100644
# Only enable neon_asm when neon is also enabled.
enabled neon && soft_enable neon_asm
# If someone tries to force it through, die.
@@ -927,13 +935,6 @@ process_common_toolchain() {
@@ -894,13 +902,6 @@ process_common_toolchain() {
check_add_asflags --defsym ARCHITECTURE=${arch_int}
tune_cflags="-mtune="
if [ ${tgt_isa} = "armv7" ] || [ ${tgt_isa} = "armv7s" ]; then
@ -47,7 +50,7 @@ index 4f0071b..56abe0e 100644
check_add_cflags -march=armv7-a -mfloat-abi=${float_abi}
check_add_asflags -march=armv7-a -mfloat-abi=${float_abi}
@@ -945,8 +946,8 @@ EOF
@@ -912,8 +913,8 @@ EOF
check_add_cflags -march=armv8-a
check_add_asflags -march=armv8-a
else
@ -59,14 +62,18 @@ index 4f0071b..56abe0e 100644
enabled debug && add_asflags -g
diff --git a/configure b/configure
index f82ee04..911733f 100755
index fb732acf3..43a730fdb 100755
--- a/configure
+++ b/configure
@@ -97,6 +97,7 @@ EOF
# all_platforms is a list of all supported target platforms. Maintain
# alphabetically by architecture, generic-gnu last.
+all_platforms="${all_platforms} armv5te-linux-gcc"
@@ -101,6 +101,8 @@ EOF
all_platforms="${all_platforms} arm64-android-gcc"
all_platforms="${all_platforms} arm64-darwin-gcc"
all_platforms="${all_platforms} arm64-linux-gcc"
all_platforms="${all_platforms} armv6-linux-rvct"
+all_platforms="${all_platforms} armv5te-linux-gcc"
+all_platforms="${all_platforms} armv6-linux-gcc"
all_platforms="${all_platforms} armv7-android-gcc" #neon Cortex-A8
all_platforms="${all_platforms} armv7-darwin-gcc" #neon Cortex-A8
all_platforms="${all_platforms} armv7-linux-rvct" #neon Cortex-A8
--
2.11.0

317
extra/libvpx/0001-Fix-for-issue-1114-compile-error.patch
View file

@ -1,317 +0,0 @@
From 7361ef732b432e153496c30da66081d7e530c7f6 Mon Sep 17 00:00:00 2001
From: Peter de Rivaz <peter.derivaz@argondesign.com>
Date: Mon, 14 Dec 2015 16:35:29 +0000
Subject: [PATCH] Fix for issue 1114 compile error
In 32-bit build with --enable-shared, there is a lot of
register pressure and register src_strideq is reused.
The code needs to use the stack based version of src_stride,
but this doesn't compile when used in an lea instruction.
This patch also fixes a related segmentation fault caused by the
implementation using src_strideq even though it has been
reused.
This patch also fixes the HBD subpel variance tests that fail
when compiled without disable-optimizations.
These failures were caused by local variables in the assembler
routines colliding with the caller's stack frame.
Change-Id: Ice9d4dafdcbdc6038ad5ee7c1c09a8f06deca362
---
vpx_dsp/x86/highbd_subpel_variance_impl_sse2.asm | 18 +++----
vpx_dsp/x86/highbd_variance_sse2.c | 64 ++++++++++++++----------
2 files changed, 44 insertions(+), 38 deletions(-)
diff --git a/vpx_dsp/x86/highbd_subpel_variance_impl_sse2.asm b/vpx_dsp/x86/highbd_subpel_variance_impl_sse2.asm
index 22d52a2..30ee81b 100644
--- a/vpx_dsp/x86/highbd_subpel_variance_impl_sse2.asm
+++ b/vpx_dsp/x86/highbd_subpel_variance_impl_sse2.asm
@@ -79,20 +79,13 @@ SECTION .text
%macro INC_SRC_BY_SRC_STRIDE 0
%if ARCH_X86=1 && CONFIG_PIC=1
- lea srcq, [srcq + src_stridemp*2]
+ add srcq, src_stridemp
+ add srcq, src_stridemp
%else
lea srcq, [srcq + src_strideq*2]
%endif
%endmacro
-%macro INC_SRC_BY_SRC_2STRIDE 0
-%if ARCH_X86=1 && CONFIG_PIC=1
- lea srcq, [srcq + src_stridemp*4]
-%else
- lea srcq, [srcq + src_strideq*4]
-%endif
-%endmacro
-
%macro SUBPEL_VARIANCE 1-2 0 ; W
%define bilin_filter_m bilin_filter_m_sse2
%define filter_idx_shift 5
@@ -984,8 +977,9 @@ SECTION .text
.x_other_y_other_loop:
movu m2, [srcq]
movu m4, [srcq+2]
- movu m3, [srcq+src_strideq*2]
- movu m5, [srcq+src_strideq*2+2]
+ INC_SRC_BY_SRC_STRIDE
+ movu m3, [srcq]
+ movu m5, [srcq+2]
pmullw m2, filter_x_a
pmullw m4, filter_x_b
paddw m2, filter_rnd
@@ -1018,7 +1012,7 @@ SECTION .text
SUM_SSE m0, m2, m4, m3, m6, m7
mova m0, m5
- INC_SRC_BY_SRC_2STRIDE
+ INC_SRC_BY_SRC_STRIDE
lea dstq, [dstq + dst_strideq * 4]
%if %2 == 1 ; avg
add secq, sec_str
diff --git a/vpx_dsp/x86/highbd_variance_sse2.c b/vpx_dsp/x86/highbd_variance_sse2.c
index b45331c..81ec5db 100644
--- a/vpx_dsp/x86/highbd_variance_sse2.c
+++ b/vpx_dsp/x86/highbd_variance_sse2.c
@@ -243,13 +243,18 @@ unsigned int vpx_highbd_12_mse8x8_sse2(const uint8_t *src8, int src_stride,
}
#if CONFIG_USE_X86INC
+// The 2 unused parameters are place holders for PIC enabled build.
+// These definitions are for functions defined in
+// highbd_subpel_variance_impl_sse2.asm
#define DECL(w, opt) \
int vpx_highbd_sub_pixel_variance##w##xh_##opt(const uint16_t *src, \
ptrdiff_t src_stride, \
int x_offset, int y_offset, \
const uint16_t *dst, \
ptrdiff_t dst_stride, \
- int height, unsigned int *sse);
+ int height, \
+ unsigned int *sse, \
+ void *unused0, void *unused);
#define DECLS(opt1, opt2) \
DECL(8, opt1); \
DECL(16, opt1)
@@ -274,7 +279,7 @@ uint32_t vpx_highbd_8_sub_pixel_variance##w##x##h##_##opt(const uint8_t *src8, \
int se = vpx_highbd_sub_pixel_variance##wf##xh_##opt(src, src_stride, \
x_offset, y_offset, \
dst, dst_stride, h, \
- &sse); \
+ &sse, NULL, NULL); \
if (w > wf) { \
unsigned int sse2; \
int se2 = vpx_highbd_sub_pixel_variance##wf##xh_##opt(src + 16, \
@@ -282,19 +287,20 @@ uint32_t vpx_highbd_8_sub_pixel_variance##w##x##h##_##opt(const uint8_t *src8, \
x_offset, y_offset, \
dst + 16, \
dst_stride, \
- h, &sse2); \
+ h, &sse2, \
+ NULL, NULL); \
se += se2; \
sse += sse2; \
if (w > wf * 2) { \
se2 = vpx_highbd_sub_pixel_variance##wf##xh_##opt(src + 32, src_stride, \
x_offset, y_offset, \
dst + 32, dst_stride, \
- h, &sse2); \
+ h, &sse2, NULL, NULL); \
se += se2; \
sse += sse2; \
se2 = vpx_highbd_sub_pixel_variance##wf##xh_##opt( \
src + 48, src_stride, x_offset, y_offset, \
- dst + 48, dst_stride, h, &sse2); \
+ dst + 48, dst_stride, h, &sse2, NULL, NULL); \
se += se2; \
sse += sse2; \
} \
@@ -312,7 +318,7 @@ uint32_t vpx_highbd_10_sub_pixel_variance##w##x##h##_##opt( \
int se = vpx_highbd_sub_pixel_variance##wf##xh_##opt(src, src_stride, \
x_offset, y_offset, \
dst, dst_stride, \
- h, &sse); \
+ h, &sse, NULL, NULL); \
if (w > wf) { \
uint32_t sse2; \
int se2 = vpx_highbd_sub_pixel_variance##wf##xh_##opt(src + 16, \
@@ -320,20 +326,21 @@ uint32_t vpx_highbd_10_sub_pixel_variance##w##x##h##_##opt( \
x_offset, y_offset, \
dst + 16, \
dst_stride, \
- h, &sse2); \
+ h, &sse2, \
+ NULL, NULL); \
se += se2; \
sse += sse2; \
if (w > wf * 2) { \
se2 = vpx_highbd_sub_pixel_variance##wf##xh_##opt(src + 32, src_stride, \
x_offset, y_offset, \
dst + 32, dst_stride, \
- h, &sse2); \
+ h, &sse2, NULL, NULL); \
se += se2; \
sse += sse2; \
se2 = vpx_highbd_sub_pixel_variance##wf##xh_##opt(src + 48, src_stride, \
x_offset, y_offset, \
dst + 48, dst_stride, \
- h, &sse2); \
+ h, &sse2, NULL, NULL); \
se += se2; \
sse += sse2; \
} \
@@ -359,27 +366,27 @@ uint32_t vpx_highbd_12_sub_pixel_variance##w##x##h##_##opt( \
int se2 = vpx_highbd_sub_pixel_variance##wf##xh_##opt( \
src + (start_row * src_stride), src_stride, \
x_offset, y_offset, dst + (start_row * dst_stride), \
- dst_stride, height, &sse2); \
+ dst_stride, height, &sse2, NULL, NULL); \
se += se2; \
long_sse += sse2; \
if (w > wf) { \
se2 = vpx_highbd_sub_pixel_variance##wf##xh_##opt( \
src + 16 + (start_row * src_stride), src_stride, \
x_offset, y_offset, dst + 16 + (start_row * dst_stride), \
- dst_stride, height, &sse2); \
+ dst_stride, height, &sse2, NULL, NULL); \
se += se2; \
long_sse += sse2; \
if (w > wf * 2) { \
se2 = vpx_highbd_sub_pixel_variance##wf##xh_##opt( \
src + 32 + (start_row * src_stride), src_stride, \
x_offset, y_offset, dst + 32 + (start_row * dst_stride), \
- dst_stride, height, &sse2); \
+ dst_stride, height, &sse2, NULL, NULL); \
se += se2; \
long_sse += sse2; \
se2 = vpx_highbd_sub_pixel_variance##wf##xh_##opt( \
src + 48 + (start_row * src_stride), src_stride, \
x_offset, y_offset, dst + 48 + (start_row * dst_stride), \
- dst_stride, height, &sse2); \
+ dst_stride, height, &sse2, NULL, NULL); \
se += se2; \
long_sse += sse2; \
}\
@@ -410,6 +417,7 @@ FNS(sse2, sse);
#undef FNS
#undef FN
+// The 2 unused parameters are place holders for PIC enabled build.
#define DECL(w, opt) \
int vpx_highbd_sub_pixel_avg_variance##w##xh_##opt(const uint16_t *src, \
ptrdiff_t src_stride, \
@@ -419,7 +427,8 @@ int vpx_highbd_sub_pixel_avg_variance##w##xh_##opt(const uint16_t *src, \
const uint16_t *sec, \
ptrdiff_t sec_stride, \
int height, \
- unsigned int *sse);
+ unsigned int *sse, \
+ void *unused0, void *unused);
#define DECLS(opt1) \
DECL(16, opt1) \
DECL(8, opt1)
@@ -439,23 +448,23 @@ uint32_t vpx_highbd_8_sub_pixel_avg_variance##w##x##h##_##opt( \
uint16_t *sec = CONVERT_TO_SHORTPTR(sec8); \
int se = vpx_highbd_sub_pixel_avg_variance##wf##xh_##opt( \
src, src_stride, x_offset, \
- y_offset, dst, dst_stride, sec, w, h, &sse); \
+ y_offset, dst, dst_stride, sec, w, h, &sse, NULL, NULL); \
if (w > wf) { \
uint32_t sse2; \
int se2 = vpx_highbd_sub_pixel_avg_variance##wf##xh_##opt( \
src + 16, src_stride, x_offset, y_offset, \
- dst + 16, dst_stride, sec + 16, w, h, &sse2); \
+ dst + 16, dst_stride, sec + 16, w, h, &sse2, NULL, NULL); \
se += se2; \
sse += sse2; \
if (w > wf * 2) { \
se2 = vpx_highbd_sub_pixel_avg_variance##wf##xh_##opt( \
src + 32, src_stride, x_offset, y_offset, \
- dst + 32, dst_stride, sec + 32, w, h, &sse2); \
+ dst + 32, dst_stride, sec + 32, w, h, &sse2, NULL, NULL); \
se += se2; \
sse += sse2; \
se2 = vpx_highbd_sub_pixel_avg_variance##wf##xh_##opt( \
src + 48, src_stride, x_offset, y_offset, \
- dst + 48, dst_stride, sec + 48, w, h, &sse2); \
+ dst + 48, dst_stride, sec + 48, w, h, &sse2, NULL, NULL); \
se += se2; \
sse += sse2; \
} \
@@ -475,14 +484,15 @@ uint32_t vpx_highbd_10_sub_pixel_avg_variance##w##x##h##_##opt( \
int se = vpx_highbd_sub_pixel_avg_variance##wf##xh_##opt( \
src, src_stride, x_offset, \
y_offset, dst, dst_stride, \
- sec, w, h, &sse); \
+ sec, w, h, &sse, NULL, NULL); \
if (w > wf) { \
uint32_t sse2; \
int se2 = vpx_highbd_sub_pixel_avg_variance##wf##xh_##opt( \
src + 16, src_stride, \
x_offset, y_offset, \
dst + 16, dst_stride, \
- sec + 16, w, h, &sse2); \
+ sec + 16, w, h, &sse2, \
+ NULL, NULL); \
se += se2; \
sse += sse2; \
if (w > wf * 2) { \
@@ -490,14 +500,16 @@ uint32_t vpx_highbd_10_sub_pixel_avg_variance##w##x##h##_##opt( \
src + 32, src_stride, \
x_offset, y_offset, \
dst + 32, dst_stride, \
- sec + 32, w, h, &sse2); \
+ sec + 32, w, h, &sse2, \
+ NULL, NULL); \
se += se2; \
sse += sse2; \
se2 = vpx_highbd_sub_pixel_avg_variance##wf##xh_##opt( \
src + 48, src_stride, \
x_offset, y_offset, \
dst + 48, dst_stride, \
- sec + 48, w, h, &sse2); \
+ sec + 48, w, h, &sse2, \
+ NULL, NULL); \
se += se2; \
sse += sse2; \
} \
@@ -525,7 +537,7 @@ uint32_t vpx_highbd_12_sub_pixel_avg_variance##w##x##h##_##opt( \
int se2 = vpx_highbd_sub_pixel_avg_variance##wf##xh_##opt( \
src + (start_row * src_stride), src_stride, x_offset, \
y_offset, dst + (start_row * dst_stride), dst_stride, \
- sec + (start_row * w), w, height, &sse2); \
+ sec + (start_row * w), w, height, &sse2, NULL, NULL); \
se += se2; \
long_sse += sse2; \
if (w > wf) { \
@@ -533,7 +545,7 @@ uint32_t vpx_highbd_12_sub_pixel_avg_variance##w##x##h##_##opt( \
src + 16 + (start_row * src_stride), src_stride, \
x_offset, y_offset, \
dst + 16 + (start_row * dst_stride), dst_stride, \
- sec + 16 + (start_row * w), w, height, &sse2); \
+ sec + 16 + (start_row * w), w, height, &sse2, NULL, NULL); \
se += se2; \
long_sse += sse2; \
if (w > wf * 2) { \
@@ -541,14 +553,14 @@ uint32_t vpx_highbd_12_sub_pixel_avg_variance##w##x##h##_##opt( \
src + 32 + (start_row * src_stride), src_stride, \
x_offset, y_offset, \
dst + 32 + (start_row * dst_stride), dst_stride, \
- sec + 32 + (start_row * w), w, height, &sse2); \
+ sec + 32 + (start_row * w), w, height, &sse2, NULL, NULL); \
se += se2; \
long_sse += sse2; \
se2 = vpx_highbd_sub_pixel_avg_variance##wf##xh_##opt( \
src + 48 + (start_row * src_stride), src_stride, \
x_offset, y_offset, \
dst + 48 + (start_row * dst_stride), dst_stride, \
- sec + 48 + (start_row * w), w, height, &sse2); \
+ sec + 48 + (start_row * w), w, height, &sse2, NULL, NULL); \
se += se2; \
long_sse += sse2; \
} \
--
2.7.0

6
extra/libvpx/PKGBUILD
View file

@ -18,14 +18,14 @@ depends=('glibc' 'gcc-libs')
makedepends=('yasm' 'git')
provides=('libvpx.so')
source=("libvpx-${pkgver}.tar.gz::https://github.com/webmproject/libvpx/archive/v${pkgver}.tar.gz"
fix-armhf-link.patch)
0001-ARM-fixes.patch)
sha256sums=('cda8bb6f0e4848c018177d3a576fa83ed96d762554d7010fe4cfb9d70c22e588'
'66cbce8fc6a00e418fdc6d08b196861b699f45b1db115b2c707b9a70d1081348')
'c2c0f2e81a97edf8795e94a58c00ca6c43f44e1e82e5b122c209e7f6ee91e6e3')
prepare() {
cd libvpx-${pkgver}
patch -p1 -i ../fix-armhf-link.patch
patch -p1 -i ../0001-ARM-fixes.patch
}
build() {