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core/linux-raspberrypi-latest remove obsolete patch
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moonman
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1 changed files with 0 additions and 122 deletions
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diff -urN linux-3.1-rc4-a/arch/arm/include/asm/dma-mapping.h linux-3.1-rc4-b/arch/arm/include/asm/dma-mapping.h
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--- linux-3.1-rc4-a/arch/arm/include/asm/dma-mapping.h 2011-08-29 05:16:01.000000000 +0100
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+++ linux-3.1-rc4-b/arch/arm/include/asm/dma-mapping.h 2011-09-02 12:09:00.000000000 +0100
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@@ -205,6 +205,15 @@
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int dma_mmap_writecombine(struct device *, struct vm_area_struct *,
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void *, dma_addr_t, size_t);
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+#ifdef CONFIG_ARM_DMA_MEM_BUFFERABLE
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+#define ARCH_HAS_DMA_COHERENT_WRITE_SYNC
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+
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+static inline void dma_coherent_write_sync(void)
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+{
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+ dsb();
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+ outer_sync();
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+}
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+#endif
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#ifdef CONFIG_DMABOUNCE
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/*
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diff -urN linux-3.1-rc4-a/Documentation/DMA-API-HOWTO.txt linux-3.1-rc4-b/Documentation/DMA-API-HOWTO.txt
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--- linux-3.1-rc4-a/Documentation/DMA-API-HOWTO.txt 2011-08-29 05:16:01.000000000 +0100
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+++ linux-3.1-rc4-b/Documentation/DMA-API-HOWTO.txt 2011-09-02 12:01:09.000000000 +0100
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@@ -400,6 +400,22 @@
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from a pool before you destroy the pool. This function may not
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be called in interrupt context.
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+Some architectures which supporting DMA coherent memory may still have write
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+buffering between the CPU and DMA memory. This buffering may delay CPU writes
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+from reaching coherent memory in a timely manner. These delays in turn can
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+lead lead to dramatic performance issues in certain cases. An architecture
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+may mitigate this problem to a large degree by having a write buffer flush
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+implicit in the MMIO functions used to write to device registers. This works
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+for the most common cases where a driver needs to write to a register to tell
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+a device that something was written to the shared coherent memory. There are
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+other cases where the device polls the dma-coherent memory for data written
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+by the driver. In such cases, the driver needs to explicity force write buffer
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+data to memory by calling:
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+
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+ dma_coherent_write_sync();
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+
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+
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+
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DMA Direction
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The interfaces described in subsequent portions of this document
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diff -urN linux-3.1-rc4-a/Documentation/DMA-API.txt linux-3.1-rc4-b/Documentation/DMA-API.txt
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--- linux-3.1-rc4-a/Documentation/DMA-API.txt 2011-08-29 05:16:01.000000000 +0100
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+++ linux-3.1-rc4-b/Documentation/DMA-API.txt 2011-09-02 12:03:06.000000000 +0100
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@@ -418,6 +418,18 @@
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....
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+Part Ie - Write buffering to dma-coherent memory
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+------------------------------------------------
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+
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+Some architectures supporting DMA coherent memory may have write
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+buffering between the CPU and DMA memory. This buffering may delay
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+CPU writes from reaching coherent memory in a timely manner.
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+
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+ void
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+ dma_coherent_write_sync()
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+
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+Force any outstanding coherent writes to memory.
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+
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Part II - Advanced dma_ usage
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-----------------------------
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diff -urN linux-3.1-rc4-a/drivers/usb/host/ehci-q.c linux-3.1-rc4-b/drivers/usb/host/ehci-q.c
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--- linux-3.1-rc4-a/drivers/usb/host/ehci-q.c 2011-08-29 05:16:01.000000000 +0100
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+++ linux-3.1-rc4-b/drivers/usb/host/ehci-q.c 2011-09-02 12:17:20.000000000 +0100
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@@ -114,6 +114,7 @@
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/* HC must see latest qtd and qh data before we clear ACTIVE+HALT */
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wmb ();
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hw->hw_token &= cpu_to_hc32(ehci, QTD_TOGGLE | QTD_STS_PING);
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+ dma_coherent_write_sync();
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}
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/* if it weren't for a common silicon quirk (writing the dummy into the qh
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@@ -404,6 +405,7 @@
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wmb();
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hw->hw_token = cpu_to_hc32(ehci,
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token);
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+ dma_coherent_write_sync();
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goto retry_xacterr;
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}
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stopped = 1;
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@@ -753,8 +755,10 @@
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}
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/* by default, enable interrupt on urb completion */
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- if (likely (!(urb->transfer_flags & URB_NO_INTERRUPT)))
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+ if (likely(!(urb->transfer_flags & URB_NO_INTERRUPT))) {
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qtd->hw_token |= cpu_to_hc32(ehci, QTD_IOC);
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+ dma_coherent_write_sync();
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+ }
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return head;
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cleanup:
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@@ -1081,6 +1085,7 @@
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/* let the hc process these next qtds */
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wmb ();
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dummy->hw_token = token;
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+ dma_coherent_write_sync();
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urb->hcpriv = qh_get (qh);
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}
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diff -urN linux-3.1-rc4-a/include/linux/dma-mapping.h linux-3.1-rc4-b/include/linux/dma-mapping.h
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--- linux-3.1-rc4-a/include/linux/dma-mapping.h 2011-08-29 05:16:01.000000000 +0100
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+++ linux-3.1-rc4-b/include/linux/dma-mapping.h 2011-09-02 12:06:06.000000000 +0100
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@@ -154,6 +154,12 @@
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}
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#endif
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+#ifndef ARCH_HAS_DMA_COHERENT_WRITE_SYNC
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+static inline void dma_coherent_write_sync(void)
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+{
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+}
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+#endif
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+
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/*
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* Managed DMA API
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*/
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