From eb5d24b5b6c166cef344585cb2f7b46d18dc665d Mon Sep 17 00:00:00 2001 From: graysky Date: Sat, 7 Sep 2024 16:22:39 -0400 Subject: [PATCH] core/linux-aarch64: remove upstreamed patch --- core/linux-aarch64/PKGBUILD | 5 - ...28-iomux-width-flag-for-GPIO2-B-pins.patch | 160 ------------------ 2 files changed, 165 deletions(-) delete mode 100644 core/linux-aarch64/pinctrl-rockchip-correct-RK3328-iomux-width-flag-for-GPIO2-B-pins.patch diff --git a/core/linux-aarch64/PKGBUILD b/core/linux-aarch64/PKGBUILD index 389c95d18..4119131ad 100644 --- a/core/linux-aarch64/PKGBUILD +++ b/core/linux-aarch64/PKGBUILD @@ -20,7 +20,6 @@ source=("http://www.kernel.org/pub/linux/kernel/v6.x/${_srcname}.tar.xz" '0001-net-smsc95xx-Allow-mac-address-to-be-set-as-a-parame.patch' '0002-arm64-dts-rockchip-disable-pwm0-on-rk3399-firefly.patch' '0003-pps-Compatibility-hack-should-be-X86-specific.patch' - 'pinctrl-rockchip-correct-RK3328-iomux-width-flag-for-GPIO2-B-pins.patch' 'config' 'generate_chromebook_its.sh' 'kernel.keyblock' @@ -31,7 +30,6 @@ md5sums=('c0ce046a9a0d041e13cf222f81eae574' '7b08a199a97e3e2288e5c03d8e8ded2d' 'c9d4e392555b77034e24e9f87c5ff0b3' 'a6abfb191ecb3d7d5f6ccdaca335a11d' - 'd4add3377b26d8b6f0818f7dddfb8cda' 'ebfcd5d79878361e9d06d45b829a3bd6' '7c97cf141750ad810235b1ad06eb9f75' '61c5ff73c136ed07a7aadbf58db3d96a' @@ -53,9 +51,6 @@ prepare() { git apply ../0002-arm64-dts-rockchip-disable-pwm0-on-rk3399-firefly.patch git apply ../0003-pps-Compatibility-hack-should-be-X86-specific.patch - # https://archlinuxarm.org/forum/viewtopic.php?f=65&t=16981 - patch -p1 -i ../pinctrl-rockchip-correct-RK3328-iomux-width-flag-for-GPIO2-B-pins.patch - cat "${srcdir}/config" > ./.config } diff --git a/core/linux-aarch64/pinctrl-rockchip-correct-RK3328-iomux-width-flag-for-GPIO2-B-pins.patch b/core/linux-aarch64/pinctrl-rockchip-correct-RK3328-iomux-width-flag-for-GPIO2-B-pins.patch deleted file mode 100644 index a43e0bd10..000000000 --- a/core/linux-aarch64/pinctrl-rockchip-correct-RK3328-iomux-width-flag-for-GPIO2-B-pins.patch +++ /dev/null @@ -1,160 +0,0 @@ -From patchwork Tue Jul 9 10:54:28 2024 -Content-Type: text/plain; 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- bh=f/I3Vjm8cEq2ZeTlVvfzwsec4AJR5wa4TlSZ79HvmRk=; - b=hXXnOM5pURRKMcaz1BuylPpxtLsSgiW29cfj5UI9EfWqUgfbHBWDipLEsXQxkHZajqgq/9 - /z4O6xvH/jZiofPvAKDzi4j0wC1RJUypDGeIuo3XKhOH7aBM2SB5RLnfffkwTiQ7VA0i8q - N58KAUdO386ccj+s9wqtXiJNkAc72PA= -To: Heiko Stuebner , - Linus Walleij -Cc: Richard Kojedzinszky , - linux-gpio@vger.kernel.org, - linux-arm-kernel@lists.infradead.org, - linux-rockchip@lists.infradead.org, - linux-kernel@vger.kernel.org, - Huang-Huang Bao , - stable@vger.kernel.org -Subject: [PATCH] pinctrl: rockchip: correct RK3328 iomux width flag for - GPIO2-B pins -Date: Tue, 9 Jul 2024 18:54:28 +0800 -Message-ID: <20240709105428.1176375-1-i@eh5.me> -MIME-Version: 1.0 -X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 -X-CRM114-CacheID: sfid-20240709_035505_855152_0F43EA17 -X-CRM114-Status: GOOD ( 11.90 ) -X-BeenThere: linux-arm-kernel@lists.infradead.org -X-Mailman-Version: 2.1.34 -Precedence: list -List-Id: -List-Unsubscribe: - , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: - , - -Sender: "linux-arm-kernel" -Errors-To: - linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org - -The base iomux offsets for each GPIO pin line are accumulatively -calculated based off iomux width flag in rockchip_pinctrl_get_soc_data. -If the iomux width flag is one of IOMUX_WIDTH_4BIT, IOMUX_WIDTH_3BIT or -IOMUX_WIDTH_2BIT, the base offset for next pin line would increase by 8 -bytes, otherwise it would increase by 4 bytes. - -Despite most of GPIO2-B iomux have 2-bit data width, which can be fit -into 4 bytes space with write mask, it actually take 8 bytes width for -whole GPIO2-B line. - -Commit e8448a6c817c ("pinctrl: rockchip: fix pinmux bits for RK3328 -GPIO2-B pins") wrongly set iomux width flag to 0, causing all base -iomux offset for line after GPIO2-B to be calculated wrong. Fix the -iomux width flag to IOMUX_WIDTH_2BIT so the offset after GPIO2-B is -correctly increased by 8, matching the actual width of GPIO2-B iomux. - -Fixes: e8448a6c817c ("pinctrl: rockchip: fix pinmux bits for RK3328 GPIO2-B pins") -Cc: stable@vger.kernel.org -Reported-by: Richard Kojedzinszky -Closes: https://lore.kernel.org/linux-rockchip/4f29b743202397d60edfb3c725537415@kojedz.in/ -Tested-by: Richard Kojedzinszky -Signed-off-by: Huang-Huang Bao ---- - -I have double checked the iomux offsets in debug message match iomux -register definitions in "GRF Register Description" section in RK3328 -TRM[1]. - -[1]: https://opensource.rock-chips.com/images/9/97/Rockchip_RK3328TRM_V1.1-Part1-20170321.pdf - -Kernel pinctrl debug message with dyndbg="file pinctrl-rockchip.c +p": - rockchip-pinctrl pinctrl: bank 0, iomux 0 has iom_offset 0x0 drv_offset 0x0 - rockchip-pinctrl pinctrl: bank 0, iomux 1 has iom_offset 0x4 drv_offset 0x0 - rockchip-pinctrl pinctrl: bank 0, iomux 2 has iom_offset 0x8 drv_offset 0x0 - rockchip-pinctrl pinctrl: bank 0, iomux 3 has iom_offset 0xc drv_offset 0x0 - rockchip-pinctrl pinctrl: bank 1, iomux 0 has iom_offset 0x10 drv_offset 0x0 - rockchip-pinctrl pinctrl: bank 1, iomux 1 has iom_offset 0x14 drv_offset 0x0 - rockchip-pinctrl pinctrl: bank 1, iomux 2 has iom_offset 0x18 drv_offset 0x0 - rockchip-pinctrl pinctrl: bank 1, iomux 3 has iom_offset 0x1c drv_offset 0x0 - rockchip-pinctrl pinctrl: bank 2, iomux 0 has iom_offset 0x20 drv_offset 0x0 - rockchip-pinctrl pinctrl: bank 2, iomux 1 has iom_offset 0x24 drv_offset 0x0 - rockchip-pinctrl pinctrl: bank 2, iomux 2 has iom_offset 0x2c drv_offset 0x0 - rockchip-pinctrl pinctrl: bank 2, iomux 3 has iom_offset 0x34 drv_offset 0x0 - rockchip-pinctrl pinctrl: bank 3, iomux 0 has iom_offset 0x38 drv_offset 0x0 - rockchip-pinctrl pinctrl: bank 3, iomux 1 has iom_offset 0x40 drv_offset 0x0 - rockchip-pinctrl pinctrl: bank 3, iomux 2 has iom_offset 0x48 drv_offset 0x0 - rockchip-pinctrl pinctrl: bank 3, iomux 3 has iom_offset 0x4c drv_offset 0x0 - -The "Closes" links to test report from original reporter with original -issue contained, which was not delivered to any mailing list thus not -available on the web. - -Added CC stable as the problematic e8448a6c817c fixed by this patch was -recently merged to stable kernels. - -Sorry for the inconvenience caused, -Huang-Huang - - drivers/pinctrl/pinctrl-rockchip.c | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - - -base-commit: 4376e966ecb78c520b0faf239d118ecfab42a119 --- -2.45.2 - -diff --git a/drivers/pinctrl/pinctrl-rockchip.c b/drivers/pinctrl/pinctrl-rockchip.c -index 3f56991f5b89..f6da91941fbd 100644 ---- a/drivers/pinctrl/pinctrl-rockchip.c -+++ b/drivers/pinctrl/pinctrl-rockchip.c -@@ -3813,7 +3813,7 @@ static struct rockchip_pin_bank rk3328_pin_banks[] = { - PIN_BANK_IOMUX_FLAGS(0, 32, "gpio0", 0, 0, 0, 0), - PIN_BANK_IOMUX_FLAGS(1, 32, "gpio1", 0, 0, 0, 0), - PIN_BANK_IOMUX_FLAGS(2, 32, "gpio2", 0, -- 0, -+ IOMUX_WIDTH_2BIT, - IOMUX_WIDTH_3BIT, - 0), - PIN_BANK_IOMUX_FLAGS(3, 32, "gpio3",