diff --git a/src/core/simd.d b/src/core/simd.d
index c27dc4c1..7641c8a9 100644
--- a/src/core/simd.d
+++ b/src/core/simd.d
@@ -84,6 +84,20 @@ version (LDC)
         enum dataCache = 1;
         llvm_prefetch(address, writeFetch, locality, dataCache);
     }
+
+    unittest
+    {
+        float[4] data = [ 0.5, 1, 1.5, 2 ];
+        auto ptr = &data[0];
+
+        prefetch!(false, 0)(ptr);
+        auto v = loadUnaligned!float4(ptr);
+        v *= 2;
+        storeUnaligned!float4(v, ptr);
+
+        float[4] expected = [ 1, 2, 3, 4 ];
+        assert(data == expected);
+    }
 }
 else version (D_SIMD)
 {
diff --git a/src/ldc/intrinsics.di b/src/ldc/intrinsics.di
index 914cd5e1..091b2aac 100644
--- a/src/ldc/intrinsics.di
+++ b/src/ldc/intrinsics.di
@@ -129,6 +129,14 @@ pragma(LDC_intrinsic, "llvm.stacksave")
 pragma(LDC_intrinsic, "llvm.stackrestore")
     void llvm_stackrestore(void* ptr);
 
+version(INTRINSICS_FROM_1000)
+{
+    private enum llvm_prefetch_fullname = "llvm.prefetch.p0i8";
+}
+else
+{
+    private enum llvm_prefetch_fullname = "llvm.prefetch";
+}
 /// The 'llvm.prefetch' intrinsic is a hint to the code generator to insert a
 /// prefetch instruction if supported; otherwise, it is a noop. Prefetches have
 /// no effect on the behavior of the program but can change its performance
@@ -139,8 +147,8 @@ pragma(LDC_intrinsic, "llvm.stackrestore")
 /// keep in cache. The cache type specifies whether the prefetch is performed on
 /// the data (1) or instruction (0) cache. The rw, locality and cache type
 /// arguments must be constant integers.
-pragma(LDC_intrinsic, "llvm.prefetch")
-    void llvm_prefetch(void* ptr, uint rw, uint locality, uint cachetype) pure @safe;
+pragma(LDC_intrinsic, llvm_prefetch_fullname)
+    void llvm_prefetch(const(void)* ptr, uint rw, uint locality, uint cachetype) pure @safe;
 
 /// The 'llvm.pcmarker' intrinsic is a method to export a Program Counter (PC)
 /// in a region of code to simulators and other tools. The method is target