mirror of
https://github.com/archlinuxarm/PKGBUILDs.git
synced 2024-11-18 22:54:00 +00:00
350 lines
9.8 KiB
Diff
350 lines
9.8 KiB
Diff
From 59c86b913d42df170a4a3b9fb31790beb0053572 Mon Sep 17 00:00:00 2001
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From: Ashokkumar G <0xfee1dead.sa@gmail.com>
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Date: Mon, 15 Jul 2013 17:06:08 -0600
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Subject: [PATCH] GPLUGD: Adding gplugd peripheral changes and fixing clock
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issues due to changes in pxa gpio and marvell usb drivers
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Signed-off-by: Ashokkumar G <0xfee1dead.sa@gmail.com>
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---
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arch/arm/mach-mmp/gplugd.c | 217 ++++++++++++++++++++++++++++++++++++++++-
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drivers/clk/mmp/clk-pxa168.c | 17 +++-
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drivers/mmc/host/sdhci-pxav2.c | 17 ++++
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3 files changed, 244 insertions(+), 7 deletions(-)
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diff --git a/arch/arm/mach-mmp/gplugd.c b/arch/arm/mach-mmp/gplugd.c
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index d81b247..c6fc4fa 100644
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--- a/arch/arm/mach-mmp/gplugd.c
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+++ b/arch/arm/mach-mmp/gplugd.c
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@@ -12,9 +12,14 @@
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#include <linux/platform_device.h>
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#include <linux/gpio.h>
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#include <linux/gpio-pxa.h>
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+#include <linux/mmc/sdhci.h>
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+#include <linux/spi/spi.h>
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+#include <linux/spi/pxa2xx_spi.h>
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+#include <linux/delay.h>
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#include <asm/mach/arch.h>
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#include <asm/mach-types.h>
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+#include <asm/system.h>
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#include <mach/irqs.h>
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#include <mach/pxa168.h>
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@@ -133,8 +138,31 @@
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.irq_base = MMP_GPIO_TO_IRQ(0),
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};
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+#if 0
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+static unsigned long mmc4_pin_config[] __initdata = {
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+ GPIO125_MMC4_DAT3,
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+ GPIO126_MMC4_DAT2,
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+ GPIO127_MMC4_DAT1,
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+ GPIO0_2_MMC4_DAT0,
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+ GPIO1_2_MMC4_CMD,
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+ GPIO2_2_MMC4_CLK,
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+ GPIO113_GPIO
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+};
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+#endif
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+static struct i2c_pxa_platform_data i2c_info __initdata = {
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+ .use_pio = 1,
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+};
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+
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static struct i2c_board_info gplugd_i2c_board_info[] = {
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{
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+ .type = "tda998X",
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+ .addr = 0x70,
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+ },
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+ {
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+ .type = "tda99Xcec",
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+ .addr = 0x34,
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+ },
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+ {
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.type = "isl1208",
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.addr = 0x6F,
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}
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@@ -161,6 +189,10 @@ struct pxa168_eth_platform_data gplugd_eth_platform_data = {
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.init = gplugd_eth_init,
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};
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+struct sdhci_pxa_platdata gplugd_sdh_platdata = {
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+ .quirks = SDHCI_QUIRK_NO_HISPD_BIT | SDHCI_QUIRK_NO_BUSY_IRQ | SDHCI_QUIRK_32BIT_DMA_SIZE,
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+};
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+
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static void __init select_disp_freq(void)
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{
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/* set GPIO 35 & clear GPIO 85 to set LCD External Clock to 74.25 MHz */
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@@ -181,21 +213,198 @@ static void __init select_disp_freq(void)
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}
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}
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+#ifdef CONFIG_USB_SUPPORT
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+
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+#if defined(CONFIG_USB_EHCI_HCD) && defined(CONFIG_USB_EHCI_MV)
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+
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+static char *pxa168_u2h_clock_name[] = {
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+ [0] = "U2HCLK",
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+};
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+
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+static struct mv_usb_platform_data pxa168_u2h_pdata = {
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+ /*.clknum = 1,
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+ .clkname = pxa168_u2h_clock_name,*/
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+ .mode = MV_USB_MODE_HOST,
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+ .phy_init = pxa_usb_phy_init,
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+ .phy_deinit = pxa_usb_phy_deinit,
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+ .set_vbus = NULL,
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+};
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+#endif
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+
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+#if defined(CONFIG_USB_MV_UDC) || defined(CONFIG_USB_EHCI_MV_U2O)
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+static char *pxa168_u2o_clock_name[] = {
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+ [0] = "U2OCLK",
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+};
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+
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+static struct mv_usb_platform_data pxa168_u2o_udc_pdata = {
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+ /*.clknum = 1,
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+ .clkname = pxa168_u2o_clock_name,*/
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+ .vbus = NULL,
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+ .mode = MV_USB_MODE_OTG,
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+ .otg_force_a_bus_req = 1,
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+ .phy_init = pxa_usb_phy_init,
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+ .phy_deinit = pxa_usb_phy_deinit,
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+ .set_vbus = NULL,
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+};
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+static struct mv_usb_platform_data pxa168_u2o_pdata = {
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+ /*.clknum = 1,
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+ .clkname = pxa168_u2o_clock_name,*/
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+ .vbus = NULL,
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+ .mode = MV_USB_MODE_OTG,
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+ .otg_force_a_bus_req = 1,
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+ .phy_init = pxa_usb_phy_init,
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+ .phy_deinit = pxa_usb_phy_deinit,
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+ .set_vbus = NULL,
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+};
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+static struct mv_usb_platform_data pxa168_u2o_otg_pdata = {
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+ /*.clknum = 1,
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+ .clkname = pxa168_u2o_clock_name,*/
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+ .vbus = NULL,
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+ .mode = MV_USB_MODE_OTG,
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+ .otg_force_a_bus_req = 1,
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+ .phy_init = pxa_usb_phy_init,
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+ .phy_deinit = pxa_usb_phy_deinit,
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+ /*.set_vbus = gplugd_u2o_vbus_set,*/
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+ .set_vbus = NULL,
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+};
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+
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+#endif
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+#endif
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+
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+static struct pxa2xx_spi_master pxa_ssp_master_info = {
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+ .num_chipselect = 1,
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+ .enable_dma = 1,
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+};
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+
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+static struct pxa2xx_spi_chip AT45DB041D_spi_info = {
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+ .tx_threshold = 1,
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+ .rx_threshold = 1,
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+ .timeout = 1000,
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+ .gpio_cs = 110
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+};
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+
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+static struct spi_board_info __initdata gplugD_spi_board_info[] = {
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+ {
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+ .modalias = "mtd_dataflash",
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+ .mode = SPI_MODE_0,
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+ .max_speed_hz = 260000,
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+ .bus_num = 2,
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+ .chip_select = 0,
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+ .platform_data = NULL,
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+ .controller_data = &AT45DB041D_spi_info,
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+ .irq = -1,
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+ },
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+};
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+
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+static inline int pxa168_add_spi(int id, struct pxa2xx_spi_master *pdata)
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+{
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+ struct platform_device *pd;
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+
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+ pd = platform_device_alloc("pxa2xx-spi", id);
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+ if (pd == NULL) {
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+ pr_err("pxa2xx-spi: failed to allocate device (id=%d)\n", id);
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+ return -ENOMEM;
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+ }
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+
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+ platform_device_add_data(pd, pdata, sizeof(*pdata));
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+
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+ return platform_device_add(pd);
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+}
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+
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+static void __init read_store_mac_addr(void)
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+{
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+ int i;
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+ u8 *mac_addr = gplugd_eth_platform_data.mac_addr;
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+
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+ /* gplugD uses serial number tag to pass MAC address */
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+ *mac_addr++ = (system_serial_high >> 8) & 0xff;
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+ *mac_addr++ = system_serial_high & 0xff;
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+
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+ for (i = 3; i >= 0; i--)
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+ *mac_addr++ = (system_serial_low >> i*8) & 0xff;
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+ /*printk(KERN_NOTICE "mac-address at gplugd.c is ");
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+ for(i = 0; i < 6; i++)
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+ printk(KERN_NOTICE "%c:", (pxa168_eth_data.mac_addr[i]));
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+ for(i = 0; i < 6; i++)
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+ printk(KERN_NOTICE "%d:", (pxa168_eth_data.mac_addr[i]));*/
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+}
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+
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+static struct fb_videomode video_modes[] = {
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+ /* TDA9989 Video Mode */
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+ [0] = {
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+ .pixclock = 13468,
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+ .refresh = 60,
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+ .xres = 1280,
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+ .yres = 720,
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+ .hsync_len = 40,
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+ .left_margin = 220,
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+ .right_margin = 110,
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+ .vsync_len = 5,
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+ .upper_margin = 20,
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+ .lower_margin = 5,
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+ .sync = 0,
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+ },
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+};
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+
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+static struct pxa168fb_mach_info tda9981_hdmi_info __initdata = {
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+ .id = "tda9981",
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+ .modes = video_modes,
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+ .num_modes = ARRAY_SIZE(video_modes),
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+ .pix_fmt = PIX_FMT_RGB565,
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+ .io_pin_allocation_mode = PIN_MODE_DUMB_24,
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+ .dumb_mode = DUMB_MODE_RGB888,
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+ .active = 1,
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+ .panel_rbswap = 1,
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+ .invert_pixclock = 0,
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+ .max_fb_size = (1280 * 720 * 4),
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+};
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+
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static void __init gplugd_init(void)
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{
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mfp_config(ARRAY_AND_SIZE(gplugd_pin_config));
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+ platform_device_add_data(&pxa168_device_gpio, &pxa168_gpio_pdata,
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+ sizeof(struct pxa_gpio_platform_data));
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+ platform_device_register(&pxa168_device_gpio);
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select_disp_freq();
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/* on-chip devices */
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pxa168_add_uart(3);
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pxa168_add_ssp(1);
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- pxa168_add_twsi(0, NULL, ARRAY_AND_SIZE(gplugd_i2c_board_info));
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- platform_device_add_data(&pxa168_device_gpio, &pxa168_gpio_pdata,
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- sizeof(struct pxa_gpio_platform_data));
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- platform_device_register(&pxa168_device_gpio);
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+ /*pxa168_add_twsi(0, NULL, ARRAY_AND_SIZE(gplugd_i2c_board_info));*/
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+ pxa168_add_twsi(0, &i2c_info, ARRAY_AND_SIZE(gplugd_i2c_board_info));
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+
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+ read_store_mac_addr();
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pxa168_add_eth(&gplugd_eth_platform_data);
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+ pxa168_add_sdh(1, &gplugd_sdh_platdata);
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+ pxa168_add_sdh(2, &gplugd_sdh_platdata);
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+
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+#if defined(CONFIG_USB_EHCI_HCD) && defined(CONFIG_USB_EHCI_MV)
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+ pxa168_device_u2h.dev.platform_data = &pxa168_u2h_pdata;
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+ platform_device_register(&pxa168_device_u2h);
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+#endif
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+#ifdef CONFIG_USB_MV_UDC
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+ pxa168_device_u2o.dev.platform_data = &pxa168_u2o_udc_pdata;
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+ platform_device_register(&pxa168_device_u2o);
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+#endif
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+
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+#ifdef CONFIG_USB_EHCI_MV_U2O
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+ pxa168_device_u2oehci.dev.platform_data = &pxa168_u2o_pdata;
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+ platform_device_register(&pxa168_device_u2oehci);
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+#endif
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+
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+#if 0
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+#ifdef CONFIG_USB_MV_OTG
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+ pxa168_device_u2ootg.dev.platform_data = &pxa168_u2o_otg_pdata;
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+ platform_device_register(&pxa168_device_u2ootg);
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+#endif
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+#endif
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+ pxa168_add_ssp(2);
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+ pxa168_add_spi(2, &pxa_ssp_master_info);
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+ spi_register_board_info(gplugD_spi_board_info, ARRAY_SIZE(gplugD_spi_board_info));
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+ pxa168_add_fb(&tda9981_hdmi_info);
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+ pxa168_add_fb_ovly(&tda9981_hdmi_info);
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}
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MACHINE_START(GPLUGD, "PXA168-based GuruPlug Display (gplugD) Platform")
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diff --git a/drivers/clk/mmp/clk-pxa168.c b/drivers/clk/mmp/clk-pxa168.c
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index 321a9ed..21a997e 100644
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--- a/drivers/clk/mmp/clk-pxa168.c
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+++ b/drivers/clk/mmp/clk-pxa168.c
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@@ -662,7 +662,7 @@ void __init pxa168_clk_init(void)
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clk = mmp_clk_register_apbc("gpio", "vctcxo",
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apbc_base + APBC_GPIO, 10, 0, &clk_lock);
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- clk_register_clkdev(clk, NULL, "pxa-gpio");
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+ clk_register_clkdev(clk, NULL, "mmp-gpio");
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clk = mmp_clk_register_apbc("kpc", "clk32",
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apbc_base + APBC_KPC, 10, 0, &clk_lock);
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@@ -798,13 +798,24 @@ void __init pxa168_clk_init(void)
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clk_register_clkdev(clk, "sph_clk", NULL);
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#endif
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- clk = mmp_clk_register_apmu("sph", "U2HCLK", apmu_base + APMU_USB,
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+ /*clk = mmp_clk_register_apmu("sph", "U2HCLK", apmu_base + APMU_USB,
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0x12, &clk_lock);
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clk_register_clkdev(clk, "U2HCLK", NULL);
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clk = mmp_clk_register_apmu("usb", "U2OCLK", apmu_base + APMU_USB,
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0x09, &clk_lock);
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- clk_register_clkdev(clk, "U2OCLK", NULL);
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+ clk_register_clkdev(clk, "U2OCLK", NULL);*/
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+
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+ clk = mmp_clk_register_apmu("sph", "pxa-sph", apmu_base + APMU_USB,
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+ 0x12, &clk_lock);
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+ /*clk_register_clkdev(clk, "pxa-sph", NULL);*/
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+ clk_register_clkdev(clk, NULL, "pxa-sph");
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+
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+ clk = mmp_clk_register_apmu("usb", "pxa-u2oehci", apmu_base + APMU_USB,
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+ 0x09, &clk_lock);
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+ /*clk_register_clkdev(clk, "pxa-u2oehci", NULL);*/
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+ clk_register_clkdev(clk, NULL, "pxa-u2oehci");
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+
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#if 0
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/*Check USB clock start*/
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diff --git a/drivers/mmc/host/sdhci-pxav2.c b/drivers/mmc/host/sdhci-pxav2.c
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index 6a3f702..78ac2bc 100644
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--- a/drivers/mmc/host/sdhci-pxav2.c
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+++ b/drivers/mmc/host/sdhci-pxav2.c
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@@ -111,7 +111,24 @@ static int pxav2_mmc_set_width(struct sdhci_host *host, int width)
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return 0;
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}
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+/*
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+ * we cannot talk to controller for 8 bus cycles according to sdio spec
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+ * at lowest speed this is 100,000 HZ per cycle or 800,000 cycles
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+ * which is quite a LONG TIME on a fast cpu -- so delay if needed
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+ */
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+static inline u16 pxa168_readw(struct sdhci_host *host, int reg)
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+{
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+ u32 temp;
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+ if (reg == SDHCI_HOST_VERSION) {
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+ temp = readl (host->ioaddr + SDHCI_HOST_VERSION - 2) >> 16;
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+ return temp & 0xffff;
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+ }
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+
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+ return readw(host->ioaddr + reg);
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+}
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+
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static const struct sdhci_ops pxav2_sdhci_ops = {
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+ .read_w = &pxa168_readw,
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.get_max_clock = sdhci_pltfm_clk_get_max_clock,
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.platform_reset_exit = pxav2_set_private_registers,
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.platform_bus_width = pxav2_mmc_set_width,
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--
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1.8.1.6
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