PKGBUILDs/alarm/uboot-olinuxino/0009-mxs-spl_mem_init-Change-EMI-port-priority.patch
2013-05-10 02:22:33 +03:00

31 lines
1 KiB
Diff

From e61fac261f081b5b68c304c3a7ce849cc08f3f79 Mon Sep 17 00:00:00 2001
From: Fabio Estevam <fabio.estevam@freescale.com>
Date: Fri, 3 May 2013 04:37:13 +0000
Subject: [PATCH 09/15] mxs: spl_mem_init: Change EMI port priority
FSL bootlets code set the PORT_PRIORITY_ORDER field of register HW_EMI_CTRL
as 0x2, which means:
PORT0231 = 0x02 Priority Order: AXI0, AHB2, AHB3, AHB1
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
---
arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c b/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c
index 5eacd36..41fb803 100644
--- a/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c
+++ b/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c
@@ -287,7 +287,7 @@ static void mx23_mem_init(void)
early_delay(20000);
/* Adjust EMI port priority. */
- clrsetbits_le32(0x80020000, 0x1f << 16, 0x8);
+ clrsetbits_le32(0x80020000, 0x1f << 16, 0x2);
early_delay(20000);
setbits_le32(MXS_DRAM_BASE + 0x40, 1 << 19);
--
1.8.2.2