mirror of
https://github.com/archlinuxarm/PKGBUILDs.git
synced 2024-09-19 22:08:32 +00:00
33 lines
1 KiB
Diff
33 lines
1 KiB
Diff
From 2c8e7b746adc1a27a5c4232e005074ff8a5f78f1 Mon Sep 17 00:00:00 2001
|
|
From: Kevin Mihelich <kevin@archlinuxarm.org>
|
|
Date: Sat, 5 Nov 2016 15:28:36 -0600
|
|
Subject: [PATCH 8/8] Downgrade mmc1 speed
|
|
|
|
200MHz causes errors reading the card and filesystem corruption.
|
|
|
|
Signed-off-by: Kevin Mihelich <kevin@archlinuxarm.org>
|
|
---
|
|
arch/arm64/boot/dts/mediatek/mt8173-oak.dtsi | 4 ++--
|
|
1 file changed, 2 insertions(+), 2 deletions(-)
|
|
|
|
diff --git a/arch/arm64/boot/dts/mediatek/mt8173-oak.dtsi b/arch/arm64/boot/dts/mediatek/mt8173-oak.dtsi
|
|
index d64da67ef24d..b6e1835307e8 100644
|
|
--- a/arch/arm64/boot/dts/mediatek/mt8173-oak.dtsi
|
|
+++ b/arch/arm64/boot/dts/mediatek/mt8173-oak.dtsi
|
|
@@ -420,10 +420,10 @@
|
|
pinctrl-0 = <&mmc1_pins_default>;
|
|
pinctrl-1 = <&mmc1_pins_uhs>;
|
|
bus-width = <4>;
|
|
- max-frequency = <200000000>;
|
|
+ max-frequency = <100000000>;
|
|
cap-sd-highspeed;
|
|
+ sd-uhs-sdr25;
|
|
sd-uhs-sdr50;
|
|
- sd-uhs-sdr104;
|
|
cd-gpios = <&pio 1 GPIO_ACTIVE_HIGH>;
|
|
wp-gpios = <&pio 42 GPIO_ACTIVE_HIGH>;
|
|
vmmc-supply = <&mt6397_vmch_reg>;
|
|
--
|
|
2.13.0
|
|
|