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PKGBUILDs/extra/valgrind/valgrind-3.13.0-amd64-eflags-tests.patch
Kevin Mihelich 9219bdc92c extra/valgrind to 3.13.0-6
2018-01-06 20:32:44 +00:00

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commit 4c8c3af18adc0a202d0e342b8ca3731a5b724a1d
Author: Tom Hughes <tom@compton.nu>
Date: Wed Aug 30 19:26:37 2017 +0100
Fix eflags handling in amd64 instruction tests
In 64 bit mode there's no way to just save eflags so we save the
whole of rflags but we were doing so to a 32 bit variable!
Replace that with proper rflags support that knows it is dealing
with the full 64 bit flags word in 64 bit mode.
diff --git a/none/tests/amd64/gen_insn_test.pl b/none/tests/amd64/gen_insn_test.pl
index 863e560..a144ec4 100644
--- a/none/tests/amd64/gen_insn_test.pl
+++ b/none/tests/amd64/gen_insn_test.pl
@@ -16,7 +16,7 @@ our %ArgTypes = (
m32 => "reg32_t",
m64 => "reg64_t",
m128 => "reg128_t",
- eflags => "reg32_t",
+ rflags => "reg64_t",
st => "reg64_t",
fpucw => "reg16_t",
fpusw => "reg16_t"
@@ -222,8 +222,8 @@ while (<>)
my @presets;
my $presetc = 0;
- my $eflagsmask;
- my $eflagsset;
+ my $rflagsmask;
+ my $rflagsset;
my $fpucwmask;
my $fpucwset;
my $fpuswmask;
@@ -305,7 +305,7 @@ while (<>)
$presetc++;
}
- elsif ($preset =~ /^(eflags)\[([^\]]+)\]$/)
+ elsif ($preset =~ /^(rflags)\[([^\]]+)\]$/)
{
my $type = $1;
my @values = split(/,/, $2);
@@ -313,8 +313,8 @@ while (<>)
$values[0] = oct($values[0]) if $values[0] =~ /^0/;
$values[1] = oct($values[1]) if $values[1] =~ /^0/;
- $eflagsmask = sprintf "0x%08x", $values[0] ^ 0xffffffff;
- $eflagsset = sprintf "0x%08x", $values[1];
+ $rflagsmask = sprintf "0x%016x", ~$values[0];
+ $rflagsset = sprintf "0x%016x", $values[1];
}
elsif ($preset =~ /^(fpucw)\[([^\]]+)\]$/)
{
@@ -544,7 +544,7 @@ while (<>)
print qq| $ArgTypes{$type} $name;\n|;
}
- elsif ($result =~ /^eflags\[([^\]]+)\]$/)
+ elsif ($result =~ /^rflags\[([^\]]+)\]$/)
{
my @values = split(/,/, $1);
@@ -553,19 +553,19 @@ while (<>)
my $result = {
name => $name,
- type => "eflags",
- subtype => "ud",
- values => [ map { sprintf "0x%08x", $_ } @values ]
+ type => "rflags",
+ subtype => "uq",
+ values => [ map { sprintf "0x%016x", $_ } @values ]
};
push @results, $result;
- print qq| $ArgTypes{eflags} $name;\n|;
+ print qq| $ArgTypes{rflags} $name;\n|;
- if (!defined($eflagsmask) && !defined($eflagsset))
+ if (!defined($rflagsmask) && !defined($rflagsset))
{
- $eflagsmask = sprintf "0x%08x", $values[0] ^ 0xffffffff;
- $eflagsset = sprintf "0x%08x", $values[0] & ~$values[1];
+ $rflagsmask = sprintf "0x%016x", ~$values[0];
+ $rflagsset = sprintf "0x%016x", $values[0] & ~$values[1];
}
}
elsif ($result =~ /^fpucw\[([^\]]+)\]$/)
@@ -722,12 +722,11 @@ while (<>)
}
}
- if (defined($eflagsmask) || defined($eflagsset))
+ if (defined($rflagsmask) || defined($rflagsset))
{
print qq| \"pushfq\\n\"\n|;
- print qq| \"andl \$$eflagsmask, (%%rsp)\\n\"\n| if defined($eflagsmask);
- print qq| \"andl \$0, 4(%%rsp)\\n\"\n| if defined($eflagsmask);
- print qq| \"orq \$$eflagsset, (%%rsp)\\n\"\n| if defined($eflagsset);
+ print qq| \"andq \$$rflagsmask, (%%rsp)\\n\"\n| if defined($rflagsmask);
+ print qq| \"orq \$$rflagsset, (%%rsp)\\n\"\n| if defined($rflagsset);
print qq| \"popfq\\n\"\n|;
}
@@ -747,7 +746,7 @@ while (<>)
foreach my $arg (@args)
{
- next if $arg->{type} eq "eflags";
+ next if $arg->{type} eq "rflags";
if ($arg->{type} =~ /^(r8|r16|r32|r64|mm|xmm)$/)
{
@@ -815,7 +814,7 @@ while (<>)
{
$fpresults[$RegNums{$result->{register}}] = $result;
}
- elsif ($result->{type} eq "eflags")
+ elsif ($result->{type} eq "rflags")
{
print qq| \"pushfq\\n\"\n|;
print qq| \"popq %$result->{argnum}\\n\"\n|;
@@ -925,9 +924,9 @@ while (<>)
my $suffix = $SubTypeSuffixes{$subtype};
my @values = @{$result->{values}};
- if ($type eq "eflags")
+ if ($type eq "rflags")
{
- print qq|${prefix}\($result->{name}.ud[0] & $values[0]UL\) == $values[1]UL|;
+ print qq|${prefix}\($result->{name}.uq[0] & $values[0]UL\) == $values[1]UL|;
}
elsif ($type =~ /^fpu[cs]w$/)
{
@@ -972,9 +971,9 @@ while (<>)
my $suffix = $SubTypeSuffixes{$subtype};
my @values = @{$result->{values}};
- if ($type eq "eflags")
+ if ($type eq "rflags")
{
- print qq| printf(" eflags & 0x%lx = 0x%lx (expected 0x%lx)\\n", $values[0]UL, $result->{name}.ud\[0\] & $values[0]UL, $values[1]UL);\n|;
+ print qq| printf(" rflags & 0x%lx = 0x%lx (expected 0x%lx)\\n", $values[0]UL, $result->{name}.ud\[0\] & $values[0]UL, $values[1]UL);\n|;
}
elsif ($type =~ /^fpu[cs]w$/)
{
diff --git a/none/tests/amd64/insn_basic.def b/none/tests/amd64/insn_basic.def
index 8b10da1..c3bef75 100644
--- a/none/tests/amd64/insn_basic.def
+++ b/none/tests/amd64/insn_basic.def
@@ -1,57 +1,57 @@
-adcb eflags[0x1,0x0] : imm8[12] al.ub[34] => 1.ub[46]
-adcb eflags[0x1,0x1] : imm8[12] al.ub[34] => 1.ub[47]
-adcb eflags[0x1,0x0] : imm8[12] bl.ub[34] => 1.ub[46]
-adcb eflags[0x1,0x1] : imm8[12] bl.ub[34] => 1.ub[47]
-adcb eflags[0x1,0x0] : imm8[12] m8.ub[34] => 1.ub[46]
-adcb eflags[0x1,0x1] : imm8[12] m8.ub[34] => 1.ub[47]
-adcb eflags[0x1,0x0] : r8.ub[12] r8.ub[34] => 1.ub[46]
-adcb eflags[0x1,0x1] : r8.ub[12] r8.ub[34] => 1.ub[47]
-adcb eflags[0x1,0x0] : r8.ub[12] m8.ub[34] => 1.ub[46]
-adcb eflags[0x1,0x1] : r8.ub[12] m8.ub[34] => 1.ub[47]
-###adcb eflags[0x1,0x0] : m8.ub[12] r8.ub[34] => 1.ub[46]
-###adcb eflags[0x1,0x1] : m8.ub[12] r8.ub[34] => 1.ub[47]
-adcw eflags[0x1,0x0] : imm8[12] r16.uw[3456] => 1.uw[3468]
-adcw eflags[0x1,0x1] : imm8[12] r16.uw[3456] => 1.uw[3469]
-###adcw eflags[0x1,0x0] : imm16[1234] ax.uw[5678] => 1.uw[6912]
-###adcw eflags[0x1,0x1] : imm16[1234] ax.uw[5678] => 1.uw[6913]
-adcw eflags[0x1,0x0] : imm16[1234] bx.uw[5678] => 1.uw[6912]
-adcw eflags[0x1,0x1] : imm16[1234] bx.uw[5678] => 1.uw[6913]
-adcw eflags[0x1,0x0] : imm16[1234] m16.uw[5678] => 1.uw[6912]
-adcw eflags[0x1,0x1] : imm16[1234] m16.uw[5678] => 1.uw[6913]
-adcw eflags[0x1,0x0] : r16.uw[1234] r16.uw[5678] => 1.uw[6912]
-adcw eflags[0x1,0x1] : r16.uw[1234] r16.uw[5678] => 1.uw[6913]
-adcw eflags[0x1,0x0] : r16.uw[1234] m16.uw[5678] => 1.uw[6912]
-adcw eflags[0x1,0x1] : r16.uw[1234] m16.uw[5678] => 1.uw[6913]
-adcw eflags[0x1,0x0] : m16.uw[1234] r16.uw[5678] => 1.uw[6912]
-adcw eflags[0x1,0x1] : m16.uw[1234] r16.uw[5678] => 1.uw[6913]
-adcl eflags[0x1,0x0] : imm8[12] r32.ud[87654321] => 1.ud[87654333]
-adcl eflags[0x1,0x1] : imm8[12] r32.ud[87654321] => 1.ud[87654334]
-###adcl eflags[0x1,0x0] : imm32[12345678] eax.ud[87654321] => 1.ud[99999999]
-###adcl eflags[0x1,0x1] : imm32[12345678] eax.ud[87654321] => 1.ud[100000000]
-adcl eflags[0x1,0x0] : imm32[12345678] ebx.ud[87654321] => 1.ud[99999999]
-adcl eflags[0x1,0x1] : imm32[12345678] ebx.ud[87654321] => 1.ud[100000000]
-adcl eflags[0x1,0x0] : imm32[12345678] m32.ud[87654321] => 1.ud[99999999]
-adcl eflags[0x1,0x1] : imm32[12345678] m32.ud[87654321] => 1.ud[100000000]
-adcl eflags[0x1,0x0] : r32.ud[12345678] r32.ud[87654321] => 1.ud[99999999]
-adcl eflags[0x1,0x1] : r32.ud[12345678] r32.ud[87654321] => 1.ud[100000000]
-adcl eflags[0x1,0x0] : r32.ud[12345678] m32.ud[87654321] => 1.ud[99999999]
-adcl eflags[0x1,0x1] : r32.ud[12345678] m32.ud[87654321] => 1.ud[100000000]
-adcl eflags[0x1,0x0] : m32.ud[12345678] r32.ud[87654321] => 1.ud[99999999]
-adcl eflags[0x1,0x1] : m32.ud[12345678] r32.ud[87654321] => 1.ud[100000000]
-adcq eflags[0x1,0x0] : imm8[12] r64.uq[8765432187654321] => 1.uq[8765432187654333]
-adcq eflags[0x1,0x1] : imm8[12] r64.uq[8765432187654321] => 1.uq[8765432187654334]
-###adcq eflags[0x1,0x0] : imm32[12345678] rax.uq[8765432187654321] => 1.uq[8765432199999999]
-###adcq eflags[0x1,0x1] : imm32[12345678] rax.uq[8765432187654321] => 1.uq[8765432200000000]
-adcq eflags[0x1,0x0] : imm32[12345678] rbx.uq[8765432187654321] => 1.uq[8765432199999999]
-adcq eflags[0x1,0x1] : imm32[12345678] rbx.uq[8765432187654321] => 1.uq[8765432200000000]
-adcq eflags[0x1,0x0] : imm32[12345678] m64.uq[8765432187654321] => 1.uq[8765432199999999]
-adcq eflags[0x1,0x1] : imm32[12345678] m64.uq[8765432187654321] => 1.uq[8765432200000000]
-adcq eflags[0x1,0x0] : r64.uq[1234567812345678] r64.uq[8765432187654321] => 1.uq[9999999999999999]
-adcq eflags[0x1,0x1] : r64.uq[1234567812345678] r64.uq[8765432187654321] => 1.uq[10000000000000000]
-adcq eflags[0x1,0x0] : r64.uq[1234567812345678] m64.uq[8765432187654321] => 1.uq[9999999999999999]
-adcq eflags[0x1,0x1] : r64.uq[1234567812345678] m64.uq[8765432187654321] => 1.uq[10000000000000000]
-adcq eflags[0x1,0x0] : m64.uq[1234567812345678] r64.uq[8765432187654321] => 1.uq[9999999999999999]
-adcq eflags[0x1,0x1] : m64.uq[1234567812345678] r64.uq[8765432187654321] => 1.uq[10000000000000000]
+adcb rflags[0x1,0x0] : imm8[12] al.ub[34] => 1.ub[46]
+adcb rflags[0x1,0x1] : imm8[12] al.ub[34] => 1.ub[47]
+adcb rflags[0x1,0x0] : imm8[12] bl.ub[34] => 1.ub[46]
+adcb rflags[0x1,0x1] : imm8[12] bl.ub[34] => 1.ub[47]
+adcb rflags[0x1,0x0] : imm8[12] m8.ub[34] => 1.ub[46]
+adcb rflags[0x1,0x1] : imm8[12] m8.ub[34] => 1.ub[47]
+adcb rflags[0x1,0x0] : r8.ub[12] r8.ub[34] => 1.ub[46]
+adcb rflags[0x1,0x1] : r8.ub[12] r8.ub[34] => 1.ub[47]
+adcb rflags[0x1,0x0] : r8.ub[12] m8.ub[34] => 1.ub[46]
+adcb rflags[0x1,0x1] : r8.ub[12] m8.ub[34] => 1.ub[47]
+###adcb rflags[0x1,0x0] : m8.ub[12] r8.ub[34] => 1.ub[46]
+###adcb rflags[0x1,0x1] : m8.ub[12] r8.ub[34] => 1.ub[47]
+adcw rflags[0x1,0x0] : imm8[12] r16.uw[3456] => 1.uw[3468]
+adcw rflags[0x1,0x1] : imm8[12] r16.uw[3456] => 1.uw[3469]
+###adcw rflags[0x1,0x0] : imm16[1234] ax.uw[5678] => 1.uw[6912]
+###adcw rflags[0x1,0x1] : imm16[1234] ax.uw[5678] => 1.uw[6913]
+adcw rflags[0x1,0x0] : imm16[1234] bx.uw[5678] => 1.uw[6912]
+adcw rflags[0x1,0x1] : imm16[1234] bx.uw[5678] => 1.uw[6913]
+adcw rflags[0x1,0x0] : imm16[1234] m16.uw[5678] => 1.uw[6912]
+adcw rflags[0x1,0x1] : imm16[1234] m16.uw[5678] => 1.uw[6913]
+adcw rflags[0x1,0x0] : r16.uw[1234] r16.uw[5678] => 1.uw[6912]
+adcw rflags[0x1,0x1] : r16.uw[1234] r16.uw[5678] => 1.uw[6913]
+adcw rflags[0x1,0x0] : r16.uw[1234] m16.uw[5678] => 1.uw[6912]
+adcw rflags[0x1,0x1] : r16.uw[1234] m16.uw[5678] => 1.uw[6913]
+adcw rflags[0x1,0x0] : m16.uw[1234] r16.uw[5678] => 1.uw[6912]
+adcw rflags[0x1,0x1] : m16.uw[1234] r16.uw[5678] => 1.uw[6913]
+adcl rflags[0x1,0x0] : imm8[12] r32.ud[87654321] => 1.ud[87654333]
+adcl rflags[0x1,0x1] : imm8[12] r32.ud[87654321] => 1.ud[87654334]
+###adcl rflags[0x1,0x0] : imm32[12345678] eax.ud[87654321] => 1.ud[99999999]
+###adcl rflags[0x1,0x1] : imm32[12345678] eax.ud[87654321] => 1.ud[100000000]
+adcl rflags[0x1,0x0] : imm32[12345678] ebx.ud[87654321] => 1.ud[99999999]
+adcl rflags[0x1,0x1] : imm32[12345678] ebx.ud[87654321] => 1.ud[100000000]
+adcl rflags[0x1,0x0] : imm32[12345678] m32.ud[87654321] => 1.ud[99999999]
+adcl rflags[0x1,0x1] : imm32[12345678] m32.ud[87654321] => 1.ud[100000000]
+adcl rflags[0x1,0x0] : r32.ud[12345678] r32.ud[87654321] => 1.ud[99999999]
+adcl rflags[0x1,0x1] : r32.ud[12345678] r32.ud[87654321] => 1.ud[100000000]
+adcl rflags[0x1,0x0] : r32.ud[12345678] m32.ud[87654321] => 1.ud[99999999]
+adcl rflags[0x1,0x1] : r32.ud[12345678] m32.ud[87654321] => 1.ud[100000000]
+adcl rflags[0x1,0x0] : m32.ud[12345678] r32.ud[87654321] => 1.ud[99999999]
+adcl rflags[0x1,0x1] : m32.ud[12345678] r32.ud[87654321] => 1.ud[100000000]
+adcq rflags[0x1,0x0] : imm8[12] r64.uq[8765432187654321] => 1.uq[8765432187654333]
+adcq rflags[0x1,0x1] : imm8[12] r64.uq[8765432187654321] => 1.uq[8765432187654334]
+###adcq rflags[0x1,0x0] : imm32[12345678] rax.uq[8765432187654321] => 1.uq[8765432199999999]
+###adcq rflags[0x1,0x1] : imm32[12345678] rax.uq[8765432187654321] => 1.uq[8765432200000000]
+adcq rflags[0x1,0x0] : imm32[12345678] rbx.uq[8765432187654321] => 1.uq[8765432199999999]
+adcq rflags[0x1,0x1] : imm32[12345678] rbx.uq[8765432187654321] => 1.uq[8765432200000000]
+adcq rflags[0x1,0x0] : imm32[12345678] m64.uq[8765432187654321] => 1.uq[8765432199999999]
+adcq rflags[0x1,0x1] : imm32[12345678] m64.uq[8765432187654321] => 1.uq[8765432200000000]
+adcq rflags[0x1,0x0] : r64.uq[1234567812345678] r64.uq[8765432187654321] => 1.uq[9999999999999999]
+adcq rflags[0x1,0x1] : r64.uq[1234567812345678] r64.uq[8765432187654321] => 1.uq[10000000000000000]
+adcq rflags[0x1,0x0] : r64.uq[1234567812345678] m64.uq[8765432187654321] => 1.uq[9999999999999999]
+adcq rflags[0x1,0x1] : r64.uq[1234567812345678] m64.uq[8765432187654321] => 1.uq[10000000000000000]
+adcq rflags[0x1,0x0] : m64.uq[1234567812345678] r64.uq[8765432187654321] => 1.uq[9999999999999999]
+adcq rflags[0x1,0x1] : m64.uq[1234567812345678] r64.uq[8765432187654321] => 1.uq[10000000000000000]
addb imm8[12] al.ub[34] => 1.ub[46]
addb imm8[12] bl.ub[34] => 1.ub[46]
addb imm8[12] m8.ub[34] => 1.ub[46]
@@ -123,430 +123,430 @@ bsrq r64.uq[0x1357246813572468] r64.uq[0] => 1.uq[60]
bsrq m64.uq[0x7531864275318642] r64.uq[0] => 1.uq[62]
bswapl r32.ud[0x12345678] => 0.ud[0x78563412]
bswapq r64.uq[0x1234567813572468] => 0.uq[0x6824571378563412]
-btw imm8[0] r16.uw[0x4231] => 1.uw[0x4231] eflags[0x001,0x001]
-btw imm8[12] r16.uw[0x4231] => 1.uw[0x4231] eflags[0x001,0x000]
-btw imm8[0] m16.uw[0x4231] => 1.uw[0x4231] eflags[0x001,0x001]
-btw imm8[12] m16.uw[0x4231] => 1.uw[0x4231] eflags[0x001,0x000]
-###btw r16.uw[0] r16.uw[0x4231] => 1.uw[0x4231] eflags[0x001,0x001]
-###btw r16.uw[12] r16.uw[0x4231] => 1.uw[0x4231] eflags[0x001,0x000]
-###btw r16.uw[0] m16.uw[0x4231] => 1.uw[0x4231] eflags[0x001,0x001]
-###btw r16.uw[12] m16.uw[0x4231] => 1.uw[0x4231] eflags[0x001,0x000]
-btl imm8[0] r32.ud[0x86427531] => 1.ud[0x86427531] eflags[0x001,0x001]
-btl imm8[24] r32.ud[0x86427531] => 1.ud[0x86427531] eflags[0x001,0x000]
-btl imm8[0] m32.ud[0x86427531] => 1.ud[0x86427531] eflags[0x001,0x001]
-btl imm8[24] m32.ud[0x86427531] => 1.ud[0x86427531] eflags[0x001,0x000]
-btl r32.ud[0] r32.ud[0x86427531] => 1.ud[0x86427531] eflags[0x001,0x001]
-btl r32.ud[24] r32.ud[0x86427531] => 1.ud[0x86427531] eflags[0x001,0x000]
-btl r32.ud[0] m32.ud[0x86427531] => 1.ud[0x86427531] eflags[0x001,0x001]
-btl r32.ud[24] m32.ud[0x86427531] => 1.ud[0x86427531] eflags[0x001,0x000]
-btq imm8[0] r64.uq[0x8642753124681357] => 1.uq[0x8642753124681357] eflags[0x001,0x001]
-btq imm8[48] r64.uq[0x8642753124681357] => 1.uq[0x8642753124681357] eflags[0x001,0x000]
-btq imm8[0] m64.uq[0x8642753124681357] => 1.uq[0x8642753124681357] eflags[0x001,0x001]
-btq imm8[48] m64.uq[0x8642753124681357] => 1.uq[0x8642753124681357] eflags[0x001,0x000]
-btq r64.uq[0] r64.uq[0x8642753124681357] => 1.uq[0x8642753124681357] eflags[0x001,0x001]
-btq r64.uq[48] r64.uq[0x8642753124681357] => 1.uq[0x8642753124681357] eflags[0x001,0x000]
-btq r64.uq[0] m64.uq[0x8642753124681357] => 1.uq[0x8642753124681357] eflags[0x001,0x001]
-btq r64.uq[48] m64.uq[0x8642753124681357] => 1.uq[0x8642753124681357] eflags[0x001,0x000]
-btcw imm8[0] r16.uw[0x4231] => 1.uw[0x4230] eflags[0x001,0x001]
-btcw imm8[12] r16.uw[0x4231] => 1.uw[0x5231] eflags[0x001,0x000]
-btcw imm8[0] m16.uw[0x4231] => 1.uw[0x4230] eflags[0x001,0x001]
-btcw imm8[12] m16.uw[0x4231] => 1.uw[0x5231] eflags[0x001,0x000]
-###btcw r16.uw[0] r16.uw[0x4231] => 1.uw[0x4230] eflags[0x001,0x001]
-###btcw r16.uw[12] r16.uw[0x4231] => 1.uw[0x5231] eflags[0x001,0x000]
-###btcw r16.uw[0] m16.uw[0x4231] => 1.uw[0x4230] eflags[0x001,0x001]
-###btcw r16.uw[12] m16.uw[0x4231] => 1.uw[0x5231] eflags[0x001,0x000]
-btcl imm8[0] r32.ud[0x86427531] => 1.ud[0x86427530] eflags[0x001,0x001]
-btcl imm8[24] r32.ud[0x86427531] => 1.ud[0x87427531] eflags[0x001,0x000]
-btcl imm8[0] m32.ud[0x86427531] => 1.ud[0x86427530] eflags[0x001,0x001]
-btcl imm8[24] m32.ud[0x86427531] => 1.ud[0x87427531] eflags[0x001,0x000]
-btcl r32.ud[0] r32.ud[0x86427531] => 1.ud[0x86427530] eflags[0x001,0x001]
-btcl r32.ud[24] r32.ud[0x86427531] => 1.ud[0x87427531] eflags[0x001,0x000]
-btcl r32.ud[0] m32.ud[0x86427531] => 1.ud[0x86427530] eflags[0x001,0x001]
-btcl r32.ud[24] m32.ud[0x86427531] => 1.ud[0x87427531] eflags[0x001,0x000]
-btcq imm8[0] r64.uq[0x8642753124681357] => 1.uq[0x8642753124681356] eflags[0x001,0x001]
-btcq imm8[48] r64.uq[0x8642753124681357] => 1.uq[0x8643753124681357] eflags[0x001,0x000]
-btcq imm8[0] m64.uq[0x8642753124681357] => 1.uq[0x8642753124681356] eflags[0x001,0x001]
-btcq imm8[48] m64.uq[0x8642753124681357] => 1.uq[0x8643753124681357] eflags[0x001,0x000]
-btcq r64.uq[0] r64.uq[0x8642753124681357] => 1.uq[0x8642753124681356] eflags[0x001,0x001]
-btcq r64.uq[48] r64.uq[0x8642753124681357] => 1.uq[0x8643753124681357] eflags[0x001,0x000]
-btcq r64.uq[0] m64.uq[0x8642753124681357] => 1.uq[0x8642753124681356] eflags[0x001,0x001]
-btcq r64.uq[48] m64.uq[0x8642753124681357] => 1.uq[0x8643753124681357] eflags[0x001,0x000]
-btrw imm8[0] r16.uw[0x4231] => 1.uw[0x4230] eflags[0x001,0x001]
-btrw imm8[12] r16.uw[0x4231] => 1.uw[0x4231] eflags[0x001,0x000]
-btrw imm8[0] m16.uw[0x4231] => 1.uw[0x4230] eflags[0x001,0x001]
-btrw imm8[12] m16.uw[0x4231] => 1.uw[0x4231] eflags[0x001,0x000]
-###btrw r16.uw[0] r16.uw[0x4231] => 1.uw[0x4230] eflags[0x001,0x001]
-###btrw r16.uw[12] r16.uw[0x4231] => 1.uw[0x4231] eflags[0x001,0x000]
-###btrw r16.uw[0] m16.uw[0x4231] => 1.uw[0x4230] eflags[0x001,0x001]
-###btrw r16.uw[12] m16.uw[0x4231] => 1.uw[0x4231] eflags[0x001,0x000]
-btrl imm8[0] r32.ud[0x86427531] => 1.ud[0x86427530] eflags[0x001,0x001]
-btrl imm8[24] r32.ud[0x86427531] => 1.ud[0x86427531] eflags[0x001,0x000]
-btrl imm8[0] m32.ud[0x86427531] => 1.ud[0x86427530] eflags[0x001,0x001]
-btrl imm8[24] m32.ud[0x86427531] => 1.ud[0x86427531] eflags[0x001,0x000]
-btrl r32.ud[0] r32.ud[0x86427531] => 1.ud[0x86427530] eflags[0x001,0x001]
-btrl r32.ud[24] r32.ud[0x86427531] => 1.ud[0x86427531] eflags[0x001,0x000]
-btrl r32.ud[0] m32.ud[0x86427531] => 1.ud[0x86427530] eflags[0x001,0x001]
-btrl r32.ud[24] m32.ud[0x86427531] => 1.ud[0x86427531] eflags[0x001,0x000]
-btrq imm8[0] r64.uq[0x8642753124681357] => 1.uq[0x8642753124681356] eflags[0x001,0x001]
-btrq imm8[48] r64.uq[0x8642753124681357] => 1.uq[0x8642753124681357] eflags[0x001,0x000]
-btrq imm8[0] m64.uq[0x8642753124681357] => 1.uq[0x8642753124681356] eflags[0x001,0x001]
-btrq imm8[48] m64.uq[0x8642753124681357] => 1.uq[0x8642753124681357] eflags[0x001,0x000]
-btrq r64.uq[0] r64.uq[0x8642753124681357] => 1.uq[0x8642753124681356] eflags[0x001,0x001]
-btrq r64.uq[48] r64.uq[0x8642753124681357] => 1.uq[0x8642753124681357] eflags[0x001,0x000]
-btrq r64.uq[0] m64.uq[0x8642753124681357] => 1.uq[0x8642753124681356] eflags[0x001,0x001]
-btrq r64.uq[48] m64.uq[0x8642753124681357] => 1.uq[0x8642753124681357] eflags[0x001,0x000]
-btsw imm8[0] r16.uw[0x4231] => 1.uw[0x4231] eflags[0x001,0x001]
-btsw imm8[12] r16.uw[0x4231] => 1.uw[0x5231] eflags[0x001,0x000]
-btsw imm8[0] m16.uw[0x4231] => 1.uw[0x4231] eflags[0x001,0x001]
-btsw imm8[12] m16.uw[0x4231] => 1.uw[0x5231] eflags[0x001,0x000]
-###btsw r16.uw[0] r16.uw[0x4231] => 1.uw[0x4231] eflags[0x001,0x001]
-###btsw r16.uw[12] r16.uw[0x4231] => 1.uw[0x5231] eflags[0x001,0x000]
-###btsw r16.uw[0] m16.uw[0x4231] => 1.uw[0x4231] eflags[0x001,0x001]
-###btsw r16.uw[12] m16.uw[0x4231] => 1.uw[0x5231] eflags[0x001,0x000]
-btsl imm8[0] r32.ud[0x86427531] => 1.ud[0x86427531] eflags[0x001,0x001]
-btsl imm8[24] r32.ud[0x86427531] => 1.ud[0x87427531] eflags[0x001,0x000]
-btsl imm8[0] m32.ud[0x86427531] => 1.ud[0x86427531] eflags[0x001,0x001]
-btsl imm8[24] m32.ud[0x86427531] => 1.ud[0x87427531] eflags[0x001,0x000]
-btsl r32.ud[0] r32.ud[0x86427531] => 1.ud[0x86427531] eflags[0x001,0x001]
-btsl r32.ud[24] r32.ud[0x86427531] => 1.ud[0x87427531] eflags[0x001,0x000]
-btsl r32.ud[0] m32.ud[0x86427531] => 1.ud[0x86427531] eflags[0x001,0x001]
-btsl r32.ud[24] m32.ud[0x86427531] => 1.ud[0x87427531] eflags[0x001,0x000]
-btsq imm8[0] r64.uq[0x8642753124681357] => 1.uq[0x8642753124681357] eflags[0x001,0x001]
-btsq imm8[48] r64.uq[0x8642753124681357] => 1.uq[0x8643753124681357] eflags[0x001,0x000]
-btsq imm8[0] m64.uq[0x8642753124681357] => 1.uq[0x8642753124681357] eflags[0x001,0x001]
-btsq imm8[48] m64.uq[0x8642753124681357] => 1.uq[0x8643753124681357] eflags[0x001,0x000]
-btsq r64.uq[0] r64.uq[0x8642753124681357] => 1.uq[0x8642753124681357] eflags[0x001,0x001]
-btsq r64.uq[48] r64.uq[0x8642753124681357] => 1.uq[0x8643753124681357] eflags[0x001,0x000]
-btsq r64.uq[0] m64.uq[0x8642753124681357] => 1.uq[0x8642753124681357] eflags[0x001,0x001]
-btsq r64.uq[48] m64.uq[0x8642753124681357] => 1.uq[0x8643753124681357] eflags[0x001,0x000]
+btw imm8[0] r16.uw[0x4231] => 1.uw[0x4231] rflags[0x001,0x001]
+btw imm8[12] r16.uw[0x4231] => 1.uw[0x4231] rflags[0x001,0x000]
+btw imm8[0] m16.uw[0x4231] => 1.uw[0x4231] rflags[0x001,0x001]
+btw imm8[12] m16.uw[0x4231] => 1.uw[0x4231] rflags[0x001,0x000]
+###btw r16.uw[0] r16.uw[0x4231] => 1.uw[0x4231] rflags[0x001,0x001]
+###btw r16.uw[12] r16.uw[0x4231] => 1.uw[0x4231] rflags[0x001,0x000]
+###btw r16.uw[0] m16.uw[0x4231] => 1.uw[0x4231] rflags[0x001,0x001]
+###btw r16.uw[12] m16.uw[0x4231] => 1.uw[0x4231] rflags[0x001,0x000]
+btl imm8[0] r32.ud[0x86427531] => 1.ud[0x86427531] rflags[0x001,0x001]
+btl imm8[24] r32.ud[0x86427531] => 1.ud[0x86427531] rflags[0x001,0x000]
+btl imm8[0] m32.ud[0x86427531] => 1.ud[0x86427531] rflags[0x001,0x001]
+btl imm8[24] m32.ud[0x86427531] => 1.ud[0x86427531] rflags[0x001,0x000]
+btl r32.ud[0] r32.ud[0x86427531] => 1.ud[0x86427531] rflags[0x001,0x001]
+btl r32.ud[24] r32.ud[0x86427531] => 1.ud[0x86427531] rflags[0x001,0x000]
+btl r32.ud[0] m32.ud[0x86427531] => 1.ud[0x86427531] rflags[0x001,0x001]
+btl r32.ud[24] m32.ud[0x86427531] => 1.ud[0x86427531] rflags[0x001,0x000]
+btq imm8[0] r64.uq[0x8642753124681357] => 1.uq[0x8642753124681357] rflags[0x001,0x001]
+btq imm8[48] r64.uq[0x8642753124681357] => 1.uq[0x8642753124681357] rflags[0x001,0x000]
+btq imm8[0] m64.uq[0x8642753124681357] => 1.uq[0x8642753124681357] rflags[0x001,0x001]
+btq imm8[48] m64.uq[0x8642753124681357] => 1.uq[0x8642753124681357] rflags[0x001,0x000]
+btq r64.uq[0] r64.uq[0x8642753124681357] => 1.uq[0x8642753124681357] rflags[0x001,0x001]
+btq r64.uq[48] r64.uq[0x8642753124681357] => 1.uq[0x8642753124681357] rflags[0x001,0x000]
+btq r64.uq[0] m64.uq[0x8642753124681357] => 1.uq[0x8642753124681357] rflags[0x001,0x001]
+btq r64.uq[48] m64.uq[0x8642753124681357] => 1.uq[0x8642753124681357] rflags[0x001,0x000]
+btcw imm8[0] r16.uw[0x4231] => 1.uw[0x4230] rflags[0x001,0x001]
+btcw imm8[12] r16.uw[0x4231] => 1.uw[0x5231] rflags[0x001,0x000]
+btcw imm8[0] m16.uw[0x4231] => 1.uw[0x4230] rflags[0x001,0x001]
+btcw imm8[12] m16.uw[0x4231] => 1.uw[0x5231] rflags[0x001,0x000]
+###btcw r16.uw[0] r16.uw[0x4231] => 1.uw[0x4230] rflags[0x001,0x001]
+###btcw r16.uw[12] r16.uw[0x4231] => 1.uw[0x5231] rflags[0x001,0x000]
+###btcw r16.uw[0] m16.uw[0x4231] => 1.uw[0x4230] rflags[0x001,0x001]
+###btcw r16.uw[12] m16.uw[0x4231] => 1.uw[0x5231] rflags[0x001,0x000]
+btcl imm8[0] r32.ud[0x86427531] => 1.ud[0x86427530] rflags[0x001,0x001]
+btcl imm8[24] r32.ud[0x86427531] => 1.ud[0x87427531] rflags[0x001,0x000]
+btcl imm8[0] m32.ud[0x86427531] => 1.ud[0x86427530] rflags[0x001,0x001]
+btcl imm8[24] m32.ud[0x86427531] => 1.ud[0x87427531] rflags[0x001,0x000]
+btcl r32.ud[0] r32.ud[0x86427531] => 1.ud[0x86427530] rflags[0x001,0x001]
+btcl r32.ud[24] r32.ud[0x86427531] => 1.ud[0x87427531] rflags[0x001,0x000]
+btcl r32.ud[0] m32.ud[0x86427531] => 1.ud[0x86427530] rflags[0x001,0x001]
+btcl r32.ud[24] m32.ud[0x86427531] => 1.ud[0x87427531] rflags[0x001,0x000]
+btcq imm8[0] r64.uq[0x8642753124681357] => 1.uq[0x8642753124681356] rflags[0x001,0x001]
+btcq imm8[48] r64.uq[0x8642753124681357] => 1.uq[0x8643753124681357] rflags[0x001,0x000]
+btcq imm8[0] m64.uq[0x8642753124681357] => 1.uq[0x8642753124681356] rflags[0x001,0x001]
+btcq imm8[48] m64.uq[0x8642753124681357] => 1.uq[0x8643753124681357] rflags[0x001,0x000]
+btcq r64.uq[0] r64.uq[0x8642753124681357] => 1.uq[0x8642753124681356] rflags[0x001,0x001]
+btcq r64.uq[48] r64.uq[0x8642753124681357] => 1.uq[0x8643753124681357] rflags[0x001,0x000]
+btcq r64.uq[0] m64.uq[0x8642753124681357] => 1.uq[0x8642753124681356] rflags[0x001,0x001]
+btcq r64.uq[48] m64.uq[0x8642753124681357] => 1.uq[0x8643753124681357] rflags[0x001,0x000]
+btrw imm8[0] r16.uw[0x4231] => 1.uw[0x4230] rflags[0x001,0x001]
+btrw imm8[12] r16.uw[0x4231] => 1.uw[0x4231] rflags[0x001,0x000]
+btrw imm8[0] m16.uw[0x4231] => 1.uw[0x4230] rflags[0x001,0x001]
+btrw imm8[12] m16.uw[0x4231] => 1.uw[0x4231] rflags[0x001,0x000]
+###btrw r16.uw[0] r16.uw[0x4231] => 1.uw[0x4230] rflags[0x001,0x001]
+###btrw r16.uw[12] r16.uw[0x4231] => 1.uw[0x4231] rflags[0x001,0x000]
+###btrw r16.uw[0] m16.uw[0x4231] => 1.uw[0x4230] rflags[0x001,0x001]
+###btrw r16.uw[12] m16.uw[0x4231] => 1.uw[0x4231] rflags[0x001,0x000]
+btrl imm8[0] r32.ud[0x86427531] => 1.ud[0x86427530] rflags[0x001,0x001]
+btrl imm8[24] r32.ud[0x86427531] => 1.ud[0x86427531] rflags[0x001,0x000]
+btrl imm8[0] m32.ud[0x86427531] => 1.ud[0x86427530] rflags[0x001,0x001]
+btrl imm8[24] m32.ud[0x86427531] => 1.ud[0x86427531] rflags[0x001,0x000]
+btrl r32.ud[0] r32.ud[0x86427531] => 1.ud[0x86427530] rflags[0x001,0x001]
+btrl r32.ud[24] r32.ud[0x86427531] => 1.ud[0x86427531] rflags[0x001,0x000]
+btrl r32.ud[0] m32.ud[0x86427531] => 1.ud[0x86427530] rflags[0x001,0x001]
+btrl r32.ud[24] m32.ud[0x86427531] => 1.ud[0x86427531] rflags[0x001,0x000]
+btrq imm8[0] r64.uq[0x8642753124681357] => 1.uq[0x8642753124681356] rflags[0x001,0x001]
+btrq imm8[48] r64.uq[0x8642753124681357] => 1.uq[0x8642753124681357] rflags[0x001,0x000]
+btrq imm8[0] m64.uq[0x8642753124681357] => 1.uq[0x8642753124681356] rflags[0x001,0x001]
+btrq imm8[48] m64.uq[0x8642753124681357] => 1.uq[0x8642753124681357] rflags[0x001,0x000]
+btrq r64.uq[0] r64.uq[0x8642753124681357] => 1.uq[0x8642753124681356] rflags[0x001,0x001]
+btrq r64.uq[48] r64.uq[0x8642753124681357] => 1.uq[0x8642753124681357] rflags[0x001,0x000]
+btrq r64.uq[0] m64.uq[0x8642753124681357] => 1.uq[0x8642753124681356] rflags[0x001,0x001]
+btrq r64.uq[48] m64.uq[0x8642753124681357] => 1.uq[0x8642753124681357] rflags[0x001,0x000]
+btsw imm8[0] r16.uw[0x4231] => 1.uw[0x4231] rflags[0x001,0x001]
+btsw imm8[12] r16.uw[0x4231] => 1.uw[0x5231] rflags[0x001,0x000]
+btsw imm8[0] m16.uw[0x4231] => 1.uw[0x4231] rflags[0x001,0x001]
+btsw imm8[12] m16.uw[0x4231] => 1.uw[0x5231] rflags[0x001,0x000]
+###btsw r16.uw[0] r16.uw[0x4231] => 1.uw[0x4231] rflags[0x001,0x001]
+###btsw r16.uw[12] r16.uw[0x4231] => 1.uw[0x5231] rflags[0x001,0x000]
+###btsw r16.uw[0] m16.uw[0x4231] => 1.uw[0x4231] rflags[0x001,0x001]
+###btsw r16.uw[12] m16.uw[0x4231] => 1.uw[0x5231] rflags[0x001,0x000]
+btsl imm8[0] r32.ud[0x86427531] => 1.ud[0x86427531] rflags[0x001,0x001]
+btsl imm8[24] r32.ud[0x86427531] => 1.ud[0x87427531] rflags[0x001,0x000]
+btsl imm8[0] m32.ud[0x86427531] => 1.ud[0x86427531] rflags[0x001,0x001]
+btsl imm8[24] m32.ud[0x86427531] => 1.ud[0x87427531] rflags[0x001,0x000]
+btsl r32.ud[0] r32.ud[0x86427531] => 1.ud[0x86427531] rflags[0x001,0x001]
+btsl r32.ud[24] r32.ud[0x86427531] => 1.ud[0x87427531] rflags[0x001,0x000]
+btsl r32.ud[0] m32.ud[0x86427531] => 1.ud[0x86427531] rflags[0x001,0x001]
+btsl r32.ud[24] m32.ud[0x86427531] => 1.ud[0x87427531] rflags[0x001,0x000]
+btsq imm8[0] r64.uq[0x8642753124681357] => 1.uq[0x8642753124681357] rflags[0x001,0x001]
+btsq imm8[48] r64.uq[0x8642753124681357] => 1.uq[0x8643753124681357] rflags[0x001,0x000]
+btsq imm8[0] m64.uq[0x8642753124681357] => 1.uq[0x8642753124681357] rflags[0x001,0x001]
+btsq imm8[48] m64.uq[0x8642753124681357] => 1.uq[0x8643753124681357] rflags[0x001,0x000]
+btsq r64.uq[0] r64.uq[0x8642753124681357] => 1.uq[0x8642753124681357] rflags[0x001,0x001]
+btsq r64.uq[48] r64.uq[0x8642753124681357] => 1.uq[0x8643753124681357] rflags[0x001,0x000]
+btsq r64.uq[0] m64.uq[0x8642753124681357] => 1.uq[0x8642753124681357] rflags[0x001,0x001]
+btsq r64.uq[48] m64.uq[0x8642753124681357] => 1.uq[0x8643753124681357] rflags[0x001,0x000]
cbw al.sb[123] : => ax.sw[123]
cbw al.sb[-123] : => ax.sw[-123]
cdq eax.ud[0x12345678] : => edx.ud[0x00000000] eax.ud[0x12345678]
cdq eax.ud[0xfedcba98] : => edx.ud[0xffffffff] eax.ud[0xfedcba98]
cdqe eax.ud[0x12345678] : => rax.uq[0x0000000012345678]
cdqe eax.ud[0xfedcba98] : => rax.uq[0xfffffffffedcba98]
-###clc eflags[0x001,0x000] : => eflags[0x001,0x000]
-###clc eflags[0x001,0x001] : => eflags[0x001,0x000]
-cld eflags[0x400,0x000] : => eflags[0x400,0x000]
-cld eflags[0x400,0x400] : => eflags[0x400,0x000]
-###cmc eflags[0x001,0x000] : => eflags[0x001,0x001]
-###cmc eflags[0x001,0x001] : => eflags[0x001,0x000]
-cmpb imm8[3] al.ub[2] => eflags[0x010,0x010]
-cmpb imm8[2] al.ub[3] => eflags[0x010,0x000]
-cmpb imm8[12] al.ub[12] => eflags[0x044,0x044]
-cmpb imm8[12] al.ub[34] => eflags[0x044,0x000]
-cmpb imm8[34] al.ub[12] => eflags[0x081,0x081]
-cmpb imm8[12] al.ub[34] => eflags[0x081,0x000]
-cmpb imm8[100] al.sb[-100] => eflags[0x800,0x800]
-cmpb imm8[50] al.sb[-50] => eflags[0x800,0x000]
-cmpb imm8[-50] al.sb[50] => eflags[0x800,0x000]
-cmpb imm8[-100] al.sb[100] => eflags[0x800,0x800]
-cmpb imm8[3] r8.ub[2] => eflags[0x010,0x010]
-cmpb imm8[2] r8.ub[3] => eflags[0x010,0x000]
-cmpb imm8[12] r8.ub[12] => eflags[0x044,0x044]
-cmpb imm8[12] r8.ub[34] => eflags[0x044,0x000]
-cmpb imm8[34] r8.ub[12] => eflags[0x081,0x081]
-cmpb imm8[12] r8.ub[34] => eflags[0x081,0x000]
-cmpb imm8[100] r8.sb[-100] => eflags[0x800,0x800]
-cmpb imm8[50] r8.sb[-50] => eflags[0x800,0x000]
-cmpb imm8[-50] r8.sb[50] => eflags[0x800,0x000]
-cmpb imm8[-100] r8.sb[100] => eflags[0x800,0x800]
-cmpb imm8[3] m8.ub[2] => eflags[0x010,0x010]
-cmpb imm8[2] m8.ub[3] => eflags[0x010,0x000]
-cmpb imm8[12] m8.ub[12] => eflags[0x044,0x044]
-cmpb imm8[12] m8.ub[34] => eflags[0x044,0x000]
-cmpb imm8[34] m8.ub[12] => eflags[0x081,0x081]
-cmpb imm8[12] m8.ub[34] => eflags[0x081,0x000]
-cmpb imm8[100] m8.sb[-100] => eflags[0x800,0x800]
-cmpb imm8[50] m8.sb[-50] => eflags[0x800,0x000]
-cmpb imm8[-50] m8.sb[50] => eflags[0x800,0x000]
-cmpb imm8[-100] m8.sb[100] => eflags[0x800,0x800]
-cmpb r8.ub[3] r8.ub[2] => eflags[0x010,0x010]
-cmpb r8.ub[2] r8.ub[3] => eflags[0x010,0x000]
-cmpb r8.ub[12] r8.ub[12] => eflags[0x044,0x044]
-cmpb r8.ub[12] r8.ub[34] => eflags[0x044,0x000]
-cmpb r8.ub[34] r8.ub[12] => eflags[0x081,0x081]
-cmpb r8.ub[12] r8.ub[34] => eflags[0x081,0x000]
-cmpb r8.ub[100] r8.sb[-100] => eflags[0x800,0x800]
-cmpb r8.ub[50] r8.sb[-50] => eflags[0x800,0x000]
-cmpb r8.sb[-50] r8.sb[50] => eflags[0x800,0x000]
-cmpb r8.sb[-100] r8.sb[100] => eflags[0x800,0x800]
-cmpb r8.ub[3] m8.ub[2] => eflags[0x010,0x010]
-cmpb r8.ub[2] m8.ub[3] => eflags[0x010,0x000]
-cmpb r8.ub[12] m8.ub[12] => eflags[0x044,0x044]
-cmpb r8.ub[12] m8.ub[34] => eflags[0x044,0x000]
-cmpb r8.ub[34] m8.ub[12] => eflags[0x081,0x081]
-cmpb r8.ub[12] m8.ub[34] => eflags[0x081,0x000]
-cmpb r8.ub[100] m8.sb[-100] => eflags[0x800,0x800]
-cmpb r8.ub[50] m8.sb[-50] => eflags[0x800,0x000]
-cmpb r8.sb[-50] m8.sb[50] => eflags[0x800,0x000]
-cmpb r8.sb[-100] m8.sb[100] => eflags[0x800,0x800]
-cmpb m8.ub[3] r8.ub[2] => eflags[0x010,0x010]
-cmpb m8.ub[2] r8.ub[3] => eflags[0x010,0x000]
-cmpb m8.ub[12] r8.ub[12] => eflags[0x044,0x044]
-cmpb m8.ub[12] r8.ub[34] => eflags[0x044,0x000]
-cmpb m8.ub[34] r8.ub[12] => eflags[0x081,0x081]
-cmpb m8.ub[12] r8.ub[34] => eflags[0x081,0x000]
-cmpb m8.ub[100] r8.sb[-100] => eflags[0x800,0x800]
-cmpb m8.ub[50] r8.sb[-50] => eflags[0x800,0x000]
-cmpb m8.sb[-50] r8.sb[50] => eflags[0x800,0x000]
-cmpb m8.sb[-100] r8.sb[100] => eflags[0x800,0x800]
-cmpw imm8[3] r16.uw[2] => eflags[0x010,0x010]
-cmpw imm8[2] r16.uw[3] => eflags[0x010,0x000]
-cmpw imm8[12] r16.uw[12] => eflags[0x044,0x044]
-cmpw imm8[12] r16.uw[34] => eflags[0x044,0x000]
-cmpw imm8[34] r16.uw[12] => eflags[0x081,0x081]
-cmpw imm8[12] r16.uw[34] => eflags[0x081,0x000]
-cmpw imm8[100] r16.sw[-32700] => eflags[0x800,0x800]
-cmpw imm8[50] r16.sw[-50] => eflags[0x800,0x000]
-cmpw imm8[-50] r16.sw[50] => eflags[0x800,0x000]
-cmpw imm8[-100] r16.sw[32700] => eflags[0x800,0x800]
-cmpw imm8[3] m16.uw[2] => eflags[0x010,0x010]
-cmpw imm8[2] m16.uw[3] => eflags[0x010,0x000]
-cmpw imm8[12] m16.uw[12] => eflags[0x044,0x044]
-cmpw imm8[12] m16.uw[34] => eflags[0x044,0x000]
-cmpw imm8[34] m16.uw[12] => eflags[0x081,0x081]
-cmpw imm8[12] m16.uw[34] => eflags[0x081,0x000]
-cmpw imm8[100] m16.sw[-32700] => eflags[0x800,0x800]
-cmpw imm8[50] m16.sw[-50] => eflags[0x800,0x000]
-cmpw imm8[-50] m16.sw[50] => eflags[0x800,0x000]
-cmpw imm8[-100] m16.sw[32700] => eflags[0x800,0x800]
-cmpw imm16[3] ax.uw[2] => eflags[0x010,0x010]
-cmpw imm16[2] ax.uw[3] => eflags[0x010,0x000]
-cmpw imm16[12] ax.uw[12] => eflags[0x044,0x044]
-cmpw imm16[12] ax.uw[34] => eflags[0x044,0x000]
-cmpw imm16[34] ax.uw[12] => eflags[0x081,0x081]
-cmpw imm16[12] ax.uw[34] => eflags[0x081,0x000]
-cmpw imm16[100] ax.sw[-32700] => eflags[0x800,0x800]
-cmpw imm16[50] ax.sw[-50] => eflags[0x800,0x000]
-cmpw imm16[-50] ax.sw[50] => eflags[0x800,0x000]
-cmpw imm16[-100] ax.sw[32700] => eflags[0x800,0x800]
-cmpw imm16[3] r16.uw[2] => eflags[0x010,0x010]
-cmpw imm16[2] r16.uw[3] => eflags[0x010,0x000]
-cmpw imm16[12] r16.uw[12] => eflags[0x044,0x044]
-cmpw imm16[12] r16.uw[34] => eflags[0x044,0x000]
-cmpw imm16[34] r16.uw[12] => eflags[0x081,0x081]
-cmpw imm16[12] r16.uw[34] => eflags[0x081,0x000]
-cmpw imm16[100] r16.sw[-32700] => eflags[0x800,0x800]
-cmpw imm16[50] r16.sw[-50] => eflags[0x800,0x000]
-cmpw imm16[-50] r16.sw[50] => eflags[0x800,0x000]
-cmpw imm16[-100] r16.sw[32700] => eflags[0x800,0x800]
-cmpw imm16[3] m16.uw[2] => eflags[0x010,0x010]
-cmpw imm16[2] m16.uw[3] => eflags[0x010,0x000]
-cmpw imm16[12] m16.uw[12] => eflags[0x044,0x044]
-cmpw imm16[12] m16.uw[34] => eflags[0x044,0x000]
-cmpw imm16[34] m16.uw[12] => eflags[0x081,0x081]
-cmpw imm16[12] m16.uw[34] => eflags[0x081,0x000]
-cmpw imm16[100] m16.sw[-32700] => eflags[0x800,0x800]
-cmpw imm16[50] m16.sw[-50] => eflags[0x800,0x000]
-cmpw imm16[-50] m16.sw[50] => eflags[0x800,0x000]
-cmpw imm16[-100] m16.sw[32700] => eflags[0x800,0x800]
-cmpw r16.uw[3] r16.uw[2] => eflags[0x010,0x010]
-cmpw r16.uw[2] r16.uw[3] => eflags[0x010,0x000]
-cmpw r16.uw[12] r16.uw[12] => eflags[0x044,0x044]
-cmpw r16.uw[12] r16.uw[34] => eflags[0x044,0x000]
-cmpw r16.uw[34] r16.uw[12] => eflags[0x081,0x081]
-cmpw r16.uw[12] r16.uw[34] => eflags[0x081,0x000]
-cmpw r16.uw[100] r16.sw[-32700] => eflags[0x800,0x800]
-cmpw r16.uw[50] r16.sw[-50] => eflags[0x800,0x000]
-cmpw r16.sw[-50] r16.sw[50] => eflags[0x800,0x000]
-cmpw r16.sw[-100] r16.sw[32700] => eflags[0x800,0x800]
-cmpw r16.uw[3] m16.uw[2] => eflags[0x010,0x010]
-cmpw r16.uw[2] m16.uw[3] => eflags[0x010,0x000]
-cmpw r16.uw[12] m16.uw[12] => eflags[0x044,0x044]
-cmpw r16.uw[12] m16.uw[34] => eflags[0x044,0x000]
-cmpw r16.uw[34] m16.uw[12] => eflags[0x081,0x081]
-cmpw r16.uw[12] m16.uw[34] => eflags[0x081,0x000]
-cmpw r16.uw[100] m16.sw[-32700] => eflags[0x800,0x800]
-cmpw r16.uw[50] m16.sw[-50] => eflags[0x800,0x000]
-cmpw r16.sw[-50] m16.sw[50] => eflags[0x800,0x000]
-cmpw r16.sw[-100] m16.sw[32700] => eflags[0x800,0x800]
-cmpw m16.uw[3] r16.uw[2] => eflags[0x010,0x010]
-cmpw m16.uw[2] r16.uw[3] => eflags[0x010,0x000]
-cmpw m16.uw[12] r16.uw[12] => eflags[0x044,0x044]
-cmpw m16.uw[12] r16.uw[34] => eflags[0x044,0x000]
-cmpw m16.uw[34] r16.uw[12] => eflags[0x081,0x081]
-cmpw m16.uw[12] r16.uw[34] => eflags[0x081,0x000]
-cmpw m16.uw[100] r16.sw[-32700] => eflags[0x800,0x800]
-cmpw m16.uw[50] r16.sw[-50] => eflags[0x800,0x000]
-cmpw m16.sw[-50] r16.sw[50] => eflags[0x800,0x000]
-cmpw m16.sw[-100] r16.sw[32700] => eflags[0x800,0x800]
-cmpl imm8[3] r32.ud[2] => eflags[0x010,0x010]
-cmpl imm8[2] r32.ud[3] => eflags[0x010,0x000]
-cmpl imm8[12] r32.ud[12] => eflags[0x044,0x044]
-###cmpl imm8[12] r32.ud[34] => eflags[0x044,0x000]
-cmpl imm8[34] r32.ud[12] => eflags[0x081,0x081]
-cmpl imm8[12] r32.ud[34] => eflags[0x081,0x000]
-cmpl imm8[100] r32.sd[-2147483600] => eflags[0x800,0x800]
-cmpl imm8[50] r32.sd[-50] => eflags[0x800,0x000]
-cmpl imm8[-50] r32.sd[50] => eflags[0x800,0x000]
-cmpl imm8[-100] r32.sd[2147483600] => eflags[0x800,0x800]
-cmpl imm8[3] m32.ud[2] => eflags[0x010,0x010]
-cmpl imm8[2] m32.ud[3] => eflags[0x010,0x000]
-cmpl imm8[12] m32.ud[12] => eflags[0x044,0x044]
-cmpl imm8[12] m32.ud[34] => eflags[0x044,0x000]
-cmpl imm8[34] m32.ud[12] => eflags[0x081,0x081]
-cmpl imm8[12] m32.ud[34] => eflags[0x081,0x000]
-cmpl imm8[100] m32.sd[-2147483600] => eflags[0x800,0x800]
-cmpl imm8[50] m32.sd[-50] => eflags[0x800,0x000]
-cmpl imm8[-50] m32.sd[50] => eflags[0x800,0x000]
-cmpl imm8[-100] m32.sd[2147483600] => eflags[0x800,0x800]
-cmpl imm32[3] eax.ud[2] => eflags[0x010,0x010]
-cmpl imm32[2] eax.ud[3] => eflags[0x010,0x000]
-cmpl imm32[12] eax.ud[12] => eflags[0x044,0x044]
-cmpl imm32[12] eax.ud[34] => eflags[0x044,0x000]
-cmpl imm32[34] eax.ud[12] => eflags[0x081,0x081]
-cmpl imm32[12] eax.ud[34] => eflags[0x081,0x000]
-cmpl imm32[100] eax.sd[-2147483600] => eflags[0x800,0x800]
-cmpl imm32[50] eax.sd[-50] => eflags[0x800,0x000]
-cmpl imm32[-50] eax.sd[50] => eflags[0x800,0x000]
-cmpl imm32[-100] eax.sd[2147483600] => eflags[0x800,0x800]
-cmpl imm32[3] r32.ud[2] => eflags[0x010,0x010]
-cmpl imm32[2] r32.ud[3] => eflags[0x010,0x000]
-cmpl imm32[12] r32.ud[12] => eflags[0x044,0x044]
-cmpl imm32[12] r32.ud[34] => eflags[0x044,0x000]
-cmpl imm32[34] r32.ud[12] => eflags[0x081,0x081]
-cmpl imm32[12] r32.ud[34] => eflags[0x081,0x000]
-cmpl imm32[100] r32.sd[-2147483600] => eflags[0x800,0x800]
-cmpl imm32[50] r32.sd[-50] => eflags[0x800,0x000]
-cmpl imm32[-50] r32.sd[50] => eflags[0x800,0x000]
-cmpl imm32[-100] r32.sd[2147483600] => eflags[0x800,0x800]
-cmpl imm32[3] m32.ud[2] => eflags[0x010,0x010]
-cmpl imm32[2] m32.ud[3] => eflags[0x010,0x000]
-cmpl imm32[12] m32.ud[12] => eflags[0x044,0x044]
-cmpl imm32[12] m32.ud[34] => eflags[0x044,0x000]
-cmpl imm32[34] m32.ud[12] => eflags[0x081,0x081]
-cmpl imm32[12] m32.ud[34] => eflags[0x081,0x000]
-cmpl imm32[100] m32.sd[-2147483600] => eflags[0x800,0x800]
-cmpl imm32[50] m32.sd[-50] => eflags[0x800,0x000]
-cmpl imm32[-50] m32.sd[50] => eflags[0x800,0x000]
-cmpl imm32[-100] m32.sd[2147483600] => eflags[0x800,0x800]
-cmpl r32.ud[3] r32.ud[2] => eflags[0x010,0x010]
-cmpl r32.ud[2] r32.ud[3] => eflags[0x010,0x000]
-cmpl r32.ud[12] r32.ud[12] => eflags[0x044,0x044]
-cmpl r32.ud[12] r32.ud[34] => eflags[0x044,0x000]
-cmpl r32.ud[34] r32.ud[12] => eflags[0x081,0x081]
-cmpl r32.ud[12] r32.ud[34] => eflags[0x081,0x000]
-cmpl r32.ud[100] r32.sd[-2147483600] => eflags[0x800,0x800]
-cmpl r32.ud[50] r32.sd[-50] => eflags[0x800,0x000]
-cmpl r32.sd[-50] r32.sd[50] => eflags[0x800,0x000]
-cmpl r32.sd[-100] r32.sd[2147483600] => eflags[0x800,0x800]
-cmpl r32.ud[3] m32.ud[2] => eflags[0x010,0x010]
-cmpl r32.ud[2] m32.ud[3] => eflags[0x010,0x000]
-cmpl r32.ud[12] m32.ud[12] => eflags[0x044,0x044]
-cmpl r32.ud[12] m32.ud[34] => eflags[0x044,0x000]
-cmpl r32.ud[34] m32.ud[12] => eflags[0x081,0x081]
-cmpl r32.ud[12] m32.ud[34] => eflags[0x081,0x000]
-cmpl r32.ud[100] m32.sd[-2147483600] => eflags[0x800,0x800]
-cmpl r32.ud[50] m32.sd[-50] => eflags[0x800,0x000]
-cmpl r32.sd[-50] m32.sd[50] => eflags[0x800,0x000]
-cmpl r32.sd[-100] m32.sd[2147483600] => eflags[0x800,0x800]
-cmpl m32.ud[3] r32.ud[2] => eflags[0x010,0x010]
-cmpl m32.ud[2] r32.ud[3] => eflags[0x010,0x000]
-cmpl m32.ud[12] r32.ud[12] => eflags[0x044,0x044]
-cmpl m32.ud[12] r32.ud[34] => eflags[0x044,0x000]
-cmpl m32.ud[34] r32.ud[12] => eflags[0x081,0x081]
-cmpl m32.ud[12] r32.ud[34] => eflags[0x081,0x000]
-cmpl m32.ud[100] r32.sd[-2147483600] => eflags[0x800,0x800]
-cmpl m32.ud[50] r32.sd[-50] => eflags[0x800,0x000]
-cmpl m32.sd[-50] r32.sd[50] => eflags[0x800,0x000]
-###cmpl m32.sd[-100] r32.sd[2147483600] => eflags[0x800,0x800]
-cmpq imm8[3] r64.uq[2] => eflags[0x010,0x010]
-cmpq imm8[2] r64.uq[3] => eflags[0x010,0x000]
-cmpq imm8[12] r64.uq[12] => eflags[0x044,0x044]
-cmpq imm8[12] r64.uq[34] => eflags[0x044,0x000]
-cmpq imm8[34] r64.uq[12] => eflags[0x081,0x081]
-cmpq imm8[12] r64.uq[34] => eflags[0x081,0x000]
-cmpq imm8[100] r64.sq[-9223372036854775800] => eflags[0x800,0x800]
-cmpq imm8[50] r64.sq[-50] => eflags[0x800,0x000]
-cmpq imm8[-50] r64.sq[50] => eflags[0x800,0x000]
-cmpq imm8[-100] r64.sq[9223372036854775800] => eflags[0x800,0x800]
-cmpq imm8[3] m64.uq[2] => eflags[0x010,0x010]
-cmpq imm8[2] m64.uq[3] => eflags[0x010,0x000]
-cmpq imm8[12] m64.uq[12] => eflags[0x044,0x044]
-cmpq imm8[12] m64.uq[34] => eflags[0x044,0x000]
-cmpq imm8[34] m64.uq[12] => eflags[0x081,0x081]
-cmpq imm8[12] m64.uq[34] => eflags[0x081,0x000]
-cmpq imm8[100] m64.sq[-9223372036854775800] => eflags[0x800,0x800]
-cmpq imm8[50] m64.sq[-50] => eflags[0x800,0x000]
-cmpq imm8[-50] m64.sq[50] => eflags[0x800,0x000]
-cmpq imm8[-100] m64.sq[9223372036854775800] => eflags[0x800,0x800]
-cmpq imm32[3] rax.uq[2] => eflags[0x010,0x010]
-cmpq imm32[2] rax.uq[3] => eflags[0x010,0x000]
-cmpq imm32[12] rax.uq[12] => eflags[0x044,0x044]
-cmpq imm32[12] rax.uq[34] => eflags[0x044,0x000]
-cmpq imm32[34] rax.uq[12] => eflags[0x081,0x081]
-cmpq imm32[12] rax.uq[34] => eflags[0x081,0x000]
-cmpq imm32[100] rax.sq[-9223372036854775800] => eflags[0x800,0x800]
-cmpq imm32[50] rax.sq[-50] => eflags[0x800,0x000]
-cmpq imm32[-50] rax.sq[50] => eflags[0x800,0x000]
-cmpq imm32[-100] rax.sq[9223372036854775800] => eflags[0x800,0x800]
-cmpq imm32[3] r64.uq[2] => eflags[0x010,0x010]
-cmpq imm32[2] r64.uq[3] => eflags[0x010,0x000]
-cmpq imm32[12] r64.uq[12] => eflags[0x044,0x044]
-cmpq imm32[12] r64.uq[34] => eflags[0x044,0x000]
-cmpq imm32[34] r64.uq[12] => eflags[0x081,0x081]
-cmpq imm32[12] r64.uq[34] => eflags[0x081,0x000]
-cmpq imm32[100] r64.sq[-9223372036854775800] => eflags[0x800,0x800]
-cmpq imm32[50] r64.sq[-50] => eflags[0x800,0x000]
-cmpq imm32[-50] r64.sq[50] => eflags[0x800,0x000]
-cmpq imm32[-100] r64.sq[9223372036854775800] => eflags[0x800,0x800]
-cmpq imm32[3] m64.uq[2] => eflags[0x010,0x010]
-cmpq imm32[2] m64.uq[3] => eflags[0x010,0x000]
-cmpq imm32[12] m64.uq[12] => eflags[0x044,0x044]
-cmpq imm32[12] m64.uq[34] => eflags[0x044,0x000]
-cmpq imm32[34] m64.uq[12] => eflags[0x081,0x081]
-cmpq imm32[12] m64.uq[34] => eflags[0x081,0x000]
-cmpq imm32[100] m64.sq[-9223372036854775800] => eflags[0x800,0x800]
-cmpq imm32[50] m64.sq[-50] => eflags[0x800,0x000]
-cmpq imm32[-50] m64.sq[50] => eflags[0x800,0x000]
-cmpq imm32[-100] m64.sq[9223372036854775800] => eflags[0x800,0x800]
-cmpq r64.uq[3] r64.uq[2] => eflags[0x010,0x010]
-cmpq r64.uq[2] r64.uq[3] => eflags[0x010,0x000]
-cmpq r64.uq[12] r64.uq[12] => eflags[0x044,0x044]
-cmpq r64.uq[12] r64.uq[34] => eflags[0x044,0x000]
-cmpq r64.uq[34] r64.uq[12] => eflags[0x081,0x081]
-cmpq r64.uq[12] r64.uq[34] => eflags[0x081,0x000]
-cmpq r64.uq[100] r64.sq[-9223372036854775800] => eflags[0x800,0x800]
-cmpq r64.uq[50] r64.sq[-50] => eflags[0x800,0x000]
-cmpq r64.sq[-50] r64.sq[50] => eflags[0x800,0x000]
-cmpq r64.sq[-100] r64.sq[9223372036854775800] => eflags[0x800,0x800]
-cmpq r64.uq[3] m64.uq[2] => eflags[0x010,0x010]
-cmpq r64.uq[2] m64.uq[3] => eflags[0x010,0x000]
-cmpq r64.uq[12] m64.uq[12] => eflags[0x044,0x044]
-cmpq r64.uq[12] m64.uq[34] => eflags[0x044,0x000]
-cmpq r64.uq[34] m64.uq[12] => eflags[0x081,0x081]
-cmpq r64.uq[12] m64.uq[34] => eflags[0x081,0x000]
-cmpq r64.uq[100] m64.sq[-9223372036854775800] => eflags[0x800,0x800]
-cmpq r64.uq[50] m64.sq[-50] => eflags[0x800,0x000]
-cmpq r64.sq[-50] m64.sq[50] => eflags[0x800,0x000]
-cmpq r64.sq[-100] m64.sq[9223372036854775800] => eflags[0x800,0x800]
-cmpq m64.uq[3] r64.uq[2] => eflags[0x010,0x010]
-cmpq m64.uq[2] r64.uq[3] => eflags[0x010,0x000]
-cmpq m64.uq[12] r64.uq[12] => eflags[0x044,0x044]
-cmpq m64.uq[12] r64.uq[34] => eflags[0x044,0x000]
-cmpq m64.uq[34] r64.uq[12] => eflags[0x081,0x081]
-cmpq m64.uq[12] r64.uq[34] => eflags[0x081,0x000]
-cmpq m64.uq[100] r64.sq[-9223372036854775800] => eflags[0x800,0x800]
-cmpq m64.uq[50] r64.sq[-50] => eflags[0x800,0x000]
-cmpq m64.sq[-50] r64.sq[50] => eflags[0x800,0x000]
-cmpq m64.sq[-100] r64.sq[9223372036854775800] => eflags[0x800,0x800]
-###cmpxchgb eflags[0x40,0x00] al.ub[12] : r8.ub[56] r8.ub[12] => eflags[0x40,0x40] al.ub[12] 0.ub[56] 1.ub[56]
-###cmpxchgb eflags[0x40,0x40] al.ub[12] : r8.ub[56] r8.ub[34] => eflags[0x40,0x00] al.ub[34] 0.ub[56] 1.ub[34]
-###cmpxchgb eflags[0x40,0x00] al.ub[12] : r8.ub[56] m8.ub[12] => eflags[0x40,0x40] al.ub[12] 0.ub[56] 1.ub[56]
-###cmpxchgb eflags[0x40,0x40] al.ub[12] : r8.ub[56] m8.ub[34] => eflags[0x40,0x00] al.ub[34] 0.ub[56] 1.ub[34]
-###cmpxchgw eflags[0x40,0x00] ax.uw[123] : r16.uw[567] r16.uw[123] => eflags[0x40,0x40] ax.uw[123] 0.uw[567] 1.uw[567]
-###cmpxchgw eflags[0x40,0x40] ax.uw[123] : r16.uw[567] r16.uw[345] => eflags[0x40,0x00] ax.uw[345] 0.uw[567] 1.uw[345]
-cmpxchgw eflags[0x40,0x00] ax.uw[123] : r16.uw[567] m16.uw[123] => eflags[0x40,0x40] ax.uw[123] 0.uw[567] 1.uw[567]
-###cmpxchgw eflags[0x40,0x40] ax.uw[123] : r16.uw[567] m16.uw[345] => eflags[0x40,0x00] ax.uw[345] 0.uw[567] 1.uw[345]
-###cmpxchgl eflags[0x40,0x00] eax.ud[1234] : r32.ud[5678] r32.ud[1234] => eflags[0x40,0x40] eax.ud[1234] 0.ud[5678] 1.ud[5678]
-###cmpxchgl eflags[0x40,0x40] eax.ud[1234] : r32.ud[5678] r32.ud[3456] => eflags[0x40,0x00] eax.ud[3456] 0.ud[5678] 1.ud[3456]
-cmpxchgl eflags[0x40,0x00] eax.ud[1234] : r32.ud[5678] m32.ud[1234] => eflags[0x40,0x40] eax.ud[1234] 0.ud[5678] 1.ud[5678]
-cmpxchgl eflags[0x40,0x40] eax.ud[1234] : r32.ud[5678] m32.ud[3456] => eflags[0x40,0x00] eax.ud[3456] 0.ud[5678] 1.ud[3456]
-###cmpxchgq eflags[0x40,0x00] rax.uq[12345] : r64.uq[56789] r64.uq[12345] => eflags[0x40,0x40] rax.uq[12345] 0.uq[56789] 1.uq[56789]
-###cmpxchgq eflags[0x40,0x40] rax.uq[12345] : r64.uq[56789] r64.uq[34567] => eflags[0x40,0x00] rax.uq[34567] 0.uq[56789] 1.uq[34567]
-cmpxchgq eflags[0x40,0x00] rax.uq[12345] : r64.uq[56789] m64.uq[12345] => eflags[0x40,0x40] rax.uq[12345] 0.uq[56789] 1.uq[56789]
-cmpxchgq eflags[0x40,0x40] rax.uq[12345] : r64.uq[56789] m64.uq[34567] => eflags[0x40,0x00] rax.uq[34567] 0.uq[56789] 1.uq[34567]
+###clc rflags[0x001,0x000] : => rflags[0x001,0x000]
+###clc rflags[0x001,0x001] : => rflags[0x001,0x000]
+cld rflags[0x400,0x000] : => rflags[0x400,0x000]
+cld rflags[0x400,0x400] : => rflags[0x400,0x000]
+###cmc rflags[0x001,0x000] : => rflags[0x001,0x001]
+###cmc rflags[0x001,0x001] : => rflags[0x001,0x000]
+cmpb imm8[3] al.ub[2] => rflags[0x010,0x010]
+cmpb imm8[2] al.ub[3] => rflags[0x010,0x000]
+cmpb imm8[12] al.ub[12] => rflags[0x044,0x044]
+cmpb imm8[12] al.ub[34] => rflags[0x044,0x000]
+cmpb imm8[34] al.ub[12] => rflags[0x081,0x081]
+cmpb imm8[12] al.ub[34] => rflags[0x081,0x000]
+cmpb imm8[100] al.sb[-100] => rflags[0x800,0x800]
+cmpb imm8[50] al.sb[-50] => rflags[0x800,0x000]
+cmpb imm8[-50] al.sb[50] => rflags[0x800,0x000]
+cmpb imm8[-100] al.sb[100] => rflags[0x800,0x800]
+cmpb imm8[3] r8.ub[2] => rflags[0x010,0x010]
+cmpb imm8[2] r8.ub[3] => rflags[0x010,0x000]
+cmpb imm8[12] r8.ub[12] => rflags[0x044,0x044]
+cmpb imm8[12] r8.ub[34] => rflags[0x044,0x000]
+cmpb imm8[34] r8.ub[12] => rflags[0x081,0x081]
+cmpb imm8[12] r8.ub[34] => rflags[0x081,0x000]
+cmpb imm8[100] r8.sb[-100] => rflags[0x800,0x800]
+cmpb imm8[50] r8.sb[-50] => rflags[0x800,0x000]
+cmpb imm8[-50] r8.sb[50] => rflags[0x800,0x000]
+cmpb imm8[-100] r8.sb[100] => rflags[0x800,0x800]
+cmpb imm8[3] m8.ub[2] => rflags[0x010,0x010]
+cmpb imm8[2] m8.ub[3] => rflags[0x010,0x000]
+cmpb imm8[12] m8.ub[12] => rflags[0x044,0x044]
+cmpb imm8[12] m8.ub[34] => rflags[0x044,0x000]
+cmpb imm8[34] m8.ub[12] => rflags[0x081,0x081]
+cmpb imm8[12] m8.ub[34] => rflags[0x081,0x000]
+cmpb imm8[100] m8.sb[-100] => rflags[0x800,0x800]
+cmpb imm8[50] m8.sb[-50] => rflags[0x800,0x000]
+cmpb imm8[-50] m8.sb[50] => rflags[0x800,0x000]
+cmpb imm8[-100] m8.sb[100] => rflags[0x800,0x800]
+cmpb r8.ub[3] r8.ub[2] => rflags[0x010,0x010]
+cmpb r8.ub[2] r8.ub[3] => rflags[0x010,0x000]
+cmpb r8.ub[12] r8.ub[12] => rflags[0x044,0x044]
+cmpb r8.ub[12] r8.ub[34] => rflags[0x044,0x000]
+cmpb r8.ub[34] r8.ub[12] => rflags[0x081,0x081]
+cmpb r8.ub[12] r8.ub[34] => rflags[0x081,0x000]
+cmpb r8.ub[100] r8.sb[-100] => rflags[0x800,0x800]
+cmpb r8.ub[50] r8.sb[-50] => rflags[0x800,0x000]
+cmpb r8.sb[-50] r8.sb[50] => rflags[0x800,0x000]
+cmpb r8.sb[-100] r8.sb[100] => rflags[0x800,0x800]
+cmpb r8.ub[3] m8.ub[2] => rflags[0x010,0x010]
+cmpb r8.ub[2] m8.ub[3] => rflags[0x010,0x000]
+cmpb r8.ub[12] m8.ub[12] => rflags[0x044,0x044]
+cmpb r8.ub[12] m8.ub[34] => rflags[0x044,0x000]
+cmpb r8.ub[34] m8.ub[12] => rflags[0x081,0x081]
+cmpb r8.ub[12] m8.ub[34] => rflags[0x081,0x000]
+cmpb r8.ub[100] m8.sb[-100] => rflags[0x800,0x800]
+cmpb r8.ub[50] m8.sb[-50] => rflags[0x800,0x000]
+cmpb r8.sb[-50] m8.sb[50] => rflags[0x800,0x000]
+cmpb r8.sb[-100] m8.sb[100] => rflags[0x800,0x800]
+cmpb m8.ub[3] r8.ub[2] => rflags[0x010,0x010]
+cmpb m8.ub[2] r8.ub[3] => rflags[0x010,0x000]
+cmpb m8.ub[12] r8.ub[12] => rflags[0x044,0x044]
+cmpb m8.ub[12] r8.ub[34] => rflags[0x044,0x000]
+cmpb m8.ub[34] r8.ub[12] => rflags[0x081,0x081]
+cmpb m8.ub[12] r8.ub[34] => rflags[0x081,0x000]
+cmpb m8.ub[100] r8.sb[-100] => rflags[0x800,0x800]
+cmpb m8.ub[50] r8.sb[-50] => rflags[0x800,0x000]
+cmpb m8.sb[-50] r8.sb[50] => rflags[0x800,0x000]
+cmpb m8.sb[-100] r8.sb[100] => rflags[0x800,0x800]
+cmpw imm8[3] r16.uw[2] => rflags[0x010,0x010]
+cmpw imm8[2] r16.uw[3] => rflags[0x010,0x000]
+cmpw imm8[12] r16.uw[12] => rflags[0x044,0x044]
+cmpw imm8[12] r16.uw[34] => rflags[0x044,0x000]
+cmpw imm8[34] r16.uw[12] => rflags[0x081,0x081]
+cmpw imm8[12] r16.uw[34] => rflags[0x081,0x000]
+cmpw imm8[100] r16.sw[-32700] => rflags[0x800,0x800]
+cmpw imm8[50] r16.sw[-50] => rflags[0x800,0x000]
+cmpw imm8[-50] r16.sw[50] => rflags[0x800,0x000]
+cmpw imm8[-100] r16.sw[32700] => rflags[0x800,0x800]
+cmpw imm8[3] m16.uw[2] => rflags[0x010,0x010]
+cmpw imm8[2] m16.uw[3] => rflags[0x010,0x000]
+cmpw imm8[12] m16.uw[12] => rflags[0x044,0x044]
+cmpw imm8[12] m16.uw[34] => rflags[0x044,0x000]
+cmpw imm8[34] m16.uw[12] => rflags[0x081,0x081]
+cmpw imm8[12] m16.uw[34] => rflags[0x081,0x000]
+cmpw imm8[100] m16.sw[-32700] => rflags[0x800,0x800]
+cmpw imm8[50] m16.sw[-50] => rflags[0x800,0x000]
+cmpw imm8[-50] m16.sw[50] => rflags[0x800,0x000]
+cmpw imm8[-100] m16.sw[32700] => rflags[0x800,0x800]
+cmpw imm16[3] ax.uw[2] => rflags[0x010,0x010]
+cmpw imm16[2] ax.uw[3] => rflags[0x010,0x000]
+cmpw imm16[12] ax.uw[12] => rflags[0x044,0x044]
+cmpw imm16[12] ax.uw[34] => rflags[0x044,0x000]
+cmpw imm16[34] ax.uw[12] => rflags[0x081,0x081]
+cmpw imm16[12] ax.uw[34] => rflags[0x081,0x000]
+cmpw imm16[100] ax.sw[-32700] => rflags[0x800,0x800]
+cmpw imm16[50] ax.sw[-50] => rflags[0x800,0x000]
+cmpw imm16[-50] ax.sw[50] => rflags[0x800,0x000]
+cmpw imm16[-100] ax.sw[32700] => rflags[0x800,0x800]
+cmpw imm16[3] r16.uw[2] => rflags[0x010,0x010]
+cmpw imm16[2] r16.uw[3] => rflags[0x010,0x000]
+cmpw imm16[12] r16.uw[12] => rflags[0x044,0x044]
+cmpw imm16[12] r16.uw[34] => rflags[0x044,0x000]
+cmpw imm16[34] r16.uw[12] => rflags[0x081,0x081]
+cmpw imm16[12] r16.uw[34] => rflags[0x081,0x000]
+cmpw imm16[100] r16.sw[-32700] => rflags[0x800,0x800]
+cmpw imm16[50] r16.sw[-50] => rflags[0x800,0x000]
+cmpw imm16[-50] r16.sw[50] => rflags[0x800,0x000]
+cmpw imm16[-100] r16.sw[32700] => rflags[0x800,0x800]
+cmpw imm16[3] m16.uw[2] => rflags[0x010,0x010]
+cmpw imm16[2] m16.uw[3] => rflags[0x010,0x000]
+cmpw imm16[12] m16.uw[12] => rflags[0x044,0x044]
+cmpw imm16[12] m16.uw[34] => rflags[0x044,0x000]
+cmpw imm16[34] m16.uw[12] => rflags[0x081,0x081]
+cmpw imm16[12] m16.uw[34] => rflags[0x081,0x000]
+cmpw imm16[100] m16.sw[-32700] => rflags[0x800,0x800]
+cmpw imm16[50] m16.sw[-50] => rflags[0x800,0x000]
+cmpw imm16[-50] m16.sw[50] => rflags[0x800,0x000]
+cmpw imm16[-100] m16.sw[32700] => rflags[0x800,0x800]
+cmpw r16.uw[3] r16.uw[2] => rflags[0x010,0x010]
+cmpw r16.uw[2] r16.uw[3] => rflags[0x010,0x000]
+cmpw r16.uw[12] r16.uw[12] => rflags[0x044,0x044]
+cmpw r16.uw[12] r16.uw[34] => rflags[0x044,0x000]
+cmpw r16.uw[34] r16.uw[12] => rflags[0x081,0x081]
+cmpw r16.uw[12] r16.uw[34] => rflags[0x081,0x000]
+cmpw r16.uw[100] r16.sw[-32700] => rflags[0x800,0x800]
+cmpw r16.uw[50] r16.sw[-50] => rflags[0x800,0x000]
+cmpw r16.sw[-50] r16.sw[50] => rflags[0x800,0x000]
+cmpw r16.sw[-100] r16.sw[32700] => rflags[0x800,0x800]
+cmpw r16.uw[3] m16.uw[2] => rflags[0x010,0x010]
+cmpw r16.uw[2] m16.uw[3] => rflags[0x010,0x000]
+cmpw r16.uw[12] m16.uw[12] => rflags[0x044,0x044]
+cmpw r16.uw[12] m16.uw[34] => rflags[0x044,0x000]
+cmpw r16.uw[34] m16.uw[12] => rflags[0x081,0x081]
+cmpw r16.uw[12] m16.uw[34] => rflags[0x081,0x000]
+cmpw r16.uw[100] m16.sw[-32700] => rflags[0x800,0x800]
+cmpw r16.uw[50] m16.sw[-50] => rflags[0x800,0x000]
+cmpw r16.sw[-50] m16.sw[50] => rflags[0x800,0x000]
+cmpw r16.sw[-100] m16.sw[32700] => rflags[0x800,0x800]
+cmpw m16.uw[3] r16.uw[2] => rflags[0x010,0x010]
+cmpw m16.uw[2] r16.uw[3] => rflags[0x010,0x000]
+cmpw m16.uw[12] r16.uw[12] => rflags[0x044,0x044]
+cmpw m16.uw[12] r16.uw[34] => rflags[0x044,0x000]
+cmpw m16.uw[34] r16.uw[12] => rflags[0x081,0x081]
+cmpw m16.uw[12] r16.uw[34] => rflags[0x081,0x000]
+cmpw m16.uw[100] r16.sw[-32700] => rflags[0x800,0x800]
+cmpw m16.uw[50] r16.sw[-50] => rflags[0x800,0x000]
+cmpw m16.sw[-50] r16.sw[50] => rflags[0x800,0x000]
+cmpw m16.sw[-100] r16.sw[32700] => rflags[0x800,0x800]
+cmpl imm8[3] r32.ud[2] => rflags[0x010,0x010]
+cmpl imm8[2] r32.ud[3] => rflags[0x010,0x000]
+cmpl imm8[12] r32.ud[12] => rflags[0x044,0x044]
+###cmpl imm8[12] r32.ud[34] => rflags[0x044,0x000]
+cmpl imm8[34] r32.ud[12] => rflags[0x081,0x081]
+cmpl imm8[12] r32.ud[34] => rflags[0x081,0x000]
+cmpl imm8[100] r32.sd[-2147483600] => rflags[0x800,0x800]
+cmpl imm8[50] r32.sd[-50] => rflags[0x800,0x000]
+cmpl imm8[-50] r32.sd[50] => rflags[0x800,0x000]
+cmpl imm8[-100] r32.sd[2147483600] => rflags[0x800,0x800]
+cmpl imm8[3] m32.ud[2] => rflags[0x010,0x010]
+cmpl imm8[2] m32.ud[3] => rflags[0x010,0x000]
+cmpl imm8[12] m32.ud[12] => rflags[0x044,0x044]
+cmpl imm8[12] m32.ud[34] => rflags[0x044,0x000]
+cmpl imm8[34] m32.ud[12] => rflags[0x081,0x081]
+cmpl imm8[12] m32.ud[34] => rflags[0x081,0x000]
+cmpl imm8[100] m32.sd[-2147483600] => rflags[0x800,0x800]
+cmpl imm8[50] m32.sd[-50] => rflags[0x800,0x000]
+cmpl imm8[-50] m32.sd[50] => rflags[0x800,0x000]
+cmpl imm8[-100] m32.sd[2147483600] => rflags[0x800,0x800]
+cmpl imm32[3] eax.ud[2] => rflags[0x010,0x010]
+cmpl imm32[2] eax.ud[3] => rflags[0x010,0x000]
+cmpl imm32[12] eax.ud[12] => rflags[0x044,0x044]
+cmpl imm32[12] eax.ud[34] => rflags[0x044,0x000]
+cmpl imm32[34] eax.ud[12] => rflags[0x081,0x081]
+cmpl imm32[12] eax.ud[34] => rflags[0x081,0x000]
+cmpl imm32[100] eax.sd[-2147483600] => rflags[0x800,0x800]
+cmpl imm32[50] eax.sd[-50] => rflags[0x800,0x000]
+cmpl imm32[-50] eax.sd[50] => rflags[0x800,0x000]
+cmpl imm32[-100] eax.sd[2147483600] => rflags[0x800,0x800]
+cmpl imm32[3] r32.ud[2] => rflags[0x010,0x010]
+cmpl imm32[2] r32.ud[3] => rflags[0x010,0x000]
+cmpl imm32[12] r32.ud[12] => rflags[0x044,0x044]
+cmpl imm32[12] r32.ud[34] => rflags[0x044,0x000]
+cmpl imm32[34] r32.ud[12] => rflags[0x081,0x081]
+cmpl imm32[12] r32.ud[34] => rflags[0x081,0x000]
+cmpl imm32[100] r32.sd[-2147483600] => rflags[0x800,0x800]
+cmpl imm32[50] r32.sd[-50] => rflags[0x800,0x000]
+cmpl imm32[-50] r32.sd[50] => rflags[0x800,0x000]
+cmpl imm32[-100] r32.sd[2147483600] => rflags[0x800,0x800]
+cmpl imm32[3] m32.ud[2] => rflags[0x010,0x010]
+cmpl imm32[2] m32.ud[3] => rflags[0x010,0x000]
+cmpl imm32[12] m32.ud[12] => rflags[0x044,0x044]
+cmpl imm32[12] m32.ud[34] => rflags[0x044,0x000]
+cmpl imm32[34] m32.ud[12] => rflags[0x081,0x081]
+cmpl imm32[12] m32.ud[34] => rflags[0x081,0x000]
+cmpl imm32[100] m32.sd[-2147483600] => rflags[0x800,0x800]
+cmpl imm32[50] m32.sd[-50] => rflags[0x800,0x000]
+cmpl imm32[-50] m32.sd[50] => rflags[0x800,0x000]
+cmpl imm32[-100] m32.sd[2147483600] => rflags[0x800,0x800]
+cmpl r32.ud[3] r32.ud[2] => rflags[0x010,0x010]
+cmpl r32.ud[2] r32.ud[3] => rflags[0x010,0x000]
+cmpl r32.ud[12] r32.ud[12] => rflags[0x044,0x044]
+cmpl r32.ud[12] r32.ud[34] => rflags[0x044,0x000]
+cmpl r32.ud[34] r32.ud[12] => rflags[0x081,0x081]
+cmpl r32.ud[12] r32.ud[34] => rflags[0x081,0x000]
+cmpl r32.ud[100] r32.sd[-2147483600] => rflags[0x800,0x800]
+cmpl r32.ud[50] r32.sd[-50] => rflags[0x800,0x000]
+cmpl r32.sd[-50] r32.sd[50] => rflags[0x800,0x000]
+cmpl r32.sd[-100] r32.sd[2147483600] => rflags[0x800,0x800]
+cmpl r32.ud[3] m32.ud[2] => rflags[0x010,0x010]
+cmpl r32.ud[2] m32.ud[3] => rflags[0x010,0x000]
+cmpl r32.ud[12] m32.ud[12] => rflags[0x044,0x044]
+cmpl r32.ud[12] m32.ud[34] => rflags[0x044,0x000]
+cmpl r32.ud[34] m32.ud[12] => rflags[0x081,0x081]
+cmpl r32.ud[12] m32.ud[34] => rflags[0x081,0x000]
+cmpl r32.ud[100] m32.sd[-2147483600] => rflags[0x800,0x800]
+cmpl r32.ud[50] m32.sd[-50] => rflags[0x800,0x000]
+cmpl r32.sd[-50] m32.sd[50] => rflags[0x800,0x000]
+cmpl r32.sd[-100] m32.sd[2147483600] => rflags[0x800,0x800]
+cmpl m32.ud[3] r32.ud[2] => rflags[0x010,0x010]
+cmpl m32.ud[2] r32.ud[3] => rflags[0x010,0x000]
+cmpl m32.ud[12] r32.ud[12] => rflags[0x044,0x044]
+cmpl m32.ud[12] r32.ud[34] => rflags[0x044,0x000]
+cmpl m32.ud[34] r32.ud[12] => rflags[0x081,0x081]
+cmpl m32.ud[12] r32.ud[34] => rflags[0x081,0x000]
+cmpl m32.ud[100] r32.sd[-2147483600] => rflags[0x800,0x800]
+cmpl m32.ud[50] r32.sd[-50] => rflags[0x800,0x000]
+cmpl m32.sd[-50] r32.sd[50] => rflags[0x800,0x000]
+###cmpl m32.sd[-100] r32.sd[2147483600] => rflags[0x800,0x800]
+cmpq imm8[3] r64.uq[2] => rflags[0x010,0x010]
+cmpq imm8[2] r64.uq[3] => rflags[0x010,0x000]
+cmpq imm8[12] r64.uq[12] => rflags[0x044,0x044]
+cmpq imm8[12] r64.uq[34] => rflags[0x044,0x000]
+cmpq imm8[34] r64.uq[12] => rflags[0x081,0x081]
+cmpq imm8[12] r64.uq[34] => rflags[0x081,0x000]
+cmpq imm8[100] r64.sq[-9223372036854775800] => rflags[0x800,0x800]
+cmpq imm8[50] r64.sq[-50] => rflags[0x800,0x000]
+cmpq imm8[-50] r64.sq[50] => rflags[0x800,0x000]
+cmpq imm8[-100] r64.sq[9223372036854775800] => rflags[0x800,0x800]
+cmpq imm8[3] m64.uq[2] => rflags[0x010,0x010]
+cmpq imm8[2] m64.uq[3] => rflags[0x010,0x000]
+cmpq imm8[12] m64.uq[12] => rflags[0x044,0x044]
+cmpq imm8[12] m64.uq[34] => rflags[0x044,0x000]
+cmpq imm8[34] m64.uq[12] => rflags[0x081,0x081]
+cmpq imm8[12] m64.uq[34] => rflags[0x081,0x000]
+cmpq imm8[100] m64.sq[-9223372036854775800] => rflags[0x800,0x800]
+cmpq imm8[50] m64.sq[-50] => rflags[0x800,0x000]
+cmpq imm8[-50] m64.sq[50] => rflags[0x800,0x000]
+cmpq imm8[-100] m64.sq[9223372036854775800] => rflags[0x800,0x800]
+cmpq imm32[3] rax.uq[2] => rflags[0x010,0x010]
+cmpq imm32[2] rax.uq[3] => rflags[0x010,0x000]
+cmpq imm32[12] rax.uq[12] => rflags[0x044,0x044]
+cmpq imm32[12] rax.uq[34] => rflags[0x044,0x000]
+cmpq imm32[34] rax.uq[12] => rflags[0x081,0x081]
+cmpq imm32[12] rax.uq[34] => rflags[0x081,0x000]
+cmpq imm32[100] rax.sq[-9223372036854775800] => rflags[0x800,0x800]
+cmpq imm32[50] rax.sq[-50] => rflags[0x800,0x000]
+cmpq imm32[-50] rax.sq[50] => rflags[0x800,0x000]
+cmpq imm32[-100] rax.sq[9223372036854775800] => rflags[0x800,0x800]
+cmpq imm32[3] r64.uq[2] => rflags[0x010,0x010]
+cmpq imm32[2] r64.uq[3] => rflags[0x010,0x000]
+cmpq imm32[12] r64.uq[12] => rflags[0x044,0x044]
+cmpq imm32[12] r64.uq[34] => rflags[0x044,0x000]
+cmpq imm32[34] r64.uq[12] => rflags[0x081,0x081]
+cmpq imm32[12] r64.uq[34] => rflags[0x081,0x000]
+cmpq imm32[100] r64.sq[-9223372036854775800] => rflags[0x800,0x800]
+cmpq imm32[50] r64.sq[-50] => rflags[0x800,0x000]
+cmpq imm32[-50] r64.sq[50] => rflags[0x800,0x000]
+cmpq imm32[-100] r64.sq[9223372036854775800] => rflags[0x800,0x800]
+cmpq imm32[3] m64.uq[2] => rflags[0x010,0x010]
+cmpq imm32[2] m64.uq[3] => rflags[0x010,0x000]
+cmpq imm32[12] m64.uq[12] => rflags[0x044,0x044]
+cmpq imm32[12] m64.uq[34] => rflags[0x044,0x000]
+cmpq imm32[34] m64.uq[12] => rflags[0x081,0x081]
+cmpq imm32[12] m64.uq[34] => rflags[0x081,0x000]
+cmpq imm32[100] m64.sq[-9223372036854775800] => rflags[0x800,0x800]
+cmpq imm32[50] m64.sq[-50] => rflags[0x800,0x000]
+cmpq imm32[-50] m64.sq[50] => rflags[0x800,0x000]
+cmpq imm32[-100] m64.sq[9223372036854775800] => rflags[0x800,0x800]
+cmpq r64.uq[3] r64.uq[2] => rflags[0x010,0x010]
+cmpq r64.uq[2] r64.uq[3] => rflags[0x010,0x000]
+cmpq r64.uq[12] r64.uq[12] => rflags[0x044,0x044]
+cmpq r64.uq[12] r64.uq[34] => rflags[0x044,0x000]
+cmpq r64.uq[34] r64.uq[12] => rflags[0x081,0x081]
+cmpq r64.uq[12] r64.uq[34] => rflags[0x081,0x000]
+cmpq r64.uq[100] r64.sq[-9223372036854775800] => rflags[0x800,0x800]
+cmpq r64.uq[50] r64.sq[-50] => rflags[0x800,0x000]
+cmpq r64.sq[-50] r64.sq[50] => rflags[0x800,0x000]
+cmpq r64.sq[-100] r64.sq[9223372036854775800] => rflags[0x800,0x800]
+cmpq r64.uq[3] m64.uq[2] => rflags[0x010,0x010]
+cmpq r64.uq[2] m64.uq[3] => rflags[0x010,0x000]
+cmpq r64.uq[12] m64.uq[12] => rflags[0x044,0x044]
+cmpq r64.uq[12] m64.uq[34] => rflags[0x044,0x000]
+cmpq r64.uq[34] m64.uq[12] => rflags[0x081,0x081]
+cmpq r64.uq[12] m64.uq[34] => rflags[0x081,0x000]
+cmpq r64.uq[100] m64.sq[-9223372036854775800] => rflags[0x800,0x800]
+cmpq r64.uq[50] m64.sq[-50] => rflags[0x800,0x000]
+cmpq r64.sq[-50] m64.sq[50] => rflags[0x800,0x000]
+cmpq r64.sq[-100] m64.sq[9223372036854775800] => rflags[0x800,0x800]
+cmpq m64.uq[3] r64.uq[2] => rflags[0x010,0x010]
+cmpq m64.uq[2] r64.uq[3] => rflags[0x010,0x000]
+cmpq m64.uq[12] r64.uq[12] => rflags[0x044,0x044]
+cmpq m64.uq[12] r64.uq[34] => rflags[0x044,0x000]
+cmpq m64.uq[34] r64.uq[12] => rflags[0x081,0x081]
+cmpq m64.uq[12] r64.uq[34] => rflags[0x081,0x000]
+cmpq m64.uq[100] r64.sq[-9223372036854775800] => rflags[0x800,0x800]
+cmpq m64.uq[50] r64.sq[-50] => rflags[0x800,0x000]
+cmpq m64.sq[-50] r64.sq[50] => rflags[0x800,0x000]
+cmpq m64.sq[-100] r64.sq[9223372036854775800] => rflags[0x800,0x800]
+###cmpxchgb rflags[0x40,0x00] al.ub[12] : r8.ub[56] r8.ub[12] => rflags[0x40,0x40] al.ub[12] 0.ub[56] 1.ub[56]
+###cmpxchgb rflags[0x40,0x40] al.ub[12] : r8.ub[56] r8.ub[34] => rflags[0x40,0x00] al.ub[34] 0.ub[56] 1.ub[34]
+###cmpxchgb rflags[0x40,0x00] al.ub[12] : r8.ub[56] m8.ub[12] => rflags[0x40,0x40] al.ub[12] 0.ub[56] 1.ub[56]
+###cmpxchgb rflags[0x40,0x40] al.ub[12] : r8.ub[56] m8.ub[34] => rflags[0x40,0x00] al.ub[34] 0.ub[56] 1.ub[34]
+###cmpxchgw rflags[0x40,0x00] ax.uw[123] : r16.uw[567] r16.uw[123] => rflags[0x40,0x40] ax.uw[123] 0.uw[567] 1.uw[567]
+###cmpxchgw rflags[0x40,0x40] ax.uw[123] : r16.uw[567] r16.uw[345] => rflags[0x40,0x00] ax.uw[345] 0.uw[567] 1.uw[345]
+cmpxchgw rflags[0x40,0x00] ax.uw[123] : r16.uw[567] m16.uw[123] => rflags[0x40,0x40] ax.uw[123] 0.uw[567] 1.uw[567]
+###cmpxchgw rflags[0x40,0x40] ax.uw[123] : r16.uw[567] m16.uw[345] => rflags[0x40,0x00] ax.uw[345] 0.uw[567] 1.uw[345]
+###cmpxchgl rflags[0x40,0x00] eax.ud[1234] : r32.ud[5678] r32.ud[1234] => rflags[0x40,0x40] eax.ud[1234] 0.ud[5678] 1.ud[5678]
+###cmpxchgl rflags[0x40,0x40] eax.ud[1234] : r32.ud[5678] r32.ud[3456] => rflags[0x40,0x00] eax.ud[3456] 0.ud[5678] 1.ud[3456]
+cmpxchgl rflags[0x40,0x00] eax.ud[1234] : r32.ud[5678] m32.ud[1234] => rflags[0x40,0x40] eax.ud[1234] 0.ud[5678] 1.ud[5678]
+cmpxchgl rflags[0x40,0x40] eax.ud[1234] : r32.ud[5678] m32.ud[3456] => rflags[0x40,0x00] eax.ud[3456] 0.ud[5678] 1.ud[3456]
+###cmpxchgq rflags[0x40,0x00] rax.uq[12345] : r64.uq[56789] r64.uq[12345] => rflags[0x40,0x40] rax.uq[12345] 0.uq[56789] 1.uq[56789]
+###cmpxchgq rflags[0x40,0x40] rax.uq[12345] : r64.uq[56789] r64.uq[34567] => rflags[0x40,0x00] rax.uq[34567] 0.uq[56789] 1.uq[34567]
+cmpxchgq rflags[0x40,0x00] rax.uq[12345] : r64.uq[56789] m64.uq[12345] => rflags[0x40,0x40] rax.uq[12345] 0.uq[56789] 1.uq[56789]
+cmpxchgq rflags[0x40,0x40] rax.uq[12345] : r64.uq[56789] m64.uq[34567] => rflags[0x40,0x00] rax.uq[34567] 0.uq[56789] 1.uq[34567]
cqo rax.uq[0x0123456789abcdef] : => rdx.uq[0x0000000000000000] rax.uq[0x0123456789abcdef]
cqo rax.uq[0xfedcba9876543210] : => rdx.uq[0xffffffffffffffff] rax.uq[0xfedcba9876543210]
cwd ax.uw[0x1234] : => dx.uw[0x0000] ax.uw[0x1234]
@@ -617,8 +617,8 @@ incl r32.ud[12345678] => 0.ud[12345679]
incl m32.ud[12345678] => 0.ud[12345679]
incq r64.uq[1234567813572468] => 0.uq[1234567813572469]
incq m64.uq[1234567813572468] => 0.uq[1234567813572469]
-###lahf eflags[0xff,0xfd] ah.ub[0x28] : => ah.ub[0xd7]
-###lahf eflags[0xff,0x28] ah.ub[0xfd] : => ah.ub[0x02]
+###lahf rflags[0xff,0xfd] ah.ub[0x28] : => ah.ub[0xd7]
+###lahf rflags[0xff,0x28] ah.ub[0xfd] : => ah.ub[0x02]
movb imm8[123] r8.ub[0] => 1.ub[123]
movb imm8[123] m8.ub[0] => 1.ub[123]
movb r8.ub[123] r8.ub[0] => 1.ub[123]
@@ -714,54 +714,54 @@ orq imm32[-2042464975] m64.uq[0x1234567812345678] => 1.uq[0xffffffff96767779]
orq r64.uq[0xeca86420fdb97531] r64.uq[0x0123456789abcdef] => 1.uq[0xedab6567fdbbfdff]
orq r64.uq[0xeca86420fdb97531] m64.uq[0x0123456789abcdef] => 1.uq[0xedab6567fdbbfdff]
orq m64.uq[0xeca86420fdb97531] r64.uq[0x0123456789abcdef] => 1.uq[0xedab6567fdbbfdff]
-###rclb eflags[0x1,0x0] : r8.ub[0xca] => 0.ub[0x94] eflags[0x1,0x1]
-###rclb eflags[0x1,0x0] : m8.ub[0xca] => 0.ub[0x94] eflags[0x1,0x1]
-###rclb eflags[0x1,0x0] : imm8[2] r8.ub[0xca] => 1.ub[0x29] eflags[0x1,0x1]
-###rclb eflags[0x1,0x0] : imm8[2] m8.ub[0xca] => 1.ub[0x29] eflags[0x1,0x1]
-###rclb eflags[0x1,0x0] : cl.ub[2] r8.ub[0xca] => 1.ub[0x29] eflags[0x1,0x1]
-###rclb eflags[0x1,0x0] : cl.ub[2] m8.ub[0xca] => 1.ub[0x29] eflags[0x1,0x1]
-###rclw eflags[0x1,0x0] : r16.uw[0xf0ca] => 0.uw[0xe194] eflags[0x1,0x1]
-###rclw eflags[0x1,0x0] : m16.uw[0xf0ca] => 0.uw[0xe194] eflags[0x1,0x1]
-###rclw eflags[0x1,0x0] : imm8[4] r16.uw[0xf0ca] => 1.uw[0x0ca7] eflags[0x1,0x1]
-###rclw eflags[0x1,0x0] : imm8[4] m16.uw[0xf0ca] => 1.uw[0x0ca7] eflags[0x1,0x1]
-###rclw eflags[0x1,0x0] : cl.ub[4] r16.uw[0xf0ca] => 1.uw[0x0ca7] eflags[0x1,0x1]
-###rclw eflags[0x1,0x0] : cl.ub[4] m16.uw[0xf0ca] => 1.uw[0x0ca7] eflags[0x1,0x1]
-###rcll eflags[0x1,0x0] : r32.ud[0xff00f0ca] => 0.ud[0xfe01e194] eflags[0x1,0x1]
-###rcll eflags[0x1,0x0] : m32.ud[0xff00f0ca] => 0.ud[0xfe01e194] eflags[0x1,0x1]
-###rcll eflags[0x1,0x0] : imm8[8] r32.ud[0xff00f0ca] => 1.ud[0x00f0ca7f] eflags[0x1,0x1]
-###rcll eflags[0x1,0x0] : imm8[8] m32.ud[0xff00f0ca] => 1.ud[0x00f0ca7f] eflags[0x1,0x1]
-###rcll eflags[0x1,0x0] : cl.ub[8] r32.ud[0xff00f0ca] => 1.ud[0x00f0ca7f] eflags[0x1,0x1]
-###rcll eflags[0x1,0x0] : cl.ub[8] m32.ud[0xff00f0ca] => 1.ud[0x00f0ca7f] eflags[0x1,0x1]
-###rclq eflags[0x1,0x0] : r64.uq[0xffff0000ff00f0ca] => 0.uq[0xfffe0001fe01e194] eflags[0x1,0x1]
-###rclq eflags[0x1,0x0] : m64.uq[0xffff0000ff00f0ca] => 0.uq[0xfffe0001fe01e194] eflags[0x1,0x1]
-###rclq eflags[0x1,0x0] : imm8[16] r64.uq[0xffff0000ff00f0ca] => 1.uq[0x0000ff00f0ca7fff] eflags[0x1,0x1]
-###rclq eflags[0x1,0x0] : imm8[16] m64.uq[0xffff0000ff00f0ca] => 1.uq[0x0000ff00f0ca7fff] eflags[0x1,0x1]
-###rclq eflags[0x1,0x0] : cl.ub[16] r64.uq[0xffff0000ff00f0ca] => 1.uq[0x0000ff00f0ca7fff] eflags[0x1,0x1]
-###rclq eflags[0x1,0x0] : cl.ub[16] m64.uq[0xffff0000ff00f0ca] => 1.uq[0x0000ff00f0ca7fff] eflags[0x1,0x1]
-rcrb eflags[0x1,0x1] : r8.ub[0xca] => 0.ub[0xe5] eflags[0x1,0x0]
-rcrb eflags[0x1,0x1] : m8.ub[0xca] => 0.ub[0xe5] eflags[0x1,0x0]
-rcrb eflags[0x1,0x0] : imm8[2] r8.ub[0xca] => 1.ub[0x32] eflags[0x1,0x1]
-rcrb eflags[0x1,0x0] : imm8[2] m8.ub[0xca] => 1.ub[0x32] eflags[0x1,0x1]
-rcrb eflags[0x1,0x0] : cl.ub[2] r8.ub[0xca] => 1.ub[0x32] eflags[0x1,0x1]
-rcrb eflags[0x1,0x0] : cl.ub[2] m8.ub[0xca] => 1.ub[0x32] eflags[0x1,0x1]
-rcrw eflags[0x1,0x1] : r16.uw[0xf0ca] => 0.uw[0xf865] eflags[0x1,0x0]
-rcrw eflags[0x1,0x1] : m16.uw[0xf0ca] => 0.uw[0xf865] eflags[0x1,0x0]
-rcrw eflags[0x1,0x0] : imm8[4] r16.uw[0xf0ca] => 1.uw[0x4f0c] eflags[0x1,0x1]
-rcrw eflags[0x1,0x0] : imm8[4] m16.uw[0xf0ca] => 1.uw[0x4f0c] eflags[0x1,0x1]
-rcrw eflags[0x1,0x0] : cl.ub[4] r16.uw[0xf0ca] => 1.uw[0x4f0c] eflags[0x1,0x1]
-rcrw eflags[0x1,0x0] : cl.ub[4] m16.uw[0xf0ca] => 1.uw[0x4f0c] eflags[0x1,0x1]
-rcrl eflags[0x1,0x1] : r32.ud[0xff00f0ca] => 0.ud[0xff807865] eflags[0x1,0x0]
-rcrl eflags[0x1,0x1] : m32.ud[0xff00f0ca] => 0.ud[0xff807865] eflags[0x1,0x0]
-rcrl eflags[0x1,0x0] : imm8[8] r32.ud[0xff00f0ca] => 1.ud[0x94ff00f0] eflags[0x1,0x1]
-rcrl eflags[0x1,0x0] : imm8[8] m32.ud[0xff00f0ca] => 1.ud[0x94ff00f0] eflags[0x1,0x1]
-rcrl eflags[0x1,0x0] : cl.ub[8] r32.ud[0xff00f0ca] => 1.ud[0x94ff00f0] eflags[0x1,0x1]
-rcrl eflags[0x1,0x0] : cl.ub[8] m32.ud[0xff00f0ca] => 1.ud[0x94ff00f0] eflags[0x1,0x1]
-rcrq eflags[0x1,0x1] : r64.uq[0xffff0000ff00f0ca] => 0.uq[0xffff80007f807865] eflags[0x1,0x0]
-rcrq eflags[0x1,0x1] : m64.uq[0xffff0000ff00f0ca] => 0.uq[0xffff80007f807865] eflags[0x1,0x0]
-rcrq eflags[0x1,0x0] : imm8[16] r64.uq[0xffff0000ff00f0ca] => 1.uq[0xe194ffff0000ff00] eflags[0x1,0x1]
-rcrq eflags[0x1,0x0] : imm8[16] m64.uq[0xffff0000ff00f0ca] => 1.uq[0xe194ffff0000ff00] eflags[0x1,0x1]
-rcrq eflags[0x1,0x0] : cl.ub[16] r64.uq[0xffff0000ff00f0ca] => 1.uq[0xe194ffff0000ff00] eflags[0x1,0x1]
-rcrq eflags[0x1,0x0] : cl.ub[16] m64.uq[0xffff0000ff00f0ca] => 1.uq[0xe194ffff0000ff00] eflags[0x1,0x1]
+###rclb rflags[0x1,0x0] : r8.ub[0xca] => 0.ub[0x94] rflags[0x1,0x1]
+###rclb rflags[0x1,0x0] : m8.ub[0xca] => 0.ub[0x94] rflags[0x1,0x1]
+###rclb rflags[0x1,0x0] : imm8[2] r8.ub[0xca] => 1.ub[0x29] rflags[0x1,0x1]
+###rclb rflags[0x1,0x0] : imm8[2] m8.ub[0xca] => 1.ub[0x29] rflags[0x1,0x1]
+###rclb rflags[0x1,0x0] : cl.ub[2] r8.ub[0xca] => 1.ub[0x29] rflags[0x1,0x1]
+###rclb rflags[0x1,0x0] : cl.ub[2] m8.ub[0xca] => 1.ub[0x29] rflags[0x1,0x1]
+###rclw rflags[0x1,0x0] : r16.uw[0xf0ca] => 0.uw[0xe194] rflags[0x1,0x1]
+###rclw rflags[0x1,0x0] : m16.uw[0xf0ca] => 0.uw[0xe194] rflags[0x1,0x1]
+###rclw rflags[0x1,0x0] : imm8[4] r16.uw[0xf0ca] => 1.uw[0x0ca7] rflags[0x1,0x1]
+###rclw rflags[0x1,0x0] : imm8[4] m16.uw[0xf0ca] => 1.uw[0x0ca7] rflags[0x1,0x1]
+###rclw rflags[0x1,0x0] : cl.ub[4] r16.uw[0xf0ca] => 1.uw[0x0ca7] rflags[0x1,0x1]
+###rclw rflags[0x1,0x0] : cl.ub[4] m16.uw[0xf0ca] => 1.uw[0x0ca7] rflags[0x1,0x1]
+###rcll rflags[0x1,0x0] : r32.ud[0xff00f0ca] => 0.ud[0xfe01e194] rflags[0x1,0x1]
+###rcll rflags[0x1,0x0] : m32.ud[0xff00f0ca] => 0.ud[0xfe01e194] rflags[0x1,0x1]
+###rcll rflags[0x1,0x0] : imm8[8] r32.ud[0xff00f0ca] => 1.ud[0x00f0ca7f] rflags[0x1,0x1]
+###rcll rflags[0x1,0x0] : imm8[8] m32.ud[0xff00f0ca] => 1.ud[0x00f0ca7f] rflags[0x1,0x1]
+###rcll rflags[0x1,0x0] : cl.ub[8] r32.ud[0xff00f0ca] => 1.ud[0x00f0ca7f] rflags[0x1,0x1]
+###rcll rflags[0x1,0x0] : cl.ub[8] m32.ud[0xff00f0ca] => 1.ud[0x00f0ca7f] rflags[0x1,0x1]
+###rclq rflags[0x1,0x0] : r64.uq[0xffff0000ff00f0ca] => 0.uq[0xfffe0001fe01e194] rflags[0x1,0x1]
+###rclq rflags[0x1,0x0] : m64.uq[0xffff0000ff00f0ca] => 0.uq[0xfffe0001fe01e194] rflags[0x1,0x1]
+###rclq rflags[0x1,0x0] : imm8[16] r64.uq[0xffff0000ff00f0ca] => 1.uq[0x0000ff00f0ca7fff] rflags[0x1,0x1]
+###rclq rflags[0x1,0x0] : imm8[16] m64.uq[0xffff0000ff00f0ca] => 1.uq[0x0000ff00f0ca7fff] rflags[0x1,0x1]
+###rclq rflags[0x1,0x0] : cl.ub[16] r64.uq[0xffff0000ff00f0ca] => 1.uq[0x0000ff00f0ca7fff] rflags[0x1,0x1]
+###rclq rflags[0x1,0x0] : cl.ub[16] m64.uq[0xffff0000ff00f0ca] => 1.uq[0x0000ff00f0ca7fff] rflags[0x1,0x1]
+rcrb rflags[0x1,0x1] : r8.ub[0xca] => 0.ub[0xe5] rflags[0x1,0x0]
+rcrb rflags[0x1,0x1] : m8.ub[0xca] => 0.ub[0xe5] rflags[0x1,0x0]
+rcrb rflags[0x1,0x0] : imm8[2] r8.ub[0xca] => 1.ub[0x32] rflags[0x1,0x1]
+rcrb rflags[0x1,0x0] : imm8[2] m8.ub[0xca] => 1.ub[0x32] rflags[0x1,0x1]
+rcrb rflags[0x1,0x0] : cl.ub[2] r8.ub[0xca] => 1.ub[0x32] rflags[0x1,0x1]
+rcrb rflags[0x1,0x0] : cl.ub[2] m8.ub[0xca] => 1.ub[0x32] rflags[0x1,0x1]
+rcrw rflags[0x1,0x1] : r16.uw[0xf0ca] => 0.uw[0xf865] rflags[0x1,0x0]
+rcrw rflags[0x1,0x1] : m16.uw[0xf0ca] => 0.uw[0xf865] rflags[0x1,0x0]
+rcrw rflags[0x1,0x0] : imm8[4] r16.uw[0xf0ca] => 1.uw[0x4f0c] rflags[0x1,0x1]
+rcrw rflags[0x1,0x0] : imm8[4] m16.uw[0xf0ca] => 1.uw[0x4f0c] rflags[0x1,0x1]
+rcrw rflags[0x1,0x0] : cl.ub[4] r16.uw[0xf0ca] => 1.uw[0x4f0c] rflags[0x1,0x1]
+rcrw rflags[0x1,0x0] : cl.ub[4] m16.uw[0xf0ca] => 1.uw[0x4f0c] rflags[0x1,0x1]
+rcrl rflags[0x1,0x1] : r32.ud[0xff00f0ca] => 0.ud[0xff807865] rflags[0x1,0x0]
+rcrl rflags[0x1,0x1] : m32.ud[0xff00f0ca] => 0.ud[0xff807865] rflags[0x1,0x0]
+rcrl rflags[0x1,0x0] : imm8[8] r32.ud[0xff00f0ca] => 1.ud[0x94ff00f0] rflags[0x1,0x1]
+rcrl rflags[0x1,0x0] : imm8[8] m32.ud[0xff00f0ca] => 1.ud[0x94ff00f0] rflags[0x1,0x1]
+rcrl rflags[0x1,0x0] : cl.ub[8] r32.ud[0xff00f0ca] => 1.ud[0x94ff00f0] rflags[0x1,0x1]
+rcrl rflags[0x1,0x0] : cl.ub[8] m32.ud[0xff00f0ca] => 1.ud[0x94ff00f0] rflags[0x1,0x1]
+rcrq rflags[0x1,0x1] : r64.uq[0xffff0000ff00f0ca] => 0.uq[0xffff80007f807865] rflags[0x1,0x0]
+rcrq rflags[0x1,0x1] : m64.uq[0xffff0000ff00f0ca] => 0.uq[0xffff80007f807865] rflags[0x1,0x0]
+rcrq rflags[0x1,0x0] : imm8[16] r64.uq[0xffff0000ff00f0ca] => 1.uq[0xe194ffff0000ff00] rflags[0x1,0x1]
+rcrq rflags[0x1,0x0] : imm8[16] m64.uq[0xffff0000ff00f0ca] => 1.uq[0xe194ffff0000ff00] rflags[0x1,0x1]
+rcrq rflags[0x1,0x0] : cl.ub[16] r64.uq[0xffff0000ff00f0ca] => 1.uq[0xe194ffff0000ff00] rflags[0x1,0x1]
+rcrq rflags[0x1,0x0] : cl.ub[16] m64.uq[0xffff0000ff00f0ca] => 1.uq[0xe194ffff0000ff00] rflags[0x1,0x1]
rolb r8.ub[0xca] => 0.ub[0x95]
rolb m8.ub[0xca] => 0.ub[0x95]
rolb imm8[2] r8.ub[0xca] => 1.ub[0x2b]
@@ -810,8 +810,8 @@ rorq imm8[16] r64.uq[0xffff0000ff00f0ca] => 1.uq[0xf0caffff0000ff00]
rorq imm8[16] m64.uq[0xffff0000ff00f0ca] => 1.uq[0xf0caffff0000ff00]
rorq cl.ub[16] r64.uq[0xffff0000ff00f0ca] => 1.uq[0xf0caffff0000ff00]
rorq cl.ub[16] m64.uq[0xffff0000ff00f0ca] => 1.uq[0xf0caffff0000ff00]
-###sahf eflags[0xff,0x28] ah.ub[0xfd] : => eflags[0xfd,0xd5]
-###sahf eflags[0xff,0xfd] ah.ub[0x28] : => eflags[0xfd,0x00]
+###sahf rflags[0xff,0x28] ah.ub[0xfd] : => rflags[0xfd,0xd5]
+###sahf rflags[0xff,0xfd] ah.ub[0x28] : => rflags[0xfd,0x00]
salb r8.ub[0xca] => 0.ub[0x94]
salb m8.ub[0xca] => 0.ub[0x94]
salb imm8[2] r8.ub[0xca] => 1.ub[0x28]
@@ -860,252 +860,252 @@ sarq imm8[16] r64.uq[0xffff0000ff00f0ca] => 1.uq[0xffffffff0000ff00]
sarq imm8[16] m64.uq[0xffff0000ff00f0ca] => 1.uq[0xffffffff0000ff00]
sarq cl.ub[16] r64.uq[0xffff0000ff00f0ca] => 1.uq[0xffffffff0000ff00]
sarq cl.ub[16] m64.uq[0xffff0000ff00f0ca] => 1.uq[0xffffffff0000ff00]
-###sbbb eflags[0x1,0x0] : imm8[12] al.ub[34] => 1.ub[22]
-###sbbb eflags[0x1,0x1] : imm8[12] al.ub[34] => 1.ub[21]
-sbbb eflags[0x1,0x0] : imm8[12] bl.ub[34] => 1.ub[22]
-sbbb eflags[0x1,0x1] : imm8[12] bl.ub[34] => 1.ub[21]
-sbbb eflags[0x1,0x0] : imm8[12] m8.ub[34] => 1.ub[22]
-sbbb eflags[0x1,0x1] : imm8[12] m8.ub[34] => 1.ub[21]
-sbbb eflags[0x1,0x0] : r8.ub[12] r8.ub[34] => 1.ub[22]
-sbbb eflags[0x1,0x1] : r8.ub[12] r8.ub[34] => 1.ub[21]
-###sbbb eflags[0x1,0x0] : r8.ub[12] m8.ub[34] => 1.ub[22]
-###sbbb eflags[0x1,0x1] : r8.ub[12] m8.ub[34] => 1.ub[21]
-###sbbb eflags[0x1,0x0] : m8.ub[12] r8.ub[34] => 1.ub[22]
-###sbbb eflags[0x1,0x1] : m8.ub[12] r8.ub[34] => 1.ub[21]
-sbbw eflags[0x1,0x0] : imm8[12] r16.uw[3456] => 1.uw[3444]
-sbbw eflags[0x1,0x1] : imm8[12] r16.uw[3456] => 1.uw[3443]
-###sbbw eflags[0x1,0x0] : imm16[1234] ax.uw[5678] => 1.uw[4444]
-###sbbw eflags[0x1,0x1] : imm16[1234] ax.uw[5678] => 1.uw[4443]
-sbbw eflags[0x1,0x0] : imm16[1234] bx.uw[5678] => 1.uw[4444]
-sbbw eflags[0x1,0x1] : imm16[1234] bx.uw[5678] => 1.uw[4443]
-sbbw eflags[0x1,0x0] : imm16[1234] m16.uw[5678] => 1.uw[4444]
-sbbw eflags[0x1,0x1] : imm16[1234] m16.uw[5678] => 1.uw[4443]
-sbbw eflags[0x1,0x0] : r16.uw[1234] r16.uw[5678] => 1.uw[4444]
-sbbw eflags[0x1,0x1] : r16.uw[1234] r16.uw[5678] => 1.uw[4443]
-###sbbw eflags[0x1,0x0] : r16.uw[1234] m16.uw[5678] => 1.uw[4444]
-###sbbw eflags[0x1,0x1] : r16.uw[1234] m16.uw[5678] => 1.uw[4443]
-sbbw eflags[0x1,0x0] : m16.uw[1234] r16.uw[5678] => 1.uw[4444]
-sbbw eflags[0x1,0x1] : m16.uw[1234] r16.uw[5678] => 1.uw[4443]
-sbbl eflags[0x1,0x0] : imm8[12] r32.ud[87654321] => 1.ud[87654309]
-sbbl eflags[0x1,0x1] : imm8[12] r32.ud[87654321] => 1.ud[87654308]
-###sbbl eflags[0x1,0x0] : imm32[12345678] eax.ud[87654321] => 1.ud[75308643]
-###sbbl eflags[0x1,0x1] : imm32[12345678] eax.ud[87654321] => 1.ud[75308642]
-sbbl eflags[0x1,0x0] : imm32[12345678] ebx.ud[87654321] => 1.ud[75308643]
-sbbl eflags[0x1,0x1] : imm32[12345678] ebx.ud[87654321] => 1.ud[75308642]
-sbbl eflags[0x1,0x0] : imm32[12345678] m32.ud[87654321] => 1.ud[75308643]
-sbbl eflags[0x1,0x1] : imm32[12345678] m32.ud[87654321] => 1.ud[75308642]
-sbbl eflags[0x1,0x0] : r32.ud[12345678] r32.ud[87654321] => 1.ud[75308643]
-sbbl eflags[0x1,0x1] : r32.ud[12345678] r32.ud[87654321] => 1.ud[75308642]
-###sbbl eflags[0x1,0x0] : r32.ud[12345678] m32.ud[87654321] => 1.ud[75308643]
-###sbbl eflags[0x1,0x1] : r32.ud[12345678] m32.ud[87654321] => 1.ud[75308642]
-sbbl eflags[0x1,0x0] : m32.ud[12345678] r32.ud[87654321] => 1.ud[75308643]
-sbbl eflags[0x1,0x1] : m32.ud[12345678] r32.ud[87654321] => 1.ud[75308642]
-sbbq eflags[0x1,0x0] : imm8[12] r64.uq[8765432175318642] => 1.uq[8765432175318630]
-sbbq eflags[0x1,0x1] : imm8[12] r64.uq[8765432175318642] => 1.uq[8765432175318629]
-###sbbq eflags[0x1,0x0] : imm32[12345678] rax.uq[8765432175318642] => 1.uq[8765432162972964]
-###sbbq eflags[0x1,0x1] : imm32[12345678] rax.uq[8765432175318642] => 1.uq[8765432162972963]
-sbbq eflags[0x1,0x0] : imm32[12345678] rbx.uq[8765432175318642] => 1.uq[8765432162972964]
-sbbq eflags[0x1,0x1] : imm32[12345678] rbx.uq[8765432175318642] => 1.uq[8765432162972963]
-sbbq eflags[0x1,0x0] : imm32[12345678] m64.uq[8765432175318642] => 1.uq[8765432162972964]
-sbbq eflags[0x1,0x1] : imm32[12345678] m64.uq[8765432175318642] => 1.uq[8765432162972963]
-sbbq eflags[0x1,0x0] : r64.uq[1234567813572468] r64.uq[8765432175318642] => 1.uq[7530864361746174]
-sbbq eflags[0x1,0x1] : r64.uq[1234567813572468] r64.uq[8765432175318642] => 1.uq[7530864361746173]
-###sbbq eflags[0x1,0x0] : r64.uq[1234567813572468] m64.uq[8765432175318642] => 1.uq[7530864361746174]
-###sbbq eflags[0x1,0x1] : r64.uq[1234567813572468] m64.uq[8765432175318642] => 1.uq[7530864361746173]
-sbbq eflags[0x1,0x0] : m64.uq[1234567813572468] r64.uq[8765432175318642] => 1.uq[7530864361746174]
-sbbq eflags[0x1,0x1] : m64.uq[1234567813572468] r64.uq[8765432175318642] => 1.uq[7530864361746173]
-seta eflags[0x041,0x000] : r8.ub[123] => 0.ub[1]
-seta eflags[0x041,0x001] : r8.ub[123] => 0.ub[0]
-seta eflags[0x041,0x040] : r8.ub[123] => 0.ub[0]
-seta eflags[0x041,0x041] : r8.ub[123] => 0.ub[0]
-seta eflags[0x041,0x000] : m8.ub[123] => 0.ub[1]
-seta eflags[0x041,0x001] : m8.ub[123] => 0.ub[0]
-seta eflags[0x041,0x040] : m8.ub[123] => 0.ub[0]
-seta eflags[0x041,0x041] : m8.ub[123] => 0.ub[0]
-setae eflags[0x001,0x000] : r8.ub[123] => 0.ub[1]
-setae eflags[0x001,0x001] : r8.ub[123] => 0.ub[0]
-setae eflags[0x001,0x000] : m8.ub[123] => 0.ub[1]
-setae eflags[0x001,0x001] : m8.ub[123] => 0.ub[0]
-setb eflags[0x001,0x000] : r8.ub[123] => 0.ub[0]
-setb eflags[0x001,0x001] : r8.ub[123] => 0.ub[1]
-setb eflags[0x001,0x000] : m8.ub[123] => 0.ub[0]
-setb eflags[0x001,0x001] : m8.ub[123] => 0.ub[1]
-setbe eflags[0x041,0x000] : r8.ub[123] => 0.ub[0]
-setbe eflags[0x041,0x001] : r8.ub[123] => 0.ub[1]
-setbe eflags[0x041,0x040] : r8.ub[123] => 0.ub[1]
-setbe eflags[0x041,0x041] : r8.ub[123] => 0.ub[1]
-setbe eflags[0x041,0x000] : m8.ub[123] => 0.ub[0]
-setbe eflags[0x041,0x001] : m8.ub[123] => 0.ub[1]
-setbe eflags[0x041,0x040] : m8.ub[123] => 0.ub[1]
-setbe eflags[0x041,0x041] : m8.ub[123] => 0.ub[1]
-setc eflags[0x001,0x000] : r8.ub[123] => 0.ub[0]
-setc eflags[0x001,0x001] : r8.ub[123] => 0.ub[1]
-setc eflags[0x001,0x000] : m8.ub[123] => 0.ub[0]
-setc eflags[0x001,0x001] : m8.ub[123] => 0.ub[1]
-sete eflags[0x040,0x000] : r8.ub[123] => 0.ub[0]
-sete eflags[0x040,0x040] : r8.ub[123] => 0.ub[1]
-sete eflags[0x040,0x000] : m8.ub[123] => 0.ub[0]
-sete eflags[0x040,0x040] : m8.ub[123] => 0.ub[1]
-setg eflags[0x8c0,0x000] : r8.ub[123] => 0.ub[1]
-setg eflags[0x8c0,0x040] : r8.ub[123] => 0.ub[0]
-setg eflags[0x8c0,0x080] : r8.ub[123] => 0.ub[0]
-setg eflags[0x8c0,0x0c0] : r8.ub[123] => 0.ub[0]
-setg eflags[0x8c0,0x800] : r8.ub[123] => 0.ub[0]
-setg eflags[0x8c0,0x840] : r8.ub[123] => 0.ub[0]
-setg eflags[0x8c0,0x880] : r8.ub[123] => 0.ub[1]
-setg eflags[0x8c0,0x8c0] : r8.ub[123] => 0.ub[0]
-setg eflags[0x8c0,0x000] : m8.ub[123] => 0.ub[1]
-setg eflags[0x8c0,0x040] : m8.ub[123] => 0.ub[0]
-setg eflags[0x8c0,0x080] : m8.ub[123] => 0.ub[0]
-setg eflags[0x8c0,0x0c0] : m8.ub[123] => 0.ub[0]
-setg eflags[0x8c0,0x800] : m8.ub[123] => 0.ub[0]
-setg eflags[0x8c0,0x840] : m8.ub[123] => 0.ub[0]
-setg eflags[0x8c0,0x880] : m8.ub[123] => 0.ub[1]
-setg eflags[0x8c0,0x8c0] : m8.ub[123] => 0.ub[0]
-setge eflags[0x8c0,0x000] : r8.ub[123] => 0.ub[1]
-setge eflags[0x8c0,0x080] : r8.ub[123] => 0.ub[0]
-setge eflags[0x8c0,0x800] : r8.ub[123] => 0.ub[0]
-setge eflags[0x8c0,0x880] : r8.ub[123] => 0.ub[1]
-setge eflags[0x8c0,0x000] : m8.ub[123] => 0.ub[1]
-setge eflags[0x8c0,0x080] : m8.ub[123] => 0.ub[0]
-setge eflags[0x8c0,0x800] : m8.ub[123] => 0.ub[0]
-setge eflags[0x8c0,0x880] : m8.ub[123] => 0.ub[1]
-setl eflags[0x8c0,0x000] : r8.ub[123] => 0.ub[0]
-setl eflags[0x8c0,0x080] : r8.ub[123] => 0.ub[1]
-setl eflags[0x8c0,0x800] : r8.ub[123] => 0.ub[1]
-setl eflags[0x8c0,0x880] : r8.ub[123] => 0.ub[0]
-setl eflags[0x8c0,0x000] : m8.ub[123] => 0.ub[0]
-setl eflags[0x8c0,0x080] : m8.ub[123] => 0.ub[1]
-setl eflags[0x8c0,0x800] : m8.ub[123] => 0.ub[1]
-setl eflags[0x8c0,0x880] : m8.ub[123] => 0.ub[0]
-setle eflags[0x8c0,0x000] : r8.ub[123] => 0.ub[0]
-setle eflags[0x8c0,0x040] : r8.ub[123] => 0.ub[1]
-setle eflags[0x8c0,0x080] : r8.ub[123] => 0.ub[1]
-setle eflags[0x8c0,0x0c0] : r8.ub[123] => 0.ub[1]
-setle eflags[0x8c0,0x800] : r8.ub[123] => 0.ub[1]
-setle eflags[0x8c0,0x840] : r8.ub[123] => 0.ub[1]
-setle eflags[0x8c0,0x880] : r8.ub[123] => 0.ub[0]
-setle eflags[0x8c0,0x8c0] : r8.ub[123] => 0.ub[1]
-setle eflags[0x8c0,0x000] : m8.ub[123] => 0.ub[0]
-setle eflags[0x8c0,0x040] : m8.ub[123] => 0.ub[1]
-setle eflags[0x8c0,0x080] : m8.ub[123] => 0.ub[1]
-setle eflags[0x8c0,0x0c0] : m8.ub[123] => 0.ub[1]
-setle eflags[0x8c0,0x800] : m8.ub[123] => 0.ub[1]
-setle eflags[0x8c0,0x840] : m8.ub[123] => 0.ub[1]
-setle eflags[0x8c0,0x880] : m8.ub[123] => 0.ub[0]
-setle eflags[0x8c0,0x8c0] : m8.ub[123] => 0.ub[1]
-setna eflags[0x041,0x000] : r8.ub[123] => 0.ub[0]
-setna eflags[0x041,0x001] : r8.ub[123] => 0.ub[1]
-setna eflags[0x041,0x040] : r8.ub[123] => 0.ub[1]
-setna eflags[0x041,0x041] : r8.ub[123] => 0.ub[1]
-setna eflags[0x041,0x000] : m8.ub[123] => 0.ub[0]
-setna eflags[0x041,0x001] : m8.ub[123] => 0.ub[1]
-setna eflags[0x041,0x040] : m8.ub[123] => 0.ub[1]
-setna eflags[0x041,0x041] : m8.ub[123] => 0.ub[1]
-setnae eflags[0x001,0x000] : r8.ub[123] => 0.ub[0]
-setnae eflags[0x001,0x001] : r8.ub[123] => 0.ub[1]
-setnae eflags[0x001,0x000] : m8.ub[123] => 0.ub[0]
-setnae eflags[0x001,0x001] : m8.ub[123] => 0.ub[1]
-setnb eflags[0x001,0x000] : r8.ub[123] => 0.ub[1]
-setnb eflags[0x001,0x001] : r8.ub[123] => 0.ub[0]
-setnb eflags[0x001,0x000] : m8.ub[123] => 0.ub[1]
-setnb eflags[0x001,0x001] : m8.ub[123] => 0.ub[0]
-setnbe eflags[0x041,0x000] : r8.ub[123] => 0.ub[1]
-setnbe eflags[0x041,0x001] : r8.ub[123] => 0.ub[0]
-setnbe eflags[0x041,0x040] : r8.ub[123] => 0.ub[0]
-setnbe eflags[0x041,0x041] : r8.ub[123] => 0.ub[0]
-setnbe eflags[0x041,0x000] : m8.ub[123] => 0.ub[1]
-setnbe eflags[0x041,0x001] : m8.ub[123] => 0.ub[0]
-setnbe eflags[0x041,0x040] : m8.ub[123] => 0.ub[0]
-setnbe eflags[0x041,0x041] : m8.ub[123] => 0.ub[0]
-setnc eflags[0x001,0x000] : r8.ub[123] => 0.ub[1]
-setnc eflags[0x001,0x001] : r8.ub[123] => 0.ub[0]
-setnc eflags[0x001,0x000] : m8.ub[123] => 0.ub[1]
-setnc eflags[0x001,0x001] : m8.ub[123] => 0.ub[0]
-setne eflags[0x040,0x000] : r8.ub[123] => 0.ub[1]
-setne eflags[0x040,0x040] : r8.ub[123] => 0.ub[0]
-setne eflags[0x040,0x000] : m8.ub[123] => 0.ub[1]
-setne eflags[0x040,0x040] : m8.ub[123] => 0.ub[0]
-setng eflags[0x8c0,0x000] : r8.ub[123] => 0.ub[0]
-setng eflags[0x8c0,0x040] : r8.ub[123] => 0.ub[1]
-setng eflags[0x8c0,0x080] : r8.ub[123] => 0.ub[1]
-setng eflags[0x8c0,0x0c0] : r8.ub[123] => 0.ub[1]
-setng eflags[0x8c0,0x800] : r8.ub[123] => 0.ub[1]
-setng eflags[0x8c0,0x840] : r8.ub[123] => 0.ub[1]
-setng eflags[0x8c0,0x880] : r8.ub[123] => 0.ub[0]
-setng eflags[0x8c0,0x8c0] : r8.ub[123] => 0.ub[1]
-setng eflags[0x8c0,0x000] : m8.ub[123] => 0.ub[0]
-setng eflags[0x8c0,0x040] : m8.ub[123] => 0.ub[1]
-setng eflags[0x8c0,0x080] : m8.ub[123] => 0.ub[1]
-setng eflags[0x8c0,0x0c0] : m8.ub[123] => 0.ub[1]
-setng eflags[0x8c0,0x800] : m8.ub[123] => 0.ub[1]
-setng eflags[0x8c0,0x840] : m8.ub[123] => 0.ub[1]
-setng eflags[0x8c0,0x880] : m8.ub[123] => 0.ub[0]
-setng eflags[0x8c0,0x8c0] : m8.ub[123] => 0.ub[1]
-setnge eflags[0x8c0,0x000] : r8.ub[123] => 0.ub[0]
-setnge eflags[0x8c0,0x080] : r8.ub[123] => 0.ub[1]
-setnge eflags[0x8c0,0x800] : r8.ub[123] => 0.ub[1]
-setnge eflags[0x8c0,0x880] : r8.ub[123] => 0.ub[0]
-setnge eflags[0x8c0,0x000] : m8.ub[123] => 0.ub[0]
-setnge eflags[0x8c0,0x080] : m8.ub[123] => 0.ub[1]
-setnge eflags[0x8c0,0x800] : m8.ub[123] => 0.ub[1]
-setnge eflags[0x8c0,0x880] : m8.ub[123] => 0.ub[0]
-setnl eflags[0x8c0,0x000] : r8.ub[123] => 0.ub[1]
-setnl eflags[0x8c0,0x080] : r8.ub[123] => 0.ub[0]
-setnl eflags[0x8c0,0x800] : r8.ub[123] => 0.ub[0]
-setnl eflags[0x8c0,0x880] : r8.ub[123] => 0.ub[1]
-setnl eflags[0x8c0,0x000] : m8.ub[123] => 0.ub[1]
-setnl eflags[0x8c0,0x080] : m8.ub[123] => 0.ub[0]
-setnl eflags[0x8c0,0x800] : m8.ub[123] => 0.ub[0]
-setnl eflags[0x8c0,0x880] : m8.ub[123] => 0.ub[1]
-setnle eflags[0x8c0,0x000] : r8.ub[123] => 0.ub[1]
-setnle eflags[0x8c0,0x040] : r8.ub[123] => 0.ub[0]
-setnle eflags[0x8c0,0x080] : r8.ub[123] => 0.ub[0]
-setnle eflags[0x8c0,0x0c0] : r8.ub[123] => 0.ub[0]
-setnle eflags[0x8c0,0x800] : r8.ub[123] => 0.ub[0]
-setnle eflags[0x8c0,0x840] : r8.ub[123] => 0.ub[0]
-setnle eflags[0x8c0,0x880] : r8.ub[123] => 0.ub[1]
-setnle eflags[0x8c0,0x8c0] : r8.ub[123] => 0.ub[0]
-setnle eflags[0x8c0,0x000] : m8.ub[123] => 0.ub[1]
-setnle eflags[0x8c0,0x040] : m8.ub[123] => 0.ub[0]
-setnle eflags[0x8c0,0x080] : m8.ub[123] => 0.ub[0]
-setnle eflags[0x8c0,0x0c0] : m8.ub[123] => 0.ub[0]
-setnle eflags[0x8c0,0x800] : m8.ub[123] => 0.ub[0]
-setnle eflags[0x8c0,0x840] : m8.ub[123] => 0.ub[0]
-setnle eflags[0x8c0,0x880] : m8.ub[123] => 0.ub[1]
-setnle eflags[0x8c0,0x8c0] : m8.ub[123] => 0.ub[0]
-setno eflags[0x800,0x000] : r8.ub[123] => 0.ub[1]
-setno eflags[0x800,0x800] : r8.ub[123] => 0.ub[0]
-setno eflags[0x800,0x000] : m8.ub[123] => 0.ub[1]
-setno eflags[0x800,0x800] : m8.ub[123] => 0.ub[0]
-setnp eflags[0x004,0x000] : r8.ub[123] => 0.ub[1]
-setnp eflags[0x004,0x004] : r8.ub[123] => 0.ub[0]
-setnp eflags[0x004,0x000] : m8.ub[123] => 0.ub[1]
-setnp eflags[0x004,0x004] : m8.ub[123] => 0.ub[0]
-setns eflags[0x080,0x000] : r8.ub[123] => 0.ub[1]
-setns eflags[0x080,0x080] : r8.ub[123] => 0.ub[0]
-setns eflags[0x080,0x000] : m8.ub[123] => 0.ub[1]
-setns eflags[0x080,0x080] : m8.ub[123] => 0.ub[0]
-setnz eflags[0x040,0x000] : r8.ub[123] => 0.ub[1]
-setnz eflags[0x040,0x040] : r8.ub[123] => 0.ub[0]
-setnz eflags[0x040,0x000] : m8.ub[123] => 0.ub[1]
-setnz eflags[0x040,0x040] : m8.ub[123] => 0.ub[0]
-seto eflags[0x800,0x000] : r8.ub[123] => 0.ub[0]
-seto eflags[0x800,0x800] : r8.ub[123] => 0.ub[1]
-seto eflags[0x800,0x000] : m8.ub[123] => 0.ub[0]
-seto eflags[0x800,0x800] : m8.ub[123] => 0.ub[1]
-setp eflags[0x004,0x000] : r8.ub[123] => 0.ub[0]
-setp eflags[0x004,0x004] : r8.ub[123] => 0.ub[1]
-setp eflags[0x004,0x000] : m8.ub[123] => 0.ub[0]
-setp eflags[0x004,0x004] : m8.ub[123] => 0.ub[1]
-sets eflags[0x080,0x000] : r8.ub[123] => 0.ub[0]
-sets eflags[0x080,0x080] : r8.ub[123] => 0.ub[1]
-sets eflags[0x080,0x000] : m8.ub[123] => 0.ub[0]
-sets eflags[0x080,0x080] : m8.ub[123] => 0.ub[1]
-setz eflags[0x040,0x000] : r8.ub[123] => 0.ub[0]
-setz eflags[0x040,0x040] : r8.ub[123] => 0.ub[1]
-setz eflags[0x040,0x000] : m8.ub[123] => 0.ub[0]
-setz eflags[0x040,0x040] : m8.ub[123] => 0.ub[1]
+###sbbb rflags[0x1,0x0] : imm8[12] al.ub[34] => 1.ub[22]
+###sbbb rflags[0x1,0x1] : imm8[12] al.ub[34] => 1.ub[21]
+sbbb rflags[0x1,0x0] : imm8[12] bl.ub[34] => 1.ub[22]
+sbbb rflags[0x1,0x1] : imm8[12] bl.ub[34] => 1.ub[21]
+sbbb rflags[0x1,0x0] : imm8[12] m8.ub[34] => 1.ub[22]
+sbbb rflags[0x1,0x1] : imm8[12] m8.ub[34] => 1.ub[21]
+sbbb rflags[0x1,0x0] : r8.ub[12] r8.ub[34] => 1.ub[22]
+sbbb rflags[0x1,0x1] : r8.ub[12] r8.ub[34] => 1.ub[21]
+###sbbb rflags[0x1,0x0] : r8.ub[12] m8.ub[34] => 1.ub[22]
+###sbbb rflags[0x1,0x1] : r8.ub[12] m8.ub[34] => 1.ub[21]
+###sbbb rflags[0x1,0x0] : m8.ub[12] r8.ub[34] => 1.ub[22]
+###sbbb rflags[0x1,0x1] : m8.ub[12] r8.ub[34] => 1.ub[21]
+sbbw rflags[0x1,0x0] : imm8[12] r16.uw[3456] => 1.uw[3444]
+sbbw rflags[0x1,0x1] : imm8[12] r16.uw[3456] => 1.uw[3443]
+###sbbw rflags[0x1,0x0] : imm16[1234] ax.uw[5678] => 1.uw[4444]
+###sbbw rflags[0x1,0x1] : imm16[1234] ax.uw[5678] => 1.uw[4443]
+sbbw rflags[0x1,0x0] : imm16[1234] bx.uw[5678] => 1.uw[4444]
+sbbw rflags[0x1,0x1] : imm16[1234] bx.uw[5678] => 1.uw[4443]
+sbbw rflags[0x1,0x0] : imm16[1234] m16.uw[5678] => 1.uw[4444]
+sbbw rflags[0x1,0x1] : imm16[1234] m16.uw[5678] => 1.uw[4443]
+sbbw rflags[0x1,0x0] : r16.uw[1234] r16.uw[5678] => 1.uw[4444]
+sbbw rflags[0x1,0x1] : r16.uw[1234] r16.uw[5678] => 1.uw[4443]
+###sbbw rflags[0x1,0x0] : r16.uw[1234] m16.uw[5678] => 1.uw[4444]
+###sbbw rflags[0x1,0x1] : r16.uw[1234] m16.uw[5678] => 1.uw[4443]
+sbbw rflags[0x1,0x0] : m16.uw[1234] r16.uw[5678] => 1.uw[4444]
+sbbw rflags[0x1,0x1] : m16.uw[1234] r16.uw[5678] => 1.uw[4443]
+sbbl rflags[0x1,0x0] : imm8[12] r32.ud[87654321] => 1.ud[87654309]
+sbbl rflags[0x1,0x1] : imm8[12] r32.ud[87654321] => 1.ud[87654308]
+###sbbl rflags[0x1,0x0] : imm32[12345678] eax.ud[87654321] => 1.ud[75308643]
+###sbbl rflags[0x1,0x1] : imm32[12345678] eax.ud[87654321] => 1.ud[75308642]
+sbbl rflags[0x1,0x0] : imm32[12345678] ebx.ud[87654321] => 1.ud[75308643]
+sbbl rflags[0x1,0x1] : imm32[12345678] ebx.ud[87654321] => 1.ud[75308642]
+sbbl rflags[0x1,0x0] : imm32[12345678] m32.ud[87654321] => 1.ud[75308643]
+sbbl rflags[0x1,0x1] : imm32[12345678] m32.ud[87654321] => 1.ud[75308642]
+sbbl rflags[0x1,0x0] : r32.ud[12345678] r32.ud[87654321] => 1.ud[75308643]
+sbbl rflags[0x1,0x1] : r32.ud[12345678] r32.ud[87654321] => 1.ud[75308642]
+###sbbl rflags[0x1,0x0] : r32.ud[12345678] m32.ud[87654321] => 1.ud[75308643]
+###sbbl rflags[0x1,0x1] : r32.ud[12345678] m32.ud[87654321] => 1.ud[75308642]
+sbbl rflags[0x1,0x0] : m32.ud[12345678] r32.ud[87654321] => 1.ud[75308643]
+sbbl rflags[0x1,0x1] : m32.ud[12345678] r32.ud[87654321] => 1.ud[75308642]
+sbbq rflags[0x1,0x0] : imm8[12] r64.uq[8765432175318642] => 1.uq[8765432175318630]
+sbbq rflags[0x1,0x1] : imm8[12] r64.uq[8765432175318642] => 1.uq[8765432175318629]
+###sbbq rflags[0x1,0x0] : imm32[12345678] rax.uq[8765432175318642] => 1.uq[8765432162972964]
+###sbbq rflags[0x1,0x1] : imm32[12345678] rax.uq[8765432175318642] => 1.uq[8765432162972963]
+sbbq rflags[0x1,0x0] : imm32[12345678] rbx.uq[8765432175318642] => 1.uq[8765432162972964]
+sbbq rflags[0x1,0x1] : imm32[12345678] rbx.uq[8765432175318642] => 1.uq[8765432162972963]
+sbbq rflags[0x1,0x0] : imm32[12345678] m64.uq[8765432175318642] => 1.uq[8765432162972964]
+sbbq rflags[0x1,0x1] : imm32[12345678] m64.uq[8765432175318642] => 1.uq[8765432162972963]
+sbbq rflags[0x1,0x0] : r64.uq[1234567813572468] r64.uq[8765432175318642] => 1.uq[7530864361746174]
+sbbq rflags[0x1,0x1] : r64.uq[1234567813572468] r64.uq[8765432175318642] => 1.uq[7530864361746173]
+###sbbq rflags[0x1,0x0] : r64.uq[1234567813572468] m64.uq[8765432175318642] => 1.uq[7530864361746174]
+###sbbq rflags[0x1,0x1] : r64.uq[1234567813572468] m64.uq[8765432175318642] => 1.uq[7530864361746173]
+sbbq rflags[0x1,0x0] : m64.uq[1234567813572468] r64.uq[8765432175318642] => 1.uq[7530864361746174]
+sbbq rflags[0x1,0x1] : m64.uq[1234567813572468] r64.uq[8765432175318642] => 1.uq[7530864361746173]
+seta rflags[0x041,0x000] : r8.ub[123] => 0.ub[1]
+seta rflags[0x041,0x001] : r8.ub[123] => 0.ub[0]
+seta rflags[0x041,0x040] : r8.ub[123] => 0.ub[0]
+seta rflags[0x041,0x041] : r8.ub[123] => 0.ub[0]
+seta rflags[0x041,0x000] : m8.ub[123] => 0.ub[1]
+seta rflags[0x041,0x001] : m8.ub[123] => 0.ub[0]
+seta rflags[0x041,0x040] : m8.ub[123] => 0.ub[0]
+seta rflags[0x041,0x041] : m8.ub[123] => 0.ub[0]
+setae rflags[0x001,0x000] : r8.ub[123] => 0.ub[1]
+setae rflags[0x001,0x001] : r8.ub[123] => 0.ub[0]
+setae rflags[0x001,0x000] : m8.ub[123] => 0.ub[1]
+setae rflags[0x001,0x001] : m8.ub[123] => 0.ub[0]
+setb rflags[0x001,0x000] : r8.ub[123] => 0.ub[0]
+setb rflags[0x001,0x001] : r8.ub[123] => 0.ub[1]
+setb rflags[0x001,0x000] : m8.ub[123] => 0.ub[0]
+setb rflags[0x001,0x001] : m8.ub[123] => 0.ub[1]
+setbe rflags[0x041,0x000] : r8.ub[123] => 0.ub[0]
+setbe rflags[0x041,0x001] : r8.ub[123] => 0.ub[1]
+setbe rflags[0x041,0x040] : r8.ub[123] => 0.ub[1]
+setbe rflags[0x041,0x041] : r8.ub[123] => 0.ub[1]
+setbe rflags[0x041,0x000] : m8.ub[123] => 0.ub[0]
+setbe rflags[0x041,0x001] : m8.ub[123] => 0.ub[1]
+setbe rflags[0x041,0x040] : m8.ub[123] => 0.ub[1]
+setbe rflags[0x041,0x041] : m8.ub[123] => 0.ub[1]
+setc rflags[0x001,0x000] : r8.ub[123] => 0.ub[0]
+setc rflags[0x001,0x001] : r8.ub[123] => 0.ub[1]
+setc rflags[0x001,0x000] : m8.ub[123] => 0.ub[0]
+setc rflags[0x001,0x001] : m8.ub[123] => 0.ub[1]
+sete rflags[0x040,0x000] : r8.ub[123] => 0.ub[0]
+sete rflags[0x040,0x040] : r8.ub[123] => 0.ub[1]
+sete rflags[0x040,0x000] : m8.ub[123] => 0.ub[0]
+sete rflags[0x040,0x040] : m8.ub[123] => 0.ub[1]
+setg rflags[0x8c0,0x000] : r8.ub[123] => 0.ub[1]
+setg rflags[0x8c0,0x040] : r8.ub[123] => 0.ub[0]
+setg rflags[0x8c0,0x080] : r8.ub[123] => 0.ub[0]
+setg rflags[0x8c0,0x0c0] : r8.ub[123] => 0.ub[0]
+setg rflags[0x8c0,0x800] : r8.ub[123] => 0.ub[0]
+setg rflags[0x8c0,0x840] : r8.ub[123] => 0.ub[0]
+setg rflags[0x8c0,0x880] : r8.ub[123] => 0.ub[1]
+setg rflags[0x8c0,0x8c0] : r8.ub[123] => 0.ub[0]
+setg rflags[0x8c0,0x000] : m8.ub[123] => 0.ub[1]
+setg rflags[0x8c0,0x040] : m8.ub[123] => 0.ub[0]
+setg rflags[0x8c0,0x080] : m8.ub[123] => 0.ub[0]
+setg rflags[0x8c0,0x0c0] : m8.ub[123] => 0.ub[0]
+setg rflags[0x8c0,0x800] : m8.ub[123] => 0.ub[0]
+setg rflags[0x8c0,0x840] : m8.ub[123] => 0.ub[0]
+setg rflags[0x8c0,0x880] : m8.ub[123] => 0.ub[1]
+setg rflags[0x8c0,0x8c0] : m8.ub[123] => 0.ub[0]
+setge rflags[0x8c0,0x000] : r8.ub[123] => 0.ub[1]
+setge rflags[0x8c0,0x080] : r8.ub[123] => 0.ub[0]
+setge rflags[0x8c0,0x800] : r8.ub[123] => 0.ub[0]
+setge rflags[0x8c0,0x880] : r8.ub[123] => 0.ub[1]
+setge rflags[0x8c0,0x000] : m8.ub[123] => 0.ub[1]
+setge rflags[0x8c0,0x080] : m8.ub[123] => 0.ub[0]
+setge rflags[0x8c0,0x800] : m8.ub[123] => 0.ub[0]
+setge rflags[0x8c0,0x880] : m8.ub[123] => 0.ub[1]
+setl rflags[0x8c0,0x000] : r8.ub[123] => 0.ub[0]
+setl rflags[0x8c0,0x080] : r8.ub[123] => 0.ub[1]
+setl rflags[0x8c0,0x800] : r8.ub[123] => 0.ub[1]
+setl rflags[0x8c0,0x880] : r8.ub[123] => 0.ub[0]
+setl rflags[0x8c0,0x000] : m8.ub[123] => 0.ub[0]
+setl rflags[0x8c0,0x080] : m8.ub[123] => 0.ub[1]
+setl rflags[0x8c0,0x800] : m8.ub[123] => 0.ub[1]
+setl rflags[0x8c0,0x880] : m8.ub[123] => 0.ub[0]
+setle rflags[0x8c0,0x000] : r8.ub[123] => 0.ub[0]
+setle rflags[0x8c0,0x040] : r8.ub[123] => 0.ub[1]
+setle rflags[0x8c0,0x080] : r8.ub[123] => 0.ub[1]
+setle rflags[0x8c0,0x0c0] : r8.ub[123] => 0.ub[1]
+setle rflags[0x8c0,0x800] : r8.ub[123] => 0.ub[1]
+setle rflags[0x8c0,0x840] : r8.ub[123] => 0.ub[1]
+setle rflags[0x8c0,0x880] : r8.ub[123] => 0.ub[0]
+setle rflags[0x8c0,0x8c0] : r8.ub[123] => 0.ub[1]
+setle rflags[0x8c0,0x000] : m8.ub[123] => 0.ub[0]
+setle rflags[0x8c0,0x040] : m8.ub[123] => 0.ub[1]
+setle rflags[0x8c0,0x080] : m8.ub[123] => 0.ub[1]
+setle rflags[0x8c0,0x0c0] : m8.ub[123] => 0.ub[1]
+setle rflags[0x8c0,0x800] : m8.ub[123] => 0.ub[1]
+setle rflags[0x8c0,0x840] : m8.ub[123] => 0.ub[1]
+setle rflags[0x8c0,0x880] : m8.ub[123] => 0.ub[0]
+setle rflags[0x8c0,0x8c0] : m8.ub[123] => 0.ub[1]
+setna rflags[0x041,0x000] : r8.ub[123] => 0.ub[0]
+setna rflags[0x041,0x001] : r8.ub[123] => 0.ub[1]
+setna rflags[0x041,0x040] : r8.ub[123] => 0.ub[1]
+setna rflags[0x041,0x041] : r8.ub[123] => 0.ub[1]
+setna rflags[0x041,0x000] : m8.ub[123] => 0.ub[0]
+setna rflags[0x041,0x001] : m8.ub[123] => 0.ub[1]
+setna rflags[0x041,0x040] : m8.ub[123] => 0.ub[1]
+setna rflags[0x041,0x041] : m8.ub[123] => 0.ub[1]
+setnae rflags[0x001,0x000] : r8.ub[123] => 0.ub[0]
+setnae rflags[0x001,0x001] : r8.ub[123] => 0.ub[1]
+setnae rflags[0x001,0x000] : m8.ub[123] => 0.ub[0]
+setnae rflags[0x001,0x001] : m8.ub[123] => 0.ub[1]
+setnb rflags[0x001,0x000] : r8.ub[123] => 0.ub[1]
+setnb rflags[0x001,0x001] : r8.ub[123] => 0.ub[0]
+setnb rflags[0x001,0x000] : m8.ub[123] => 0.ub[1]
+setnb rflags[0x001,0x001] : m8.ub[123] => 0.ub[0]
+setnbe rflags[0x041,0x000] : r8.ub[123] => 0.ub[1]
+setnbe rflags[0x041,0x001] : r8.ub[123] => 0.ub[0]
+setnbe rflags[0x041,0x040] : r8.ub[123] => 0.ub[0]
+setnbe rflags[0x041,0x041] : r8.ub[123] => 0.ub[0]
+setnbe rflags[0x041,0x000] : m8.ub[123] => 0.ub[1]
+setnbe rflags[0x041,0x001] : m8.ub[123] => 0.ub[0]
+setnbe rflags[0x041,0x040] : m8.ub[123] => 0.ub[0]
+setnbe rflags[0x041,0x041] : m8.ub[123] => 0.ub[0]
+setnc rflags[0x001,0x000] : r8.ub[123] => 0.ub[1]
+setnc rflags[0x001,0x001] : r8.ub[123] => 0.ub[0]
+setnc rflags[0x001,0x000] : m8.ub[123] => 0.ub[1]
+setnc rflags[0x001,0x001] : m8.ub[123] => 0.ub[0]
+setne rflags[0x040,0x000] : r8.ub[123] => 0.ub[1]
+setne rflags[0x040,0x040] : r8.ub[123] => 0.ub[0]
+setne rflags[0x040,0x000] : m8.ub[123] => 0.ub[1]
+setne rflags[0x040,0x040] : m8.ub[123] => 0.ub[0]
+setng rflags[0x8c0,0x000] : r8.ub[123] => 0.ub[0]
+setng rflags[0x8c0,0x040] : r8.ub[123] => 0.ub[1]
+setng rflags[0x8c0,0x080] : r8.ub[123] => 0.ub[1]
+setng rflags[0x8c0,0x0c0] : r8.ub[123] => 0.ub[1]
+setng rflags[0x8c0,0x800] : r8.ub[123] => 0.ub[1]
+setng rflags[0x8c0,0x840] : r8.ub[123] => 0.ub[1]
+setng rflags[0x8c0,0x880] : r8.ub[123] => 0.ub[0]
+setng rflags[0x8c0,0x8c0] : r8.ub[123] => 0.ub[1]
+setng rflags[0x8c0,0x000] : m8.ub[123] => 0.ub[0]
+setng rflags[0x8c0,0x040] : m8.ub[123] => 0.ub[1]
+setng rflags[0x8c0,0x080] : m8.ub[123] => 0.ub[1]
+setng rflags[0x8c0,0x0c0] : m8.ub[123] => 0.ub[1]
+setng rflags[0x8c0,0x800] : m8.ub[123] => 0.ub[1]
+setng rflags[0x8c0,0x840] : m8.ub[123] => 0.ub[1]
+setng rflags[0x8c0,0x880] : m8.ub[123] => 0.ub[0]
+setng rflags[0x8c0,0x8c0] : m8.ub[123] => 0.ub[1]
+setnge rflags[0x8c0,0x000] : r8.ub[123] => 0.ub[0]
+setnge rflags[0x8c0,0x080] : r8.ub[123] => 0.ub[1]
+setnge rflags[0x8c0,0x800] : r8.ub[123] => 0.ub[1]
+setnge rflags[0x8c0,0x880] : r8.ub[123] => 0.ub[0]
+setnge rflags[0x8c0,0x000] : m8.ub[123] => 0.ub[0]
+setnge rflags[0x8c0,0x080] : m8.ub[123] => 0.ub[1]
+setnge rflags[0x8c0,0x800] : m8.ub[123] => 0.ub[1]
+setnge rflags[0x8c0,0x880] : m8.ub[123] => 0.ub[0]
+setnl rflags[0x8c0,0x000] : r8.ub[123] => 0.ub[1]
+setnl rflags[0x8c0,0x080] : r8.ub[123] => 0.ub[0]
+setnl rflags[0x8c0,0x800] : r8.ub[123] => 0.ub[0]
+setnl rflags[0x8c0,0x880] : r8.ub[123] => 0.ub[1]
+setnl rflags[0x8c0,0x000] : m8.ub[123] => 0.ub[1]
+setnl rflags[0x8c0,0x080] : m8.ub[123] => 0.ub[0]
+setnl rflags[0x8c0,0x800] : m8.ub[123] => 0.ub[0]
+setnl rflags[0x8c0,0x880] : m8.ub[123] => 0.ub[1]
+setnle rflags[0x8c0,0x000] : r8.ub[123] => 0.ub[1]
+setnle rflags[0x8c0,0x040] : r8.ub[123] => 0.ub[0]
+setnle rflags[0x8c0,0x080] : r8.ub[123] => 0.ub[0]
+setnle rflags[0x8c0,0x0c0] : r8.ub[123] => 0.ub[0]
+setnle rflags[0x8c0,0x800] : r8.ub[123] => 0.ub[0]
+setnle rflags[0x8c0,0x840] : r8.ub[123] => 0.ub[0]
+setnle rflags[0x8c0,0x880] : r8.ub[123] => 0.ub[1]
+setnle rflags[0x8c0,0x8c0] : r8.ub[123] => 0.ub[0]
+setnle rflags[0x8c0,0x000] : m8.ub[123] => 0.ub[1]
+setnle rflags[0x8c0,0x040] : m8.ub[123] => 0.ub[0]
+setnle rflags[0x8c0,0x080] : m8.ub[123] => 0.ub[0]
+setnle rflags[0x8c0,0x0c0] : m8.ub[123] => 0.ub[0]
+setnle rflags[0x8c0,0x800] : m8.ub[123] => 0.ub[0]
+setnle rflags[0x8c0,0x840] : m8.ub[123] => 0.ub[0]
+setnle rflags[0x8c0,0x880] : m8.ub[123] => 0.ub[1]
+setnle rflags[0x8c0,0x8c0] : m8.ub[123] => 0.ub[0]
+setno rflags[0x800,0x000] : r8.ub[123] => 0.ub[1]
+setno rflags[0x800,0x800] : r8.ub[123] => 0.ub[0]
+setno rflags[0x800,0x000] : m8.ub[123] => 0.ub[1]
+setno rflags[0x800,0x800] : m8.ub[123] => 0.ub[0]
+setnp rflags[0x004,0x000] : r8.ub[123] => 0.ub[1]
+setnp rflags[0x004,0x004] : r8.ub[123] => 0.ub[0]
+setnp rflags[0x004,0x000] : m8.ub[123] => 0.ub[1]
+setnp rflags[0x004,0x004] : m8.ub[123] => 0.ub[0]
+setns rflags[0x080,0x000] : r8.ub[123] => 0.ub[1]
+setns rflags[0x080,0x080] : r8.ub[123] => 0.ub[0]
+setns rflags[0x080,0x000] : m8.ub[123] => 0.ub[1]
+setns rflags[0x080,0x080] : m8.ub[123] => 0.ub[0]
+setnz rflags[0x040,0x000] : r8.ub[123] => 0.ub[1]
+setnz rflags[0x040,0x040] : r8.ub[123] => 0.ub[0]
+setnz rflags[0x040,0x000] : m8.ub[123] => 0.ub[1]
+setnz rflags[0x040,0x040] : m8.ub[123] => 0.ub[0]
+seto rflags[0x800,0x000] : r8.ub[123] => 0.ub[0]
+seto rflags[0x800,0x800] : r8.ub[123] => 0.ub[1]
+seto rflags[0x800,0x000] : m8.ub[123] => 0.ub[0]
+seto rflags[0x800,0x800] : m8.ub[123] => 0.ub[1]
+setp rflags[0x004,0x000] : r8.ub[123] => 0.ub[0]
+setp rflags[0x004,0x004] : r8.ub[123] => 0.ub[1]
+setp rflags[0x004,0x000] : m8.ub[123] => 0.ub[0]
+setp rflags[0x004,0x004] : m8.ub[123] => 0.ub[1]
+sets rflags[0x080,0x000] : r8.ub[123] => 0.ub[0]
+sets rflags[0x080,0x080] : r8.ub[123] => 0.ub[1]
+sets rflags[0x080,0x000] : m8.ub[123] => 0.ub[0]
+sets rflags[0x080,0x080] : m8.ub[123] => 0.ub[1]
+setz rflags[0x040,0x000] : r8.ub[123] => 0.ub[0]
+setz rflags[0x040,0x040] : r8.ub[123] => 0.ub[1]
+setz rflags[0x040,0x000] : m8.ub[123] => 0.ub[0]
+setz rflags[0x040,0x040] : m8.ub[123] => 0.ub[1]
shlb r8.ub[0xca] => 0.ub[0x94]
shlb m8.ub[0xca] => 0.ub[0x94]
shlb imm8[2] r8.ub[0xca] => 1.ub[0x28]
@@ -1202,10 +1202,10 @@ shrdq cl.ub[1] r64.uq[0xffff0000ff00f0ca] r64.uq[0xffff0000ff00f0ca] => 2.uq[0x7
shrdq cl.ub[1] r64.uq[0xffff0000ff00f0ca] m64.uq[0xffff0000ff00f0ca] => 2.uq[0x7fff80007f807865]
shrdq cl.ub[16] r64.uq[0xffff0000ff00f0ca] r64.uq[0xffff0000ff00f0ca] => 2.uq[0xf0caffff0000ff00]
shrdq cl.ub[16] r64.uq[0xffff0000ff00f0ca] m64.uq[0xffff0000ff00f0ca] => 2.uq[0xf0caffff0000ff00]
-###stc eflags[0x001,0x000] : => eflags[0x001,0x001]
-###stc eflags[0x001,0x001] : => eflags[0x001,0x001]
-std eflags[0x400,0x000] : => eflags[0x400,0x400]
-std eflags[0x400,0x400] : => eflags[0x400,0x400]
+###stc rflags[0x001,0x000] : => rflags[0x001,0x001]
+###stc rflags[0x001,0x001] : => rflags[0x001,0x001]
+std rflags[0x400,0x000] : => rflags[0x400,0x400]
+std rflags[0x400,0x400] : => rflags[0x400,0x400]
subb imm8[12] al.ub[34] => 1.ub[22]
subb imm8[12] bl.ub[34] => 1.ub[22]
subb imm8[12] m8.ub[34] => 1.ub[22]
@@ -1233,106 +1233,106 @@ subq imm32[12345678] rbx.uq[8765432175318642] => 1.uq[8765432162972964]
subq r64.uq[1234567813572468] r64.uq[8765432175318642] => 1.uq[7530864361746174]
subq r64.uq[1234567813572468] m64.uq[8765432175318642] => 1.uq[7530864361746174]
subq m64.uq[1234567813572468] r64.uq[8765432175318642] => 1.uq[7530864361746174]
-testb imm8[0x1a] al.ub[0x1a] => eflags[0x8c5,0x000]
-testb imm8[0x5a] al.ub[0x5a] => eflags[0x8c5,0x004]
-testb imm8[0x1a] al.ub[0xa1] => eflags[0x8c5,0x044]
-testb imm8[0xa1] al.ub[0xa1] => eflags[0x8c5,0x080]
-testb imm8[0xa5] al.ub[0xa5] => eflags[0x8c5,0x084]
-testb imm8[0x1a] bl.ub[0x1a] => eflags[0x8c5,0x000]
-testb imm8[0x5a] bl.ub[0x5a] => eflags[0x8c5,0x004]
-testb imm8[0x1a] bl.ub[0xa1] => eflags[0x8c5,0x044]
-testb imm8[0xa1] bl.ub[0xa1] => eflags[0x8c5,0x080]
-testb imm8[0xa5] bl.ub[0xa5] => eflags[0x8c5,0x084]
-testb imm8[0x1a] m8.ub[0x1a] => eflags[0x8c5,0x000]
-testb imm8[0x5a] m8.ub[0x5a] => eflags[0x8c5,0x004]
-testb imm8[0x1a] m8.ub[0xa1] => eflags[0x8c5,0x044]
-testb imm8[0xa1] m8.ub[0xa1] => eflags[0x8c5,0x080]
-testb imm8[0xa5] m8.ub[0xa5] => eflags[0x8c5,0x084]
-testb r8.ub[0x1a] r8.ub[0x1a] => eflags[0x8c5,0x000]
-testb r8.ub[0x5a] r8.ub[0x5a] => eflags[0x8c5,0x004]
-testb r8.ub[0x1a] r8.ub[0xa1] => eflags[0x8c5,0x044]
-testb r8.ub[0xa1] r8.ub[0xa1] => eflags[0x8c5,0x080]
-testb r8.ub[0xa5] r8.ub[0xa5] => eflags[0x8c5,0x084]
-testb r8.ub[0x1a] m8.ub[0x1a] => eflags[0x8c5,0x000]
-testb r8.ub[0x5a] m8.ub[0x5a] => eflags[0x8c5,0x004]
-testb r8.ub[0x1a] m8.ub[0xa1] => eflags[0x8c5,0x044]
-testb r8.ub[0xa1] m8.ub[0xa1] => eflags[0x8c5,0x080]
-testb r8.ub[0xa5] m8.ub[0xa5] => eflags[0x8c5,0x084]
-testw imm16[0x1a1a] ax.uw[0x1a1a] => eflags[0x8c5,0x000]
-testw imm16[0x5a5a] ax.uw[0x5a5a] => eflags[0x8c5,0x004]
-testw imm16[0x1a1a] ax.uw[0xa1a1] => eflags[0x8c5,0x044]
-testw imm16[0xa1a1] ax.uw[0xa1a1] => eflags[0x8c5,0x080]
-testw imm16[0xa5a5] ax.uw[0xa5a5] => eflags[0x8c5,0x084]
-testw imm16[0x1a1a] bx.uw[0x1a1a] => eflags[0x8c5,0x000]
-testw imm16[0x5a5a] bx.uw[0x5a5a] => eflags[0x8c5,0x004]
-testw imm16[0x1a1a] bx.uw[0xa1a1] => eflags[0x8c5,0x044]
-testw imm16[0xa1a1] bx.uw[0xa1a1] => eflags[0x8c5,0x080]
-testw imm16[0xa5a5] bx.uw[0xa5a5] => eflags[0x8c5,0x084]
-testw imm16[0x1a1a] m16.uw[0x1a1a] => eflags[0x8c5,0x000]
-testw imm16[0x5a5a] m16.uw[0x5a5a] => eflags[0x8c5,0x004]
-testw imm16[0x1a1a] m16.uw[0xa1a1] => eflags[0x8c5,0x044]
-testw imm16[0xa1a1] m16.uw[0xa1a1] => eflags[0x8c5,0x080]
-testw imm16[0xa5a5] m16.uw[0xa5a5] => eflags[0x8c5,0x084]
-testw r16.uw[0x1a1a] r16.uw[0x1a1a] => eflags[0x8c5,0x000]
-testw r16.uw[0x5a5a] r16.uw[0x5a5a] => eflags[0x8c5,0x004]
-testw r16.uw[0x1a1a] r16.uw[0xa1a1] => eflags[0x8c5,0x044]
-testw r16.uw[0xa1a1] r16.uw[0xa1a1] => eflags[0x8c5,0x080]
-testw r16.uw[0xa5a5] r16.uw[0xa5a5] => eflags[0x8c5,0x084]
-testw r16.uw[0x1a1a] m16.uw[0x1a1a] => eflags[0x8c5,0x000]
-testw r16.uw[0x5a5a] m16.uw[0x5a5a] => eflags[0x8c5,0x004]
-testw r16.uw[0x1a1a] m16.uw[0xa1a1] => eflags[0x8c5,0x044]
-testw r16.uw[0xa1a1] m16.uw[0xa1a1] => eflags[0x8c5,0x080]
-testw r16.uw[0xa5a5] m16.uw[0xa5a5] => eflags[0x8c5,0x084]
-testl imm32[0x1a1a1a1a] eax.ud[0x1a1a1a1a] => eflags[0x8c5,0x000]
-testl imm32[0x5a5a5a5a] eax.ud[0x5a5a5a5a] => eflags[0x8c5,0x004]
-testl imm32[0x1a1a1a1a] eax.ud[0xa1a1a1a1] => eflags[0x8c5,0x044]
-testl imm32[0xa1a1a1a1] eax.ud[0xa1a1a1a1] => eflags[0x8c5,0x080]
-testl imm32[0xa5a5a5a5] eax.ud[0xa5a5a5a5] => eflags[0x8c5,0x084]
-testl imm32[0x1a1a1a1a] ebx.ud[0x1a1a1a1a] => eflags[0x8c5,0x000]
-testl imm32[0x5a5a5a5a] ebx.ud[0x5a5a5a5a] => eflags[0x8c5,0x004]
-testl imm32[0x1a1a1a1a] ebx.ud[0xa1a1a1a1] => eflags[0x8c5,0x044]
-testl imm32[0xa1a1a1a1] ebx.ud[0xa1a1a1a1] => eflags[0x8c5,0x080]
-testl imm32[0xa5a5a5a5] ebx.ud[0xa5a5a5a5] => eflags[0x8c5,0x084]
-testl imm32[0x1a1a1a1a] m32.ud[0x1a1a1a1a] => eflags[0x8c5,0x000]
-testl imm32[0x5a5a5a5a] m32.ud[0x5a5a5a5a] => eflags[0x8c5,0x004]
-testl imm32[0x1a1a1a1a] m32.ud[0xa1a1a1a1] => eflags[0x8c5,0x044]
-testl imm32[0xa1a1a1a1] m32.ud[0xa1a1a1a1] => eflags[0x8c5,0x080]
-testl imm32[0xa5a5a5a5] m32.ud[0xa5a5a5a5] => eflags[0x8c5,0x084]
-testl r32.ud[0x1a1a1a1a] r32.ud[0x1a1a1a1a] => eflags[0x8c5,0x000]
-testl r32.ud[0x5a5a5a5a] r32.ud[0x5a5a5a5a] => eflags[0x8c5,0x004]
-testl r32.ud[0x1a1a1a1a] r32.ud[0xa1a1a1a1] => eflags[0x8c5,0x044]
-testl r32.ud[0xa1a1a1a1] r32.ud[0xa1a1a1a1] => eflags[0x8c5,0x080]
-testl r32.ud[0xa5a5a5a5] r32.ud[0xa5a5a5a5] => eflags[0x8c5,0x084]
-testl r32.ud[0x1a1a1a1a] m32.ud[0x1a1a1a1a] => eflags[0x8c5,0x000]
-testl r32.ud[0x5a5a5a5a] m32.ud[0x5a5a5a5a] => eflags[0x8c5,0x004]
-testl r32.ud[0x1a1a1a1a] m32.ud[0xa1a1a1a1] => eflags[0x8c5,0x044]
-testl r32.ud[0xa1a1a1a1] m32.ud[0xa1a1a1a1] => eflags[0x8c5,0x080]
-testl r32.ud[0xa5a5a5a5] m32.ud[0xa5a5a5a5] => eflags[0x8c5,0x084]
-testq imm32[0x1a1a1a1a] rax.uq[0x1a1a1a1a] => eflags[0x8c5,0x000]
-testq imm32[0x5a5a5a5a] rax.uq[0x5a5a5a5a] => eflags[0x8c5,0x004]
-testq imm32[0x1a1a1a1a] rax.uq[0xa1a1a1a1] => eflags[0x8c5,0x044]
-testq imm32[-1583242847] rax.uq[0xffffffffa1a1a1a1] => eflags[0x8c5,0x080]
-testq imm32[-1515870811] rax.uq[0xffffffffa5a5a5a5] => eflags[0x8c5,0x084]
-testq imm32[0x1a1a1a1a] rbx.uq[0x1a1a1a1a] => eflags[0x8c5,0x000]
-testq imm32[0x5a5a5a5a] rbx.uq[0x5a5a5a5a] => eflags[0x8c5,0x004]
-testq imm32[0x1a1a1a1a] rbx.uq[0xa1a1a1a1] => eflags[0x8c5,0x044]
-testq imm32[-1583242847] rbx.uq[0xffffffffa1a1a1a1] => eflags[0x8c5,0x080]
-testq imm32[-1515870811] rbx.uq[0xffffffffa5a5a5a5] => eflags[0x8c5,0x084]
-testq imm32[0x1a1a1a1a] m64.uq[0x1a1a1a1a] => eflags[0x8c5,0x000]
-testq imm32[0x5a5a5a5a] m64.uq[0x5a5a5a5a] => eflags[0x8c5,0x004]
-testq imm32[0x1a1a1a1a] m64.uq[0xa1a1a1a1] => eflags[0x8c5,0x044]
-testq imm32[-1583242847] m64.uq[0xffffffffa1a1a1a1] => eflags[0x8c5,0x080]
-testq imm32[-1515870811] m64.uq[0xffffffffa5a5a5a5] => eflags[0x8c5,0x084]
-testq r64.uq[0x1a1a1a1a1a1a1a1a] r64.uq[0x1a1a1a1a1a1a1a1a] => eflags[0x8c5,0x000]
-testq r64.uq[0x5a5a5a5a5a5a5a5a] r64.uq[0x5a5a5a5a5a5a5a5a] => eflags[0x8c5,0x004]
-testq r64.uq[0x1a1a1a1a1a1a1a1a] r64.uq[0xa1a1a1a1a1a1a1a1] => eflags[0x8c5,0x044]
-testq r64.uq[0xa1a1a1a1a1a1a1a1] r64.uq[0xa1a1a1a1a1a1a1a1] => eflags[0x8c5,0x080]
-testq r64.uq[0xa5a5a5a5a5a5a5a5] r64.uq[0xa5a5a5a5a5a5a5a5] => eflags[0x8c5,0x084]
-testq r64.uq[0x1a1a1a1a1a1a1a1a] m64.uq[0x1a1a1a1a1a1a1a1a] => eflags[0x8c5,0x000]
-testq r64.uq[0x5a5a5a5a5a5a5a5a] m64.uq[0x5a5a5a5a5a5a5a5a] => eflags[0x8c5,0x004]
-testq r64.uq[0x1a1a1a1a1a1a1a1a] m64.uq[0xa1a1a1a1a1a1a1a1] => eflags[0x8c5,0x044]
-testq r64.uq[0xa1a1a1a1a1a1a1a1] m64.uq[0xa1a1a1a1a1a1a1a1] => eflags[0x8c5,0x080]
-testq r64.uq[0xa5a5a5a5a5a5a5a5] m64.uq[0xa5a5a5a5a5a5a5a5] => eflags[0x8c5,0x084]
+testb imm8[0x1a] al.ub[0x1a] => rflags[0x8c5,0x000]
+testb imm8[0x5a] al.ub[0x5a] => rflags[0x8c5,0x004]
+testb imm8[0x1a] al.ub[0xa1] => rflags[0x8c5,0x044]
+testb imm8[0xa1] al.ub[0xa1] => rflags[0x8c5,0x080]
+testb imm8[0xa5] al.ub[0xa5] => rflags[0x8c5,0x084]
+testb imm8[0x1a] bl.ub[0x1a] => rflags[0x8c5,0x000]
+testb imm8[0x5a] bl.ub[0x5a] => rflags[0x8c5,0x004]
+testb imm8[0x1a] bl.ub[0xa1] => rflags[0x8c5,0x044]
+testb imm8[0xa1] bl.ub[0xa1] => rflags[0x8c5,0x080]
+testb imm8[0xa5] bl.ub[0xa5] => rflags[0x8c5,0x084]
+testb imm8[0x1a] m8.ub[0x1a] => rflags[0x8c5,0x000]
+testb imm8[0x5a] m8.ub[0x5a] => rflags[0x8c5,0x004]
+testb imm8[0x1a] m8.ub[0xa1] => rflags[0x8c5,0x044]
+testb imm8[0xa1] m8.ub[0xa1] => rflags[0x8c5,0x080]
+testb imm8[0xa5] m8.ub[0xa5] => rflags[0x8c5,0x084]
+testb r8.ub[0x1a] r8.ub[0x1a] => rflags[0x8c5,0x000]
+testb r8.ub[0x5a] r8.ub[0x5a] => rflags[0x8c5,0x004]
+testb r8.ub[0x1a] r8.ub[0xa1] => rflags[0x8c5,0x044]
+testb r8.ub[0xa1] r8.ub[0xa1] => rflags[0x8c5,0x080]
+testb r8.ub[0xa5] r8.ub[0xa5] => rflags[0x8c5,0x084]
+testb r8.ub[0x1a] m8.ub[0x1a] => rflags[0x8c5,0x000]
+testb r8.ub[0x5a] m8.ub[0x5a] => rflags[0x8c5,0x004]
+testb r8.ub[0x1a] m8.ub[0xa1] => rflags[0x8c5,0x044]
+testb r8.ub[0xa1] m8.ub[0xa1] => rflags[0x8c5,0x080]
+testb r8.ub[0xa5] m8.ub[0xa5] => rflags[0x8c5,0x084]
+testw imm16[0x1a1a] ax.uw[0x1a1a] => rflags[0x8c5,0x000]
+testw imm16[0x5a5a] ax.uw[0x5a5a] => rflags[0x8c5,0x004]
+testw imm16[0x1a1a] ax.uw[0xa1a1] => rflags[0x8c5,0x044]
+testw imm16[0xa1a1] ax.uw[0xa1a1] => rflags[0x8c5,0x080]
+testw imm16[0xa5a5] ax.uw[0xa5a5] => rflags[0x8c5,0x084]
+testw imm16[0x1a1a] bx.uw[0x1a1a] => rflags[0x8c5,0x000]
+testw imm16[0x5a5a] bx.uw[0x5a5a] => rflags[0x8c5,0x004]
+testw imm16[0x1a1a] bx.uw[0xa1a1] => rflags[0x8c5,0x044]
+testw imm16[0xa1a1] bx.uw[0xa1a1] => rflags[0x8c5,0x080]
+testw imm16[0xa5a5] bx.uw[0xa5a5] => rflags[0x8c5,0x084]
+testw imm16[0x1a1a] m16.uw[0x1a1a] => rflags[0x8c5,0x000]
+testw imm16[0x5a5a] m16.uw[0x5a5a] => rflags[0x8c5,0x004]
+testw imm16[0x1a1a] m16.uw[0xa1a1] => rflags[0x8c5,0x044]
+testw imm16[0xa1a1] m16.uw[0xa1a1] => rflags[0x8c5,0x080]
+testw imm16[0xa5a5] m16.uw[0xa5a5] => rflags[0x8c5,0x084]
+testw r16.uw[0x1a1a] r16.uw[0x1a1a] => rflags[0x8c5,0x000]
+testw r16.uw[0x5a5a] r16.uw[0x5a5a] => rflags[0x8c5,0x004]
+testw r16.uw[0x1a1a] r16.uw[0xa1a1] => rflags[0x8c5,0x044]
+testw r16.uw[0xa1a1] r16.uw[0xa1a1] => rflags[0x8c5,0x080]
+testw r16.uw[0xa5a5] r16.uw[0xa5a5] => rflags[0x8c5,0x084]
+testw r16.uw[0x1a1a] m16.uw[0x1a1a] => rflags[0x8c5,0x000]
+testw r16.uw[0x5a5a] m16.uw[0x5a5a] => rflags[0x8c5,0x004]
+testw r16.uw[0x1a1a] m16.uw[0xa1a1] => rflags[0x8c5,0x044]
+testw r16.uw[0xa1a1] m16.uw[0xa1a1] => rflags[0x8c5,0x080]
+testw r16.uw[0xa5a5] m16.uw[0xa5a5] => rflags[0x8c5,0x084]
+testl imm32[0x1a1a1a1a] eax.ud[0x1a1a1a1a] => rflags[0x8c5,0x000]
+testl imm32[0x5a5a5a5a] eax.ud[0x5a5a5a5a] => rflags[0x8c5,0x004]
+testl imm32[0x1a1a1a1a] eax.ud[0xa1a1a1a1] => rflags[0x8c5,0x044]
+testl imm32[0xa1a1a1a1] eax.ud[0xa1a1a1a1] => rflags[0x8c5,0x080]
+testl imm32[0xa5a5a5a5] eax.ud[0xa5a5a5a5] => rflags[0x8c5,0x084]
+testl imm32[0x1a1a1a1a] ebx.ud[0x1a1a1a1a] => rflags[0x8c5,0x000]
+testl imm32[0x5a5a5a5a] ebx.ud[0x5a5a5a5a] => rflags[0x8c5,0x004]
+testl imm32[0x1a1a1a1a] ebx.ud[0xa1a1a1a1] => rflags[0x8c5,0x044]
+testl imm32[0xa1a1a1a1] ebx.ud[0xa1a1a1a1] => rflags[0x8c5,0x080]
+testl imm32[0xa5a5a5a5] ebx.ud[0xa5a5a5a5] => rflags[0x8c5,0x084]
+testl imm32[0x1a1a1a1a] m32.ud[0x1a1a1a1a] => rflags[0x8c5,0x000]
+testl imm32[0x5a5a5a5a] m32.ud[0x5a5a5a5a] => rflags[0x8c5,0x004]
+testl imm32[0x1a1a1a1a] m32.ud[0xa1a1a1a1] => rflags[0x8c5,0x044]
+testl imm32[0xa1a1a1a1] m32.ud[0xa1a1a1a1] => rflags[0x8c5,0x080]
+testl imm32[0xa5a5a5a5] m32.ud[0xa5a5a5a5] => rflags[0x8c5,0x084]
+testl r32.ud[0x1a1a1a1a] r32.ud[0x1a1a1a1a] => rflags[0x8c5,0x000]
+testl r32.ud[0x5a5a5a5a] r32.ud[0x5a5a5a5a] => rflags[0x8c5,0x004]
+testl r32.ud[0x1a1a1a1a] r32.ud[0xa1a1a1a1] => rflags[0x8c5,0x044]
+testl r32.ud[0xa1a1a1a1] r32.ud[0xa1a1a1a1] => rflags[0x8c5,0x080]
+testl r32.ud[0xa5a5a5a5] r32.ud[0xa5a5a5a5] => rflags[0x8c5,0x084]
+testl r32.ud[0x1a1a1a1a] m32.ud[0x1a1a1a1a] => rflags[0x8c5,0x000]
+testl r32.ud[0x5a5a5a5a] m32.ud[0x5a5a5a5a] => rflags[0x8c5,0x004]
+testl r32.ud[0x1a1a1a1a] m32.ud[0xa1a1a1a1] => rflags[0x8c5,0x044]
+testl r32.ud[0xa1a1a1a1] m32.ud[0xa1a1a1a1] => rflags[0x8c5,0x080]
+testl r32.ud[0xa5a5a5a5] m32.ud[0xa5a5a5a5] => rflags[0x8c5,0x084]
+testq imm32[0x1a1a1a1a] rax.uq[0x1a1a1a1a] => rflags[0x8c5,0x000]
+testq imm32[0x5a5a5a5a] rax.uq[0x5a5a5a5a] => rflags[0x8c5,0x004]
+testq imm32[0x1a1a1a1a] rax.uq[0xa1a1a1a1] => rflags[0x8c5,0x044]
+testq imm32[-1583242847] rax.uq[0xffffffffa1a1a1a1] => rflags[0x8c5,0x080]
+testq imm32[-1515870811] rax.uq[0xffffffffa5a5a5a5] => rflags[0x8c5,0x084]
+testq imm32[0x1a1a1a1a] rbx.uq[0x1a1a1a1a] => rflags[0x8c5,0x000]
+testq imm32[0x5a5a5a5a] rbx.uq[0x5a5a5a5a] => rflags[0x8c5,0x004]
+testq imm32[0x1a1a1a1a] rbx.uq[0xa1a1a1a1] => rflags[0x8c5,0x044]
+testq imm32[-1583242847] rbx.uq[0xffffffffa1a1a1a1] => rflags[0x8c5,0x080]
+testq imm32[-1515870811] rbx.uq[0xffffffffa5a5a5a5] => rflags[0x8c5,0x084]
+testq imm32[0x1a1a1a1a] m64.uq[0x1a1a1a1a] => rflags[0x8c5,0x000]
+testq imm32[0x5a5a5a5a] m64.uq[0x5a5a5a5a] => rflags[0x8c5,0x004]
+testq imm32[0x1a1a1a1a] m64.uq[0xa1a1a1a1] => rflags[0x8c5,0x044]
+testq imm32[-1583242847] m64.uq[0xffffffffa1a1a1a1] => rflags[0x8c5,0x080]
+testq imm32[-1515870811] m64.uq[0xffffffffa5a5a5a5] => rflags[0x8c5,0x084]
+testq r64.uq[0x1a1a1a1a1a1a1a1a] r64.uq[0x1a1a1a1a1a1a1a1a] => rflags[0x8c5,0x000]
+testq r64.uq[0x5a5a5a5a5a5a5a5a] r64.uq[0x5a5a5a5a5a5a5a5a] => rflags[0x8c5,0x004]
+testq r64.uq[0x1a1a1a1a1a1a1a1a] r64.uq[0xa1a1a1a1a1a1a1a1] => rflags[0x8c5,0x044]
+testq r64.uq[0xa1a1a1a1a1a1a1a1] r64.uq[0xa1a1a1a1a1a1a1a1] => rflags[0x8c5,0x080]
+testq r64.uq[0xa5a5a5a5a5a5a5a5] r64.uq[0xa5a5a5a5a5a5a5a5] => rflags[0x8c5,0x084]
+testq r64.uq[0x1a1a1a1a1a1a1a1a] m64.uq[0x1a1a1a1a1a1a1a1a] => rflags[0x8c5,0x000]
+testq r64.uq[0x5a5a5a5a5a5a5a5a] m64.uq[0x5a5a5a5a5a5a5a5a] => rflags[0x8c5,0x004]
+testq r64.uq[0x1a1a1a1a1a1a1a1a] m64.uq[0xa1a1a1a1a1a1a1a1] => rflags[0x8c5,0x044]
+testq r64.uq[0xa1a1a1a1a1a1a1a1] m64.uq[0xa1a1a1a1a1a1a1a1] => rflags[0x8c5,0x080]
+testq r64.uq[0xa5a5a5a5a5a5a5a5] m64.uq[0xa5a5a5a5a5a5a5a5] => rflags[0x8c5,0x084]
###xaddb r8.ub[12] r8.ub[34] => 0.ub[34] 1.ub[46]
###xaddb r8.ub[12] m8.ub[34] => 0.ub[34] 1.ub[46]
###xaddw r16.uw[1234] r16.uw[5678] => 0.uw[5678] 1.uw[6912]
diff --git a/none/tests/amd64/insn_fpu.def b/none/tests/amd64/insn_fpu.def
index 590f584..525fd1b 100644
--- a/none/tests/amd64/insn_fpu.def
+++ b/none/tests/amd64/insn_fpu.def
@@ -70,30 +70,30 @@ fcomps st1.ps[8765.4321] st0.ps[1234.5678] : m32.ps[1234.5678] => st0.ps[8765.43
fcompl st1.pd[7654321.1234567] st0.pd[1234567.7654321] : m64.pd[1234567.7654320] => st0.pd[7654321.1234567] fpusw[0x4700,0x0000]
fcompl st1.pd[7654321.1234567] st0.pd[1234567.7654321] : m64.pd[1234567.7654322] => st0.pd[7654321.1234567] fpusw[0x4700,0x0100]
fcompl st1.pd[7654321.1234567] st0.pd[1234567.7654321] : m64.pd[1234567.7654321] => st0.pd[7654321.1234567] fpusw[0x4700,0x4000]
-fcomi st2.ps[1234.5678] st0.ps[1234.5679] => st0.ps[1234.5678] st2.ps[1234.5679] eflags[0x45,0x00]
-fcomi st2.ps[1234.5678] st0.ps[1234.5676] => st0.ps[1234.5678] st2.ps[1234.5676] eflags[0x45,0x01]
-fcomi st2.ps[1234.5678] st0.ps[1234.5678] => st0.ps[1234.5678] st2.ps[1234.5678] eflags[0x45,0x40]
-fcomi st2.pd[1234567.7654321] st0.pd[1234567.7654322] => st0.pd[1234567.7654322] st2.pd[1234567.7654321] eflags[0x45,0x00]
-fcomi st2.pd[1234567.7654321] st0.pd[1234567.7654320] => st0.pd[1234567.7654320] st2.pd[1234567.7654321] eflags[0x45,0x01]
-fcomi st2.pd[1234567.7654321] st0.pd[1234567.7654321] => st0.pd[1234567.7654321] st2.pd[1234567.7654321] eflags[0x45,0x40]
-fcomip st2.ps[1234.5678] st0.ps[1234.5679] => st1.ps[1234.5679] eflags[0x45,0x00]
-fcomip st2.ps[1234.5678] st0.ps[1234.5676] => st1.ps[1234.5676] eflags[0x45,0x01]
-fcomip st2.ps[1234.5678] st0.ps[1234.5678] => st1.ps[1234.5678] eflags[0x45,0x40]
-fcomip st2.pd[1234567.7654321] st0.pd[1234567.7654322] => st1.pd[1234567.7654321] eflags[0x45,0x00]
-fcomip st2.pd[1234567.7654321] st0.pd[1234567.7654320] => st1.pd[1234567.7654321] eflags[0x45,0x01]
-fcomip st2.pd[1234567.7654321] st0.pd[1234567.7654321] => st1.pd[1234567.7654321] eflags[0x45,0x40]
-fucomi st2.ps[1234.5678] st0.ps[1234.5679] => st0.ps[1234.5678] st2.ps[1234.5679] eflags[0x45,0x00]
-fucomi st2.ps[1234.5678] st0.ps[1234.5676] => st0.ps[1234.5678] st2.ps[1234.5676] eflags[0x45,0x01]
-fucomi st2.ps[1234.5678] st0.ps[1234.5678] => st0.ps[1234.5678] st2.ps[1234.5678] eflags[0x45,0x40]
-fucomi st2.pd[1234567.7654321] st0.pd[1234567.7654322] => st0.pd[1234567.7654322] st2.pd[1234567.7654321] eflags[0x45,0x00]
-fucomi st2.pd[1234567.7654321] st0.pd[1234567.7654320] => st0.pd[1234567.7654320] st2.pd[1234567.7654321] eflags[0x45,0x01]
-fucomi st2.pd[1234567.7654321] st0.pd[1234567.7654321] => st0.pd[1234567.7654321] st2.pd[1234567.7654321] eflags[0x45,0x40]
-fucomip st2.ps[1234.5678] st0.ps[1234.5679] => st1.ps[1234.5679] eflags[0x45,0x00]
-fucomip st2.ps[1234.5678] st0.ps[1234.5676] => st1.ps[1234.5676] eflags[0x45,0x01]
-fucomip st2.ps[1234.5678] st0.ps[1234.5678] => st1.ps[1234.5678] eflags[0x45,0x40]
-fucomip st2.pd[1234567.7654321] st0.pd[1234567.7654322] => st1.pd[1234567.7654321] eflags[0x45,0x00]
-fucomip st2.pd[1234567.7654321] st0.pd[1234567.7654320] => st1.pd[1234567.7654321] eflags[0x45,0x01]
-fucomip st2.pd[1234567.7654321] st0.pd[1234567.7654321] => st1.pd[1234567.7654321] eflags[0x45,0x40]
+fcomi st2.ps[1234.5678] st0.ps[1234.5679] => st0.ps[1234.5678] st2.ps[1234.5679] rflags[0x45,0x00]
+fcomi st2.ps[1234.5678] st0.ps[1234.5676] => st0.ps[1234.5678] st2.ps[1234.5676] rflags[0x45,0x01]
+fcomi st2.ps[1234.5678] st0.ps[1234.5678] => st0.ps[1234.5678] st2.ps[1234.5678] rflags[0x45,0x40]
+fcomi st2.pd[1234567.7654321] st0.pd[1234567.7654322] => st0.pd[1234567.7654322] st2.pd[1234567.7654321] rflags[0x45,0x00]
+fcomi st2.pd[1234567.7654321] st0.pd[1234567.7654320] => st0.pd[1234567.7654320] st2.pd[1234567.7654321] rflags[0x45,0x01]
+fcomi st2.pd[1234567.7654321] st0.pd[1234567.7654321] => st0.pd[1234567.7654321] st2.pd[1234567.7654321] rflags[0x45,0x40]
+fcomip st2.ps[1234.5678] st0.ps[1234.5679] => st1.ps[1234.5679] rflags[0x45,0x00]
+fcomip st2.ps[1234.5678] st0.ps[1234.5676] => st1.ps[1234.5676] rflags[0x45,0x01]
+fcomip st2.ps[1234.5678] st0.ps[1234.5678] => st1.ps[1234.5678] rflags[0x45,0x40]
+fcomip st2.pd[1234567.7654321] st0.pd[1234567.7654322] => st1.pd[1234567.7654321] rflags[0x45,0x00]
+fcomip st2.pd[1234567.7654321] st0.pd[1234567.7654320] => st1.pd[1234567.7654321] rflags[0x45,0x01]
+fcomip st2.pd[1234567.7654321] st0.pd[1234567.7654321] => st1.pd[1234567.7654321] rflags[0x45,0x40]
+fucomi st2.ps[1234.5678] st0.ps[1234.5679] => st0.ps[1234.5678] st2.ps[1234.5679] rflags[0x45,0x00]
+fucomi st2.ps[1234.5678] st0.ps[1234.5676] => st0.ps[1234.5678] st2.ps[1234.5676] rflags[0x45,0x01]
+fucomi st2.ps[1234.5678] st0.ps[1234.5678] => st0.ps[1234.5678] st2.ps[1234.5678] rflags[0x45,0x40]
+fucomi st2.pd[1234567.7654321] st0.pd[1234567.7654322] => st0.pd[1234567.7654322] st2.pd[1234567.7654321] rflags[0x45,0x00]
+fucomi st2.pd[1234567.7654321] st0.pd[1234567.7654320] => st0.pd[1234567.7654320] st2.pd[1234567.7654321] rflags[0x45,0x01]
+fucomi st2.pd[1234567.7654321] st0.pd[1234567.7654321] => st0.pd[1234567.7654321] st2.pd[1234567.7654321] rflags[0x45,0x40]
+fucomip st2.ps[1234.5678] st0.ps[1234.5679] => st1.ps[1234.5679] rflags[0x45,0x00]
+fucomip st2.ps[1234.5678] st0.ps[1234.5676] => st1.ps[1234.5676] rflags[0x45,0x01]
+fucomip st2.ps[1234.5678] st0.ps[1234.5678] => st1.ps[1234.5678] rflags[0x45,0x40]
+fucomip st2.pd[1234567.7654321] st0.pd[1234567.7654322] => st1.pd[1234567.7654321] rflags[0x45,0x00]
+fucomip st2.pd[1234567.7654321] st0.pd[1234567.7654320] => st1.pd[1234567.7654321] rflags[0x45,0x01]
+fucomip st2.pd[1234567.7654321] st0.pd[1234567.7654321] => st1.pd[1234567.7654321] rflags[0x45,0x40]
fchs st0.ps[1234.5678] : => st0.ps[-1234.5678]
fchs st0.ps[-1234.5678] : => st0.ps[1234.5678]
fchs st0.pd[12345678.87654321] : => st0.pd[-12345678.87654321]
diff --git a/none/tests/amd64/insn_sse.def b/none/tests/amd64/insn_sse.def
index a9e92a0..277a062 100644
--- a/none/tests/amd64/insn_sse.def
+++ b/none/tests/amd64/insn_sse.def
@@ -38,12 +38,12 @@ cmpordps xmm.ps[234.5678,234.5678,234.5678,234.5678] xmm.ps[234.5679,234.5677,23
cmpordps m128.ps[234.5678,234.5678,234.5678,234.5678] xmm.ps[234.5679,234.5677,234.5679,234.5677] => 1.ud[0xffffffff,0xffffffff,0xffffffff,0xffffffff]
cmpordss xmm.ps[1234.5678,0.0,0.0,0.0] xmm.ps[1234.5679,0.0,0.0,0.0] => 1.ud[0xffffffff,0,0,0]
cmpordss m128.ps[1234.5678,0.0,0.0,0.0] xmm.ps[1234.5676,0.0,0.0,0.0] => 1.ud[0xffffffff,0,0,0]
-comiss xmm.ps[234.5678,0.0] xmm.ps[234.5679,0.0] => eflags[0x8d5,0x000]
-comiss m32.ps[234.5678] xmm.ps[234.5679,0.0] => eflags[0x8d5,0x000]
-comiss xmm.ps[234.5678,0.0] xmm.ps[234.5677,0.0] => eflags[0x8d5,0x001]
-comiss m32.ps[234.5678] xmm.ps[234.5677,0.0] => eflags[0x8d5,0x001]
-comiss xmm.ps[234.5678,0.0] xmm.ps[234.5678,0.0] => eflags[0x8d5,0x040]
-comiss m32.ps[234.5678] xmm.ps[234.5678,0.0] => eflags[0x8d5,0x040]
+comiss xmm.ps[234.5678,0.0] xmm.ps[234.5679,0.0] => rflags[0x8d5,0x000]
+comiss m32.ps[234.5678] xmm.ps[234.5679,0.0] => rflags[0x8d5,0x000]
+comiss xmm.ps[234.5678,0.0] xmm.ps[234.5677,0.0] => rflags[0x8d5,0x001]
+comiss m32.ps[234.5678] xmm.ps[234.5677,0.0] => rflags[0x8d5,0x001]
+comiss xmm.ps[234.5678,0.0] xmm.ps[234.5678,0.0] => rflags[0x8d5,0x040]
+comiss m32.ps[234.5678] xmm.ps[234.5678,0.0] => rflags[0x8d5,0x040]
cvtpi2ps mm.sd[1234,5678] xmm.ps[1.1,2.2,3.3,4.4] => 1.ps[1234.0,5678.0,3.3,4.4]
cvtpi2ps m64.sd[1234,5678] xmm.ps[1.1,2.2,3.3,4.4] => 1.ps[1234.0,5678.0,3.3,4.4]
cvtps2pi xmm.ps[12.34,56.78,1.11,2.22] mm.sd[1,2] => 1.sd[12,57]
@@ -140,12 +140,12 @@ subps xmm.ps[12.34,56.77,43.21,87.65] xmm.ps[44.0,33.0,22.0,11.0] => 1.ps[31.66,
subps m128.ps[12.34,56.77,43.21,87.65] xmm.ps[44.0,33.0,22.0,11.0] => 1.ps[31.66,-23.77,-21.21,-76.65]
subss xmm.ps[12.34,56.77,43.21,87.65] xmm.ps[44.0,33.0,22.0,11.0] => 1.ps[31.66,33.0,22.0,11.0]
subss m128.ps[12.34,56.77,43.21,87.65] xmm.ps[44.0,33.0,22.0,11.0] => 1.ps[31.66,33.0,22.0,11.0]
-ucomiss xmm.ps[234.5678,0.0] xmm.ps[234.5679,0.0] => eflags[0x8d5,0x000]
-ucomiss m32.ps[234.5678] xmm.ps[234.5679,0.0] => eflags[0x8d5,0x000]
-ucomiss xmm.ps[234.5678,0.0] xmm.ps[234.5677,0.0] => eflags[0x8d5,0x001]
-ucomiss m32.ps[234.5678] xmm.ps[234.5677,0.0] => eflags[0x8d5,0x001]
-ucomiss xmm.ps[234.5678,0.0] xmm.ps[234.5678,0.0] => eflags[0x8d5,0x040]
-ucomiss m32.ps[234.5678] xmm.ps[234.5678,0.0] => eflags[0x8d5,0x040]
+ucomiss xmm.ps[234.5678,0.0] xmm.ps[234.5679,0.0] => rflags[0x8d5,0x000]
+ucomiss m32.ps[234.5678] xmm.ps[234.5679,0.0] => rflags[0x8d5,0x000]
+ucomiss xmm.ps[234.5678,0.0] xmm.ps[234.5677,0.0] => rflags[0x8d5,0x001]
+ucomiss m32.ps[234.5678] xmm.ps[234.5677,0.0] => rflags[0x8d5,0x001]
+ucomiss xmm.ps[234.5678,0.0] xmm.ps[234.5678,0.0] => rflags[0x8d5,0x040]
+ucomiss m32.ps[234.5678] xmm.ps[234.5678,0.0] => rflags[0x8d5,0x040]
unpckhps xmm.ps[12.34,56.78,43.21,87.65] xmm.ps[11.22,33.44,55.66,77.88] => 1.ps[55.66,43.21,77.88,87.65]
unpckhps m128.ps[12.34,56.78,43.21,87.65] xmm.ps[11.22,33.44,55.66,77.88] => 1.ps[55.66,43.21,77.88,87.65]
unpcklps xmm.ps[12.34,56.78,43.21,87.65] xmm.ps[11.22,33.44,55.66,77.88] => 1.ps[11.22,12.34,33.44,56.78]
diff --git a/none/tests/amd64/insn_sse2.def b/none/tests/amd64/insn_sse2.def
index 3cbdd41..7e0890e 100644
--- a/none/tests/amd64/insn_sse2.def
+++ b/none/tests/amd64/insn_sse2.def
@@ -38,12 +38,12 @@ cmpnlesd xmm.pd[1234.5678,0.0] xmm.pd[1234.5679,0.0] => 1.uq[0xffffffffffffffff,
cmpnlesd m128.pd[1234.5678,0.0] xmm.pd[1234.5678,0.0] => 1.uq[0x0000000000000000,0]
cmpordsd xmm.pd[1234.5678,0.0] xmm.pd[1234.5679,0.0] => 1.uq[0xffffffffffffffff,0]
cmpordsd m128.pd[1234.5678,0.0] xmm.pd[1234.5678,0.0] => 1.uq[0xffffffffffffffff,0]
-comisd xmm.pd[1234.5678,0.0] xmm.pd[1234.5679,0.0] => eflags[0x8d5,0x000]
-comisd xmm.pd[1234.5678,0.0] xmm.pd[1234.5677,0.0] => eflags[0x8d5,0x001]
-comisd xmm.pd[1234.5678,0.0] xmm.pd[1234.5678,0.0] => eflags[0x8d5,0x040]
-comisd m64.pd[1234.5678] xmm.pd[1234.5679,0.0] => eflags[0x8d5,0x000]
-comisd m64.pd[1234.5678] xmm.pd[1234.5677,0.0] => eflags[0x8d5,0x001]
-comisd m64.pd[1234.5678] xmm.pd[1234.5678,0.0] => eflags[0x8d5,0x040]
+comisd xmm.pd[1234.5678,0.0] xmm.pd[1234.5679,0.0] => rflags[0x8d5,0x000]
+comisd xmm.pd[1234.5678,0.0] xmm.pd[1234.5677,0.0] => rflags[0x8d5,0x001]
+comisd xmm.pd[1234.5678,0.0] xmm.pd[1234.5678,0.0] => rflags[0x8d5,0x040]
+comisd m64.pd[1234.5678] xmm.pd[1234.5679,0.0] => rflags[0x8d5,0x000]
+comisd m64.pd[1234.5678] xmm.pd[1234.5677,0.0] => rflags[0x8d5,0x001]
+comisd m64.pd[1234.5678] xmm.pd[1234.5678,0.0] => rflags[0x8d5,0x040]
cvtdq2pd xmm.sd[1234,5678,0,0] xmm.pd[0.0,0.0] => 1.pd[1234.0,5678.0]
cvtdq2pd m128.sd[1234,5678,0,0] xmm.pd[0.0,0.0] => 1.pd[1234.0,5678.0]
cvtdq2ps xmm.sd[1234,5678,-1234,-5678] xmm.ps[0.0,0.0,0.0,0.0] => 1.ps[1234.0,5678.0,-1234.0,-5678.0]
@@ -329,12 +329,12 @@ subpd xmm.pd[1234.5678,8765.4321] xmm.pd[2222.0,1111.0] => 1.pd[987.4322,-7654.4
subpd m128.pd[1234.5678,8765.4321] xmm.pd[2222.0,1111.0] => 1.pd[987.4322,-7654.4321]
subsd xmm.pd[1234.5678,8765.4321] xmm.pd[2222.0,1111.0] => 1.pd[987.4322,1111.0]
subsd m128.pd[1234.5678,8765.4321] xmm.pd[2222.0,1111.0] => 1.pd[987.4322,1111.0]
-ucomisd xmm.pd[1234.5678,0.0] xmm.pd[1234.5679,0.0] => eflags[0x8d5,0x000]
-ucomisd xmm.pd[1234.5678,0.0] xmm.pd[1234.5677,0.0] => eflags[0x8d5,0x001]
-ucomisd xmm.pd[1234.5678,0.0] xmm.pd[1234.5678,0.0] => eflags[0x8d5,0x040]
-ucomisd m64.pd[1234.5678] xmm.pd[1234.5679,0.0] => eflags[0x8d5,0x000]
-ucomisd m64.pd[1234.5678] xmm.pd[1234.5677,0.0] => eflags[0x8d5,0x001]
-ucomisd m64.pd[1234.5678] xmm.pd[1234.5678,0.0] => eflags[0x8d5,0x040]
+ucomisd xmm.pd[1234.5678,0.0] xmm.pd[1234.5679,0.0] => rflags[0x8d5,0x000]
+ucomisd xmm.pd[1234.5678,0.0] xmm.pd[1234.5677,0.0] => rflags[0x8d5,0x001]
+ucomisd xmm.pd[1234.5678,0.0] xmm.pd[1234.5678,0.0] => rflags[0x8d5,0x040]
+ucomisd m64.pd[1234.5678] xmm.pd[1234.5679,0.0] => rflags[0x8d5,0x000]
+ucomisd m64.pd[1234.5678] xmm.pd[1234.5677,0.0] => rflags[0x8d5,0x001]
+ucomisd m64.pd[1234.5678] xmm.pd[1234.5678,0.0] => rflags[0x8d5,0x040]
unpckhpd xmm.pd[1234.5678,8765.4321] xmm.pd[1122.3344,5566.7788] => 1.pd[5566.7788,8765.4321]
unpckhpd m128.pd[1234.5678,8765.4321] xmm.pd[1122.3344,5566.7788] => 1.pd[5566.7788,8765.4321]
unpcklpd xmm.pd[1234.5678,8765.4321] xmm.pd[1122.3344,5566.7788] => 1.pd[1122.3344,1234.5678]
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