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Makefile: force running Makefile rules if there is a file matching their names
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Makefile
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Makefile
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@ -10,6 +10,8 @@ endif
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GO_BUILDINFO = -X '$(PKG_PREFIX)/lib/buildinfo.Version=$(APP_NAME)-$(shell date -u +'%Y%m%d-%H%M%S')-$(BUILDINFO_TAG)'
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GO_BUILDINFO = -X '$(PKG_PREFIX)/lib/buildinfo.Version=$(APP_NAME)-$(shell date -u +'%Y%m%d-%H%M%S')-$(BUILDINFO_TAG)'
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.PHONY: $(MAKECMDGOALS)
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all: \
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all: \
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vminsert \
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vminsert \
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vmselect \
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vmselect \
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