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added architecture documentation
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.gitignore
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/__pycache__/
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/doc/*.jar
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doc/pyPlc_architecture.png
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doc/pyPlc_architecture.png
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doc/pyPlc_architecture.puml
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doc/pyPlc_architecture.puml
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@startuml
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package "pyPLC" {
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package "pyPlcIPv6" {
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[miniIPv6]
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[pyPlcUdp]
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[pyPlcSDP]
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[pyPlcTcpExiSniff]
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[pyPlcV2GEXI]
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}
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package "pyPlcHomeplug" {
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[dispatcher]
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[SLAC]
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}
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[xmlProcessing]
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}
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[ControlPilotLine]
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[HomeplugAdaptor]
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[pcap DLL] as pcap
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[wireshark]
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[FlUxIuS/V2Gdecoder] as dec
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package "WindowsOS or Linux" {
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[OS_Ethernet]
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[OS_IPv6]
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[OS_TCP]
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[OS_ICMP]
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}
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[ControlPilotLine] <-up-> [HomeplugAdaptor]
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[HomeplugAdaptor] <-up-> [OS_Ethernet]
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[OS_Ethernet] <-up-> [pcap]
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[OS_Ethernet] <-up-> [OS_IPv6]
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[OS_Ethernet] <-up-> [OS_ICMP]
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[OS_IPv6] <-up-> [OS_TCP]
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[pcap] <-up-> [pcap-ct]
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[pcap] -up-> [wireshark]
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[pcap-ct] <-up-> [dispatcher]
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[dispatcher] <-up-> [SLAC]
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[dispatcher] <-up-> [miniIPv6]
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[miniIPv6] <-up-> [pyPlcUdp]
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[miniIPv6] -up-> [pyPlcTcpExiSniff]
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[pyPlcUdp] <-up-> [pyPlcSDP]
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[OS_TCP] <-up-> [pyPlcV2GEXI]
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[pyPlcV2GEXI] -r-> [dec]
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[pyPlcTcpExiSniff] -r-> [dec]
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[dec] -l-> [xmlProcessing]
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@enduml
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