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GSP: Update framebuffer information when necessary.
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parent
590c206ac8
commit
14b24a75b3
2 changed files with 41 additions and 2 deletions
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@ -36,6 +36,17 @@ static inline u8* GetCommandBuffer(u32 thread_id) {
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0x800 + (thread_id * sizeof(CommandBuffer)));
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}
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static inline FrameBufferUpdate* GetFrameBufferInfo(u32 thread_id, u32 screen_index) {
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if (0 == g_shared_memory)
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return nullptr;
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_dbg_assert_msg_(GSP, screen_index < 2, "Invalid screen index");
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// For each thread there are two FrameBufferUpdate fields
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u32 offset = 0x200 + (2 * thread_id + screen_index) * sizeof(FrameBufferUpdate);
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return (FrameBufferUpdate*)Kernel::GetSharedMemoryPointer(g_shared_memory, offset);
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}
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/// Gets a pointer to the interrupt relay queue for a given thread index
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static inline InterruptRelayQueue* GetInterruptRelayQueue(u32 thread_id) {
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return (InterruptRelayQueue*)Kernel::GetSharedMemoryPointer(g_shared_memory,
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@ -166,6 +177,7 @@ void RegisterInterruptRelayQueue(Service::Interface* self) {
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/**
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* Signals that the specified interrupt type has occurred to userland code
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* @param interrupt_id ID of interrupt that is being signalled
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* @todo This should probably take a thread_id parameter and only signal this thread?
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*/
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void SignalInterrupt(InterruptId interrupt_id) {
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if (0 == g_interrupt_event) {
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@ -191,7 +203,7 @@ void SignalInterrupt(InterruptId interrupt_id) {
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}
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/// Executes the next GSP command
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void ExecuteCommand(const Command& command) {
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void ExecuteCommand(const Command& command, u32 thread_id) {
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// Utility function to convert register ID to address
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auto WriteGPURegister = [](u32 id, u32 data) {
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GPU::Write<u32>(0x1EF00000 + 4 * id, data);
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@ -262,6 +274,15 @@ void ExecuteCommand(const Command& command) {
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SignalInterrupt(InterruptId::PPF);
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SignalInterrupt(InterruptId::P3D);
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SignalInterrupt(InterruptId::DMA);
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// Update framebuffer information if requested
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for (int screen_id = 0; screen_id < 2; ++screen_id) {
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FrameBufferUpdate* info = GetFrameBufferInfo(thread_id, screen_id);
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if (info->is_dirty)
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SetBufferSwap(screen_id, info->framebuffer_info[info->index]);
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info->is_dirty = false;
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}
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break;
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}
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@ -304,7 +325,7 @@ void TriggerCmdReqQueue(Service::Interface* self) {
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g_debugger.GXCommandProcessed((u8*)&command_buffer->commands[i]);
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// Decode and execute command
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ExecuteCommand(command_buffer->commands[i]);
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ExecuteCommand(command_buffer->commands[i], thread_id);
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// Indicates that command has completed
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command_buffer->number_commands = command_buffer->number_commands - 1;
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@ -4,6 +4,8 @@
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#pragma once
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#include <cstddef>
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#include "common/bit_field.h"
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#include "core/hle/service/service.h"
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@ -76,6 +78,22 @@ struct FrameBufferInfo {
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};
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static_assert(sizeof(FrameBufferInfo) == 0x1c, "Struct has incorrect size");
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struct FrameBufferUpdate {
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BitField<0, 1, u8> index; // Index used for GSP::SetBufferSwap
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BitField<0, 1, u8> is_dirty; // true if GSP should update GPU framebuffer registers
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u16 pad1;
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FrameBufferInfo framebuffer_info[2];
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u32 pad2;
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};
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static_assert(sizeof(FrameBufferUpdate) == 0x40, "Struct has incorrect size");
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// TODO: Not sure if this padding is correct.
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// Chances are the second block is stored at offset 0x24 rather than 0x20.
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#ifndef _MSC_VER
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static_assert(offsetof(FrameBufferUpdate, framebuffer_info[1]) == 0x20, "FrameBufferInfo element has incorrect alignment");
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#endif
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/// GSP command
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struct Command {
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BitField<0, 8, CommandId> id;
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