From 668e5452fa318ba57e6d5165b6df66fd2d004a66 Mon Sep 17 00:00:00 2001
From: MerryMage <MerryMage@users.noreply.github.com>
Date: Sat, 13 Jan 2018 22:34:15 +0000
Subject: [PATCH] Update dynarmic to bc73004
bc73004 a64_merge_interpret_blocks: Remove debug output
4e656ed tests/A64: Randomize PSTATE.<NZCV>
fd9530b A64: Optimization: Merge interpret blocks
3c9eb04 testenv: Use format constants
324f3fc tests/A64: Unicorn interface fixes
98ecbe7 tests/A64: Fuzz against unicorn
b1d38e7 tests/A64: Move TestEnvironment to own header
5218ad9 A64/data_processing_pcrel: bug: ADR{,P} instructions sign extend their immediate
b1a8c39 A64/data_processing_addsub: bug: {ADD,SUB}S (extended register) instructions write to ZR when d = 31
64827fb a64_emit_x64: bug: A64CallSupervisor trampled callee-save registers
1bfa04d emit_x64: bug: OP m/r64, imm32 form instructions sign-extend their immediate on x64
edadeea A64 inferface: Use two argument static_assert
9ab1304 A64: Add ExceptionRaised IR instruction
6843eed Update readme
7438d07 A64/translate: Add TranslateSingleInstruction function
---
externals/dynarmic | 2 +-
src/core/arm/dynarmic/arm_dynarmic.cpp | 29 +++++++++++++++-----------
2 files changed, 18 insertions(+), 13 deletions(-)
diff --git a/externals/dynarmic b/externals/dynarmic
index 83afe4353c..bc73004dd5 160000
--- a/externals/dynarmic
+++ b/externals/dynarmic
@@ -1 +1 @@
-Subproject commit 83afe4353cfc2276dd1dad18c9df1c4b70b7f692
+Subproject commit bc73004dd5aaa10bedef031917bc87a5bb8f6fb7
diff --git a/src/core/arm/dynarmic/arm_dynarmic.cpp b/src/core/arm/dynarmic/arm_dynarmic.cpp
index f1c15ff032..2ad48dcc7d 100644
--- a/src/core/arm/dynarmic/arm_dynarmic.cpp
+++ b/src/core/arm/dynarmic/arm_dynarmic.cpp
@@ -2,6 +2,7 @@
// Licensed under GPLv2 or any later version
// Refer to the license.txt file included.
+#include <cinttypes>
#include <memory>
#include <dynarmic/A64/a64.h>
#include <dynarmic/A64/config.h>
@@ -15,33 +16,33 @@ public:
explicit ARM_Dynarmic_Callbacks(ARM_Dynarmic& parent) : parent(parent) {}
~ARM_Dynarmic_Callbacks() = default;
- virtual u8 MemoryRead8(u64 vaddr) override {
+ u8 MemoryRead8(u64 vaddr) override {
return Memory::Read8(vaddr);
}
- virtual u16 MemoryRead16(u64 vaddr) override {
+ u16 MemoryRead16(u64 vaddr) override {
return Memory::Read16(vaddr);
}
- virtual u32 MemoryRead32(u64 vaddr) override {
+ u32 MemoryRead32(u64 vaddr) override {
return Memory::Read32(vaddr);
}
- virtual u64 MemoryRead64(u64 vaddr) override {
+ u64 MemoryRead64(u64 vaddr) override {
return Memory::Read64(vaddr);
}
- virtual void MemoryWrite8(u64 vaddr, u8 value) override {
+ void MemoryWrite8(u64 vaddr, u8 value) override {
Memory::Write8(vaddr, value);
}
- virtual void MemoryWrite16(u64 vaddr, u16 value) override {
+ void MemoryWrite16(u64 vaddr, u16 value) override {
Memory::Write16(vaddr, value);
}
- virtual void MemoryWrite32(u64 vaddr, u32 value) override {
+ void MemoryWrite32(u64 vaddr, u32 value) override {
Memory::Write32(vaddr, value);
}
- virtual void MemoryWrite64(u64 vaddr, u64 value) override {
+ void MemoryWrite64(u64 vaddr, u64 value) override {
Memory::Write64(vaddr, value);
}
- virtual void InterpreterFallback(u64 pc, size_t num_instructions) override {
+ void InterpreterFallback(u64 pc, size_t num_instructions) override {
ARM_Interface::ThreadContext ctx;
parent.SaveContext(ctx);
parent.inner_unicorn.LoadContext(ctx);
@@ -51,19 +52,23 @@ public:
num_interpreted_instructions += num_instructions;
}
- virtual void CallSVC(u32 swi) override {
+ void ExceptionRaised(u64 pc, Dynarmic::A64::Exception /*exception*/) override {
+ ASSERT_MSG(false, "ExceptionRaised(%" PRIx64 ")", pc);
+ }
+
+ void CallSVC(u32 swi) override {
printf("svc %x\n", swi);
Kernel::CallSVC(swi);
}
- virtual void AddTicks(u64 ticks) override {
+ void AddTicks(u64 ticks) override {
if (ticks > ticks_remaining) {
ticks_remaining = 0;
return;
}
ticks -= ticks_remaining;
}
- virtual u64 GetTicksRemaining() override {
+ u64 GetTicksRemaining() override {
return ticks_remaining;
}