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Merge pull request #1243 from degasus/VAO_cache
gl_rasterizer: Implement a VAO cache.
This commit is contained in:
commit
77554ac773
3 changed files with 60 additions and 53 deletions
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@ -127,6 +127,7 @@ public:
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BitField<21, 6, Size> size;
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BitField<27, 3, Type> type;
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BitField<31, 1, u32> bgra;
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u32 hex;
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};
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u32 ComponentCount() const {
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@ -262,6 +263,10 @@ public:
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bool IsValid() const {
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return size != Size::Invalid;
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}
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bool operator<(const VertexAttribute& other) const {
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return hex < other.hex;
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}
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};
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enum class PrimitiveTopology : u32 {
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@ -545,7 +550,7 @@ public:
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INSERT_PADDING_WORDS(0x5B);
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VertexAttribute vertex_attrib_format[NumVertexAttributes];
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std::array<VertexAttribute, NumVertexAttributes> vertex_attrib_format;
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INSERT_PADDING_WORDS(0xF);
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@ -964,7 +969,7 @@ ASSERT_REG_POSITION(stencil_back_func_ref, 0x3D5);
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ASSERT_REG_POSITION(stencil_back_mask, 0x3D6);
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ASSERT_REG_POSITION(stencil_back_func_mask, 0x3D7);
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ASSERT_REG_POSITION(zeta, 0x3F8);
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ASSERT_REG_POSITION(vertex_attrib_format[0], 0x458);
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ASSERT_REG_POSITION(vertex_attrib_format, 0x458);
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ASSERT_REG_POSITION(rt_control, 0x487);
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ASSERT_REG_POSITION(zeta_width, 0x48a);
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ASSERT_REG_POSITION(zeta_height, 0x48b);
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@ -70,28 +70,13 @@ RasterizerOpenGL::RasterizerOpenGL(Core::Frontend::EmuWindow& window, ScreenInfo
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// Clipping plane 0 is always enabled for PICA fixed clip plane z <= 0
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state.clip_distance[0] = true;
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// Generate VAO and UBO
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sw_vao.Create();
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uniform_buffer.Create();
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state.draw.vertex_array = sw_vao.handle;
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state.draw.uniform_buffer = uniform_buffer.handle;
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state.Apply();
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// Create render framebuffer
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framebuffer.Create();
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hw_vao.Create();
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state.draw.vertex_buffer = buffer_cache.GetHandle();
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shader_program_manager = std::make_unique<GLShader::ProgramManager>();
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state.draw.shader_program = 0;
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state.draw.vertex_array = hw_vao.handle;
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state.Apply();
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glBindBuffer(GL_ELEMENT_ARRAY_BUFFER, buffer_cache.GetHandle());
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glEnable(GL_BLEND);
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glGetIntegerv(GL_UNIFORM_BUFFER_OFFSET_ALIGNMENT, &uniform_buffer_alignment);
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@ -106,7 +91,54 @@ void RasterizerOpenGL::SetupVertexArrays() {
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const auto& gpu = Core::System::GetInstance().GPU().Maxwell3D();
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const auto& regs = gpu.regs;
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state.draw.vertex_array = hw_vao.handle;
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auto [iter, is_cache_miss] = vertex_array_cache.try_emplace(regs.vertex_attrib_format);
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auto& VAO = iter->second;
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if (is_cache_miss) {
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VAO.Create();
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state.draw.vertex_array = VAO.handle;
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state.Apply();
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// The index buffer binding is stored within the VAO. Stupid OpenGL, but easy to work
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// around.
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glBindBuffer(GL_ELEMENT_ARRAY_BUFFER, buffer_cache.GetHandle());
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// Use the vertex array as-is, assumes that the data is formatted correctly for OpenGL.
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// Enables the first 16 vertex attributes always, as we don't know which ones are actually
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// used until shader time. Note, Tegra technically supports 32, but we're capping this to 16
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// for now to avoid OpenGL errors.
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// TODO(Subv): Analyze the shader to identify which attributes are actually used and don't
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// assume every shader uses them all.
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for (unsigned index = 0; index < 16; ++index) {
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const auto& attrib = regs.vertex_attrib_format[index];
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// Ignore invalid attributes.
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if (!attrib.IsValid())
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continue;
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const auto& buffer = regs.vertex_array[attrib.buffer];
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LOG_TRACE(HW_GPU,
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"vertex attrib {}, count={}, size={}, type={}, offset={}, normalize={}",
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index, attrib.ComponentCount(), attrib.SizeString(), attrib.TypeString(),
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attrib.offset.Value(), attrib.IsNormalized());
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ASSERT(buffer.IsEnabled());
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glEnableVertexAttribArray(index);
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if (attrib.type == Tegra::Engines::Maxwell3D::Regs::VertexAttribute::Type::SignedInt ||
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attrib.type ==
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Tegra::Engines::Maxwell3D::Regs::VertexAttribute::Type::UnsignedInt) {
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glVertexAttribIFormat(index, attrib.ComponentCount(),
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MaxwellToGL::VertexType(attrib), attrib.offset);
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} else {
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glVertexAttribFormat(index, attrib.ComponentCount(),
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MaxwellToGL::VertexType(attrib),
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attrib.IsNormalized() ? GL_TRUE : GL_FALSE, attrib.offset);
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}
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glVertexAttribBinding(index, attrib.buffer);
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}
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}
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state.draw.vertex_array = VAO.handle;
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state.draw.vertex_buffer = buffer_cache.GetHandle();
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state.Apply();
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@ -142,38 +174,6 @@ void RasterizerOpenGL::SetupVertexArrays() {
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glVertexBindingDivisor(index, 0);
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}
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}
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// Use the vertex array as-is, assumes that the data is formatted correctly for OpenGL.
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// Enables the first 16 vertex attributes always, as we don't know which ones are actually used
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// until shader time. Note, Tegra technically supports 32, but we're capping this to 16 for now
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// to avoid OpenGL errors.
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// TODO(Subv): Analyze the shader to identify which attributes are actually used and don't
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// assume every shader uses them all.
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for (unsigned index = 0; index < 16; ++index) {
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auto& attrib = regs.vertex_attrib_format[index];
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// Ignore invalid attributes.
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if (!attrib.IsValid())
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continue;
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auto& buffer = regs.vertex_array[attrib.buffer];
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LOG_TRACE(HW_GPU, "vertex attrib {}, count={}, size={}, type={}, offset={}, normalize={}",
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index, attrib.ComponentCount(), attrib.SizeString(), attrib.TypeString(),
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attrib.offset.Value(), attrib.IsNormalized());
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ASSERT(buffer.IsEnabled());
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glEnableVertexAttribArray(index);
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if (attrib.type == Tegra::Engines::Maxwell3D::Regs::VertexAttribute::Type::SignedInt ||
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attrib.type == Tegra::Engines::Maxwell3D::Regs::VertexAttribute::Type::UnsignedInt) {
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glVertexAttribIFormat(index, attrib.ComponentCount(), MaxwellToGL::VertexType(attrib),
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attrib.offset);
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} else {
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glVertexAttribFormat(index, attrib.ComponentCount(), MaxwellToGL::VertexType(attrib),
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attrib.IsNormalized() ? GL_TRUE : GL_FALSE, attrib.offset);
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}
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glVertexAttribBinding(index, attrib.buffer);
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}
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}
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void RasterizerOpenGL::SetupShaders() {
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@ -6,6 +6,7 @@
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#include <array>
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#include <cstddef>
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#include <map>
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#include <memory>
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#include <tuple>
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#include <utility>
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@ -168,14 +169,15 @@ private:
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ScreenInfo& screen_info;
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std::unique_ptr<GLShader::ProgramManager> shader_program_manager;
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OGLVertexArray sw_vao;
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OGLVertexArray hw_vao;
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std::map<std::array<Tegra::Engines::Maxwell3D::Regs::VertexAttribute,
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Tegra::Engines::Maxwell3D::Regs::NumVertexAttributes>,
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OGLVertexArray>
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vertex_array_cache;
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std::array<SamplerInfo, GLShader::NumTextureSamplers> texture_samplers;
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static constexpr size_t STREAM_BUFFER_SIZE = 128 * 1024 * 1024;
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OGLBufferCache buffer_cache;
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OGLBuffer uniform_buffer;
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OGLFramebuffer framebuffer;
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GLint uniform_buffer_alignment;
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