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dyncom: Use enum class for instruction decoding results
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parent
7e4fb4db19
commit
89540ea761
5 changed files with 40 additions and 41 deletions
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@ -414,14 +414,13 @@ const ISEITEM arm_exclusion_code[] = {
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{ "invalid", 0, INVALID, { 0 }}
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{ "invalid", 0, INVALID, { 0 }}
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};
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};
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int decode_arm_instr(u32 instr, s32* idx) {
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ARMDecodeStatus DecodeARMInstruction(u32 instr, s32* idx) {
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int n = 0;
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int n = 0;
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int base = 0;
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int base = 0;
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int ret = DECODE_FAILURE;
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int i = 0;
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int instr_slots = sizeof(arm_instruction) / sizeof(ISEITEM);
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int instr_slots = sizeof(arm_instruction) / sizeof(ISEITEM);
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ARMDecodeStatus ret = ARMDecodeStatus::FAILURE;
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for (i = 0; i < instr_slots; i++) {
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for (int i = 0; i < instr_slots; i++) {
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n = arm_instruction[i].attribute_value;
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n = arm_instruction[i].attribute_value;
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base = 0;
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base = 0;
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@ -438,11 +437,11 @@ int decode_arm_instr(u32 instr, s32* idx) {
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n--;
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n--;
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}
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}
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// All conditions is satisfied.
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// All conditions are satisfied.
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if (n == 0)
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if (n == 0)
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ret = DECODE_SUCCESS;
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ret = ARMDecodeStatus::SUCCESS;
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if (ret == DECODE_SUCCESS) {
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if (ret == ARMDecodeStatus::SUCCESS) {
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n = arm_exclusion_code[i].attribute_value;
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n = arm_exclusion_code[i].attribute_value;
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if (n != 0) {
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if (n != 0) {
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base = 0;
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base = 0;
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@ -454,13 +453,13 @@ int decode_arm_instr(u32 instr, s32* idx) {
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n--;
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n--;
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}
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}
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// All conditions is satisfied.
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// All conditions are satisfied.
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if (n == 0)
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if (n == 0)
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ret = DECODE_FAILURE;
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ret = ARMDecodeStatus::FAILURE;
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}
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}
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}
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}
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if (ret == DECODE_SUCCESS) {
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if (ret == ARMDecodeStatus::SUCCESS) {
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*idx = i;
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*idx = i;
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return ret;
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return ret;
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}
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}
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@ -6,13 +6,13 @@
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#include "common/common_types.h"
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#include "common/common_types.h"
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int decode_arm_instr(u32 instr, s32* idx);
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enum class ARMDecodeStatus {
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SUCCESS,
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enum DECODE_STATUS {
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FAILURE
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DECODE_SUCCESS,
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DECODE_FAILURE
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};
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};
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ARMDecodeStatus DecodeARMInstruction(u32 instr, s32* idx);
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struct instruction_set_encoding_item {
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struct instruction_set_encoding_item {
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const char *name;
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const char *name;
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int attribute_value;
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int attribute_value;
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@ -3468,10 +3468,10 @@ enum {
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FETCH_FAILURE
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FETCH_FAILURE
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};
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};
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static tdstate decode_thumb_instr(u32 inst, u32 addr, u32* arm_inst, u32* inst_size, ARM_INST_PTR* ptr_inst_base) {
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static ThumbDecodeStatus DecodeThumbInstruction(u32 inst, u32 addr, u32* arm_inst, u32* inst_size, ARM_INST_PTR* ptr_inst_base) {
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// Check if in Thumb mode
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// Check if in Thumb mode
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tdstate ret = thumb_translate (addr, inst, arm_inst, inst_size);
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ThumbDecodeStatus ret = TranslateThumbInstruction (addr, inst, arm_inst, inst_size);
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if (ret == t_branch) {
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if (ret == ThumbDecodeStatus::BRANCH) {
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int inst_index;
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int inst_index;
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int table_length = sizeof(arm_instruction_trans) / sizeof(transop_fp_t);
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int table_length = sizeof(arm_instruction_trans) / sizeof(transop_fp_t);
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u32 tinstr = GetThumbInstruction(inst, addr);
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u32 tinstr = GetThumbInstruction(inst, addr);
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@ -3509,7 +3509,7 @@ static tdstate decode_thumb_instr(u32 inst, u32 addr, u32* arm_inst, u32* inst_s
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*ptr_inst_base = arm_instruction_trans[inst_index](tinstr, inst_index);
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*ptr_inst_base = arm_instruction_trans[inst_index](tinstr, inst_index);
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break;
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break;
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default:
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default:
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ret = t_undefined;
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ret = ThumbDecodeStatus::UNDEFINED;
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break;
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break;
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}
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}
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}
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}
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@ -3542,20 +3542,19 @@ static int InterpreterTranslate(ARMul_State* cpu, int& bb_start, u32 addr) {
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inst = Memory::Read32(phys_addr & 0xFFFFFFFC);
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inst = Memory::Read32(phys_addr & 0xFFFFFFFC);
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size++;
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size++;
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// If we are in thumb instruction, we will translate one thumb to one corresponding arm instruction
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// If we are in Thumb mode, we'll translate one Thumb instruction to the corresponding ARM instruction
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if (cpu->TFlag) {
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if (cpu->TFlag) {
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uint32_t arm_inst;
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uint32_t arm_inst;
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tdstate state = decode_thumb_instr(inst, phys_addr, &arm_inst, &inst_size, &inst_base);
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ThumbDecodeStatus state = DecodeThumbInstruction(inst, phys_addr, &arm_inst, &inst_size, &inst_base);
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// We have translated the branch instruction of thumb in thumb decoder
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// We have translated the Thumb branch instruction in the Thumb decoder
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if(state == t_branch){
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if (state == ThumbDecodeStatus::BRANCH) {
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goto translated;
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goto translated;
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}
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}
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inst = arm_inst;
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inst = arm_inst;
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}
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}
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ret = decode_arm_instr(inst, &idx);
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if (DecodeARMInstruction(inst, &idx) == ARMDecodeStatus::FAILURE) {
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if (ret == DECODE_FAILURE) {
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std::string disasm = ARM_Disasm::Disassemble(phys_addr, inst);
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std::string disasm = ARM_Disasm::Disassemble(phys_addr, inst);
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LOG_ERROR(Core_ARM11, "Decode failure.\tPC : [0x%x]\tInstruction : %s [%x]", phys_addr, disasm.c_str(), inst);
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LOG_ERROR(Core_ARM11, "Decode failure.\tPC : [0x%x]\tInstruction : %s [%x]", phys_addr, disasm.c_str(), inst);
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LOG_ERROR(Core_ARM11, "cpsr=0x%x, cpu->TFlag=%d, r15=0x%x", cpu->Cpsr, cpu->TFlag, cpu->Reg[15]);
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LOG_ERROR(Core_ARM11, "cpsr=0x%x, cpu->TFlag=%d, r15=0x%x", cpu->Cpsr, cpu->TFlag, cpu->Reg[15]);
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@ -12,8 +12,8 @@
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// with the following Thumb instruction held in the high 16-bits. Passing in two Thumb instructions
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// with the following Thumb instruction held in the high 16-bits. Passing in two Thumb instructions
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// allows easier simulation of the special dual BL instruction.
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// allows easier simulation of the special dual BL instruction.
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tdstate thumb_translate(u32 addr, u32 instr, u32* ainstr, u32* inst_size) {
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ThumbDecodeStatus TranslateThumbInstruction(u32 addr, u32 instr, u32* ainstr, u32* inst_size) {
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tdstate valid = t_uninitialized;
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ThumbDecodeStatus valid = ThumbDecodeStatus::UNINITIALIZED;
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u32 tinstr = GetThumbInstruction(instr, addr);
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u32 tinstr = GetThumbInstruction(instr, addr);
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*ainstr = 0xDEADC0DE; // Debugging to catch non updates
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*ainstr = 0xDEADC0DE; // Debugging to catch non updates
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@ -351,21 +351,21 @@ tdstate thumb_translate(u32 addr, u32 instr, u32* ainstr, u32* inst_size) {
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else
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else
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*ainstr |= (tinstr & 0x00FF);
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*ainstr |= (tinstr & 0x00FF);
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} else if ((tinstr & 0x0F00) != 0x0E00)
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} else if ((tinstr & 0x0F00) != 0x0E00)
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valid = t_branch;
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valid = ThumbDecodeStatus::BRANCH;
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else // UNDEFINED : cc=1110(AL) uses different format
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else // UNDEFINED : cc=1110(AL) uses different format
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valid = t_undefined;
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valid = ThumbDecodeStatus::UNDEFINED;
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break;
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break;
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case 28: // B
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case 28: // B
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valid = t_branch;
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valid = ThumbDecodeStatus::BRANCH;
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break;
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break;
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case 29:
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case 29:
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if(tinstr & 0x1)
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if (tinstr & 0x1)
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valid = t_undefined;
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valid = ThumbDecodeStatus::UNDEFINED;
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else
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else
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valid = t_branch;
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valid = ThumbDecodeStatus::BRANCH;
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break;
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break;
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case 30: // BL instruction 1
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case 30: // BL instruction 1
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@ -374,7 +374,7 @@ tdstate thumb_translate(u32 addr, u32 instr, u32* ainstr, u32* inst_size) {
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// simulation simple (from the user perspective) we check if the following instruction is
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// simulation simple (from the user perspective) we check if the following instruction is
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// the second half of this BL, and if it is we simulate it immediately
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// the second half of this BL, and if it is we simulate it immediately
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valid = t_branch;
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valid = ThumbDecodeStatus::BRANCH;
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break;
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break;
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case 31: // BL instruction 2
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case 31: // BL instruction 2
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@ -383,7 +383,7 @@ tdstate thumb_translate(u32 addr, u32 instr, u32* ainstr, u32* inst_size) {
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// ever be matched with the fmt19 "BL instruction 1" instruction. However, we do allow the
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// ever be matched with the fmt19 "BL instruction 1" instruction. However, we do allow the
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// simulation of it on its own, with undefined results if r14 is not suitably initialised.
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// simulation of it on its own, with undefined results if r14 is not suitably initialised.
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valid = t_branch;
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valid = ThumbDecodeStatus::BRANCH;
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break;
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break;
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}
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}
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@ -28,14 +28,15 @@
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#include "common/common_types.h"
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#include "common/common_types.h"
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enum tdstate {
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enum class ThumbDecodeStatus {
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t_undefined, // Undefined Thumb instruction
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UNDEFINED, // Undefined Thumb instruction
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t_decoded, // Instruction decoded to ARM equivalent
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DECODED, // Instruction decoded to ARM equivalent
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t_branch, // Thumb branch (already processed)
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BRANCH, // Thumb branch (already processed)
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t_uninitialized,
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UNINITIALIZED,
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};
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};
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tdstate thumb_translate(u32 addr, u32 instr, u32* ainstr, u32* inst_size);
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// Translates a Thumb mode instruction into its ARM equivalent.
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ThumbDecodeStatus TranslateThumbInstruction(u32 addr, u32 instr, u32* ainstr, u32* inst_size);
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static inline u32 GetThumbInstruction(u32 instr, u32 address) {
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static inline u32 GetThumbInstruction(u32 instr, u32 address) {
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// Normally you would need to handle instruction endianness,
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// Normally you would need to handle instruction endianness,
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