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ThreadContext: Move from "core" to "arm_interface".
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parent
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commit
8b1e269e58
8 changed files with 26 additions and 37 deletions
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@ -8,15 +8,22 @@
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#include "core/arm/skyeye_common/arm_regformat.h"
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#include "core/arm/skyeye_common/arm_regformat.h"
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#include "core/arm/skyeye_common/vfp/asm_vfp.h"
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#include "core/arm/skyeye_common/vfp/asm_vfp.h"
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namespace Core {
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struct ThreadContext;
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}
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/// Generic ARM11 CPU interface
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/// Generic ARM11 CPU interface
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class ARM_Interface : NonCopyable {
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class ARM_Interface : NonCopyable {
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public:
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public:
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virtual ~ARM_Interface() {}
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virtual ~ARM_Interface() {}
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struct ThreadContext {
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u32 cpu_registers[13];
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u32 sp;
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u32 lr;
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u32 pc;
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u32 cpsr;
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u32 fpu_registers[64];
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u32 fpscr;
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u32 fpexc;
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};
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/**
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/**
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* Runs the CPU for the given number of instructions
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* Runs the CPU for the given number of instructions
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* @param num_instructions Number of instructions to run
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* @param num_instructions Number of instructions to run
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@ -124,13 +131,13 @@ public:
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* Saves the current CPU context
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* Saves the current CPU context
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* @param ctx Thread context to save
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* @param ctx Thread context to save
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*/
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*/
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virtual void SaveContext(Core::ThreadContext& ctx) = 0;
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virtual void SaveContext(ThreadContext& ctx) = 0;
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/**
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/**
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* Loads a CPU context
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* Loads a CPU context
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* @param ctx Thread context to load
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* @param ctx Thread context to load
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*/
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*/
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virtual void LoadContext(const Core::ThreadContext& ctx) = 0;
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virtual void LoadContext(const ThreadContext& ctx) = 0;
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/// Prepare core for thread reschedule (if needed to correctly handle state)
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/// Prepare core for thread reschedule (if needed to correctly handle state)
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virtual void PrepareReschedule() = 0;
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virtual void PrepareReschedule() = 0;
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@ -137,7 +137,7 @@ void ARM_Dynarmic::ExecuteInstructions(int num_instructions) {
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AddTicks(ticks_executed);
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AddTicks(ticks_executed);
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}
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}
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void ARM_Dynarmic::SaveContext(Core::ThreadContext& ctx) {
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void ARM_Dynarmic::SaveContext(ARM_Interface::ThreadContext& ctx) {
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memcpy(ctx.cpu_registers, jit->Regs().data(), sizeof(ctx.cpu_registers));
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memcpy(ctx.cpu_registers, jit->Regs().data(), sizeof(ctx.cpu_registers));
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memcpy(ctx.fpu_registers, jit->ExtRegs().data(), sizeof(ctx.fpu_registers));
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memcpy(ctx.fpu_registers, jit->ExtRegs().data(), sizeof(ctx.fpu_registers));
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@ -150,7 +150,7 @@ void ARM_Dynarmic::SaveContext(Core::ThreadContext& ctx) {
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ctx.fpexc = interpreter_state->VFP[VFP_FPEXC];
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ctx.fpexc = interpreter_state->VFP[VFP_FPEXC];
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}
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}
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void ARM_Dynarmic::LoadContext(const Core::ThreadContext& ctx) {
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void ARM_Dynarmic::LoadContext(const ARM_Interface::ThreadContext& ctx) {
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memcpy(jit->Regs().data(), ctx.cpu_registers, sizeof(ctx.cpu_registers));
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memcpy(jit->Regs().data(), ctx.cpu_registers, sizeof(ctx.cpu_registers));
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memcpy(jit->ExtRegs().data(), ctx.fpu_registers, sizeof(ctx.fpu_registers));
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memcpy(jit->ExtRegs().data(), ctx.fpu_registers, sizeof(ctx.fpu_registers));
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@ -10,10 +10,6 @@
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#include "core/arm/arm_interface.h"
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#include "core/arm/arm_interface.h"
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#include "core/arm/skyeye_common/armstate.h"
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#include "core/arm/skyeye_common/armstate.h"
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namespace Core {
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struct ThreadContext;
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}
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class ARM_Dynarmic final : public ARM_Interface {
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class ARM_Dynarmic final : public ARM_Interface {
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public:
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public:
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ARM_Dynarmic(PrivilegeMode initial_mode);
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ARM_Dynarmic(PrivilegeMode initial_mode);
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@ -33,8 +29,8 @@ public:
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void AddTicks(u64 ticks) override;
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void AddTicks(u64 ticks) override;
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void SaveContext(Core::ThreadContext& ctx) override;
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void SaveContext(ThreadContext& ctx) override;
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void LoadContext(const Core::ThreadContext& ctx) override;
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void LoadContext(const ThreadContext& ctx) override;
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void PrepareReschedule() override;
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void PrepareReschedule() override;
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void ExecuteInstructions(int num_instructions) override;
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void ExecuteInstructions(int num_instructions) override;
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@ -89,7 +89,7 @@ void ARM_DynCom::ExecuteInstructions(int num_instructions) {
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AddTicks(ticks_executed);
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AddTicks(ticks_executed);
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}
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}
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void ARM_DynCom::SaveContext(Core::ThreadContext& ctx) {
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void ARM_DynCom::SaveContext(ThreadContext& ctx) {
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memcpy(ctx.cpu_registers, state->Reg.data(), sizeof(ctx.cpu_registers));
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memcpy(ctx.cpu_registers, state->Reg.data(), sizeof(ctx.cpu_registers));
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memcpy(ctx.fpu_registers, state->ExtReg.data(), sizeof(ctx.fpu_registers));
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memcpy(ctx.fpu_registers, state->ExtReg.data(), sizeof(ctx.fpu_registers));
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@ -102,7 +102,7 @@ void ARM_DynCom::SaveContext(Core::ThreadContext& ctx) {
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ctx.fpexc = state->VFP[VFP_FPEXC];
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ctx.fpexc = state->VFP[VFP_FPEXC];
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}
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}
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void ARM_DynCom::LoadContext(const Core::ThreadContext& ctx) {
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void ARM_DynCom::LoadContext(const ThreadContext& ctx) {
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memcpy(state->Reg.data(), ctx.cpu_registers, sizeof(ctx.cpu_registers));
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memcpy(state->Reg.data(), ctx.cpu_registers, sizeof(ctx.cpu_registers));
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memcpy(state->ExtReg.data(), ctx.fpu_registers, sizeof(ctx.fpu_registers));
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memcpy(state->ExtReg.data(), ctx.fpu_registers, sizeof(ctx.fpu_registers));
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@ -10,10 +10,6 @@
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#include "core/arm/skyeye_common/arm_regformat.h"
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#include "core/arm/skyeye_common/arm_regformat.h"
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#include "core/arm/skyeye_common/armstate.h"
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#include "core/arm/skyeye_common/armstate.h"
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namespace Core {
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struct ThreadContext;
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}
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class ARM_DynCom final : public ARM_Interface {
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class ARM_DynCom final : public ARM_Interface {
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public:
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public:
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ARM_DynCom(PrivilegeMode initial_mode);
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ARM_DynCom(PrivilegeMode initial_mode);
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@ -36,8 +32,8 @@ public:
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void AddTicks(u64 ticks) override;
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void AddTicks(u64 ticks) override;
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void SaveContext(Core::ThreadContext& ctx) override;
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void SaveContext(ThreadContext& ctx) override;
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void LoadContext(const Core::ThreadContext& ctx) override;
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void LoadContext(const ThreadContext& ctx) override;
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void PrepareReschedule() override;
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void PrepareReschedule() override;
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void ExecuteInstructions(int num_instructions) override;
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void ExecuteInstructions(int num_instructions) override;
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@ -19,17 +19,6 @@ class AppLoader;
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namespace Core {
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namespace Core {
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struct ThreadContext {
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u32 cpu_registers[13];
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u32 sp;
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u32 lr;
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u32 pc;
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u32 cpsr;
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u32 fpu_registers[64];
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u32 fpscr;
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u32 fpexc;
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};
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class System {
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class System {
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public:
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public:
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/**
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/**
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@ -384,9 +384,9 @@ std::tuple<u32, u32, bool> GetFreeThreadLocalSlot(std::vector<std::bitset<8>>& t
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* @param entry_point Address of entry point for execution
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* @param entry_point Address of entry point for execution
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* @param arg User argument for thread
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* @param arg User argument for thread
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*/
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*/
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static void ResetThreadContext(Core::ThreadContext& context, u32 stack_top, u32 entry_point,
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static void ResetThreadContext(ARM_Interface::ThreadContext& context, u32 stack_top,
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u32 arg) {
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u32 entry_point, u32 arg) {
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memset(&context, 0, sizeof(Core::ThreadContext));
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memset(&context, 0, sizeof(ARM_Interface::ThreadContext));
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context.cpu_registers[0] = arg;
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context.cpu_registers[0] = arg;
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context.pc = entry_point;
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context.pc = entry_point;
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#include <boost/container/flat_map.hpp>
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#include <boost/container/flat_map.hpp>
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#include <boost/container/flat_set.hpp>
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#include <boost/container/flat_set.hpp>
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#include "common/common_types.h"
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#include "common/common_types.h"
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#include "core/arm/arm_interface.h"
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#include "core/core.h"
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#include "core/core.h"
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#include "core/hle/kernel/kernel.h"
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#include "core/hle/kernel/kernel.h"
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#include "core/hle/result.h"
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#include "core/hle/result.h"
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return !wait_objects.empty();
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return !wait_objects.empty();
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}
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}
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Core::ThreadContext context;
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ARM_Interface::ThreadContext context;
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u32 thread_id;
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u32 thread_id;
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