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GPU: Be robust against nullptr addresses; properly reset busy bits in the trigger registers.
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parent
279e19732c
commit
93d66475d4
1 changed files with 34 additions and 27 deletions
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@ -101,7 +101,8 @@ inline void Write(u32 addr, const T data) {
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const bool is_second_filler = (index != GPU_REG_INDEX(memory_fill_config[0].trigger));
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const bool is_second_filler = (index != GPU_REG_INDEX(memory_fill_config[0].trigger));
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auto& config = g_regs.memory_fill_config[is_second_filler];
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auto& config = g_regs.memory_fill_config[is_second_filler];
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if (config.address_start && config.trigger) {
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if (config.trigger) {
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if (config.address_start) { // Some games pass invalid values here
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u8* start = Memory::GetPhysicalPointer(config.GetStartAddress());
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u8* start = Memory::GetPhysicalPointer(config.GetStartAddress());
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u8* end = Memory::GetPhysicalPointer(config.GetEndAddress());
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u8* end = Memory::GetPhysicalPointer(config.GetEndAddress());
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@ -124,9 +125,6 @@ inline void Write(u32 addr, const T data) {
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LOG_TRACE(HW_GPU, "MemoryFill from 0x%08x to 0x%08x", config.GetStartAddress(), config.GetEndAddress());
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LOG_TRACE(HW_GPU, "MemoryFill from 0x%08x to 0x%08x", config.GetStartAddress(), config.GetEndAddress());
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config.trigger = 0;
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config.finished = 1;
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if (!is_second_filler) {
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if (!is_second_filler) {
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GSP_GPU::SignalInterrupt(GSP_GPU::InterruptId::PSC0);
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GSP_GPU::SignalInterrupt(GSP_GPU::InterruptId::PSC0);
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} else {
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} else {
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@ -135,6 +133,12 @@ inline void Write(u32 addr, const T data) {
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VideoCore::g_renderer->hw_rasterizer->NotifyFlush(config.GetStartAddress(), config.GetEndAddress() - config.GetStartAddress());
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VideoCore::g_renderer->hw_rasterizer->NotifyFlush(config.GetStartAddress(), config.GetEndAddress() - config.GetStartAddress());
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}
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}
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// Reset "trigger" flag and set the "finish" flag
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// NOTE: This was confirmed to happen on hardware even if "address_start" is zero.
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config.trigger = 0;
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config.finished = 1;
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}
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break;
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break;
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}
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}
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@ -270,6 +274,7 @@ inline void Write(u32 addr, const T data) {
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config.GetPhysicalOutputAddress(), output_width, output_height,
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config.GetPhysicalOutputAddress(), output_width, output_height,
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config.output_format.Value(), config.flags);
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config.output_format.Value(), config.flags);
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g_regs.display_transfer_config.trigger = 0;
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GSP_GPU::SignalInterrupt(GSP_GPU::InterruptId::PPF);
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GSP_GPU::SignalInterrupt(GSP_GPU::InterruptId::PPF);
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VideoCore::g_renderer->hw_rasterizer->NotifyFlush(config.GetPhysicalOutputAddress(), output_size);
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VideoCore::g_renderer->hw_rasterizer->NotifyFlush(config.GetPhysicalOutputAddress(), output_size);
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@ -285,6 +290,8 @@ inline void Write(u32 addr, const T data) {
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{
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{
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u32* buffer = (u32*)Memory::GetPhysicalPointer(config.GetPhysicalAddress());
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u32* buffer = (u32*)Memory::GetPhysicalPointer(config.GetPhysicalAddress());
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Pica::CommandProcessor::ProcessCommandList(buffer, config.size);
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Pica::CommandProcessor::ProcessCommandList(buffer, config.size);
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g_regs.command_processor_config.trigger = 0;
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}
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}
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break;
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break;
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}
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}
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