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https://github.com/archlinuxarm/PKGBUILDs.git
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core/gcc to 10.2.0-3
This commit is contained in:
parent
ccc6e5477a
commit
0261b76604
3 changed files with 238 additions and 1 deletions
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@ -19,7 +19,7 @@ pkgname=(gcc gcc-libs gcc-fortran gcc-objc gcc-go gcc-d)
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pkgver=10.2.0
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_majorver=${pkgver%%.*}
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_islver=0.21
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pkgrel=2
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pkgrel=3
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pkgdesc='The GNU Compiler Collection'
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arch=(x86_64)
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license=(GPL LGPL FDL custom)
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@ -35,6 +35,8 @@ source=(https://sourceware.org/pub/gcc/releases/gcc-${pkgver}/gcc-${pkgver}.tar.
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c89 c99
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gdc_phobos_path.patch
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fs64270.patch
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ipa-fix-bit-CPP-when-combined-with-IPA-bit-CP.patch
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ipa-fix-ICE-in-get_default_value.patch
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0001-ARMv5-disable-LDRD-STRD.patch)
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validpgpkeys=(F3691687D867B81B51CE07D9BBE43771487328A9 # bpiotrowski@archlinux.org
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86CFFCA918CF3AF47147588051E8B148A9999C34 # evangelos@foutrelis.com
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@ -47,6 +49,8 @@ sha256sums=('b8dd4368bb9c7f0b98188317ee0254dd8cc99d1e3a18d0ff146c855fe16c1d8c'
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'2513c6d9984dd0a2058557bf00f06d8d5181734e41dcfe07be7ed86f2959622a'
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'c86372c207d174c0918d4aedf1cb79f7fc093649eb1ad8d9450dccc46849d308'
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'1ef190ed4562c4db8c1196952616cd201cfdd788b65f302ac2cc4dabb4d72cee'
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'fcb11c9bcea320afd202b031b48f8750aeaedaa4b0c5dddcd2c0a16381e927e4'
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'42865f2af3f48140580c4ae70b6ea03b5bdca0f29654773ef0d42ce00d60ea16'
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'ac6663528a1cbea30ed9627ef41ef13f25b3cd49c31e22b45b04aa911e6f562f')
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prepare() {
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@ -75,6 +79,12 @@ prepare() {
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# https://bugs.archlinux.org/task/64270
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patch -p1 -i "$srcdir/fs64270.patch"
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# Fix a crash in mpv when mesa 20.2 is compiled with LTO
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# https://gitlab.freedesktop.org/mesa/mesa/-/issues/3239
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# https://gcc.gnu.org/bugzilla/show_bug.cgi?id=96482
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patch -Np1 -i ../ipa-fix-bit-CPP-when-combined-with-IPA-bit-CP.patch
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patch -Np1 -i ../ipa-fix-ICE-in-get_default_value.patch
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# ALARM: Specify build host types, triplet patch
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[[ $CARCH == "arm" ]] && CONFIGFLAG="--host=armv5tel-unknown-linux-gnueabi --build=armv5tel-unknown-linux-gnueabi --with-arch=armv5te --with-float=soft"
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[[ $CARCH == "armv6h" ]] && CONFIGFLAG="--host=armv6l-unknown-linux-gnueabihf --build=armv6l-unknown-linux-gnueabihf --with-arch=armv6 --with-float=hard --with-fpu=vfp"
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80
core/gcc/ipa-fix-ICE-in-get_default_value.patch
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80
core/gcc/ipa-fix-ICE-in-get_default_value.patch
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@ -0,0 +1,80 @@
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From f91770216eade83f068528c1e4f00e2ac3b23044 Mon Sep 17 00:00:00 2001
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From: Martin Liska <mliska@suse.cz>
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Date: Thu, 13 Aug 2020 09:38:41 +0200
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Subject: [PATCH] ipa: fix ICE in get_default_value
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The patch aligns code with ipcp_bits_lattice::set_to_constant
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where we properly mask m_value with m_mask. The same should
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be done here.
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gcc/ChangeLog:
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PR ipa/96482
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* ipa-cp.c (ipcp_bits_lattice::meet_with_1): Mask m_value
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with m_mask.
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gcc/testsuite/ChangeLog:
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PR ipa/96482
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* gcc.dg/ipa/pr96482-2.c: New test.
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---
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gcc/ipa-cp.c | 2 +-
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gcc/testsuite/gcc.dg/ipa/pr96482-2.c | 33 ++++++++++++++++++++++++++++
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2 files changed, 34 insertions(+), 1 deletion(-)
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create mode 100644 gcc/testsuite/gcc.dg/ipa/pr96482-2.c
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diff --git a/gcc/ipa-cp.c b/gcc/ipa-cp.c
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index 2b21280d919..e4910a04ffa 100644
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--- a/gcc/ipa-cp.c
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+++ b/gcc/ipa-cp.c
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@@ -1048,7 +1048,7 @@ ipcp_bits_lattice::meet_with_1 (widest_int value, widest_int mask,
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widest_int old_mask = m_mask;
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m_mask = (m_mask | mask) | (m_value ^ value);
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- m_value &= value;
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+ m_value &= ~m_mask;
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if (wi::sext (m_mask, precision) == -1)
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return set_to_bottom ();
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diff --git a/gcc/testsuite/gcc.dg/ipa/pr96482-2.c b/gcc/testsuite/gcc.dg/ipa/pr96482-2.c
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new file mode 100644
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index 00000000000..54b71ac4fc0
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--- /dev/null
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+++ b/gcc/testsuite/gcc.dg/ipa/pr96482-2.c
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@@ -0,0 +1,33 @@
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+/* PR ipa/96482 */
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+/* { dg-do compile } */
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+/* { dg-options "-O2" } */
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+
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+int i2c_transfer();
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+void _dev_err();
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+
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+struct i2c_msg {
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+ char bufaddr;
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+ int adapterdev;
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+} wdt87xx_i2c_xfer_client;
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+
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+int wdt87xx_i2c_xfer_client_0, wdt87xx_i2c_xfer_rxdata, wdt87xx_get_string_str_idx;
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+
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+void
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+static wdt87xx_i2c_xfer(void *txdata, unsigned rxlen) {
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+ struct i2c_msg msgs[] = {wdt87xx_i2c_xfer_client_0, rxlen,
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+ wdt87xx_i2c_xfer_rxdata};
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+ int error = i2c_transfer(wdt87xx_i2c_xfer_client, msgs);
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+ _dev_err("", __func__, error);
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+}
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+static void wdt87xx_get_string(unsigned len) {
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+ char tx_buf[] = {wdt87xx_get_string_str_idx, 3};
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+ int rx_len = len + 2;
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+ wdt87xx_i2c_xfer(tx_buf, rx_len);
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+}
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+
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+void
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+wdt87xx_ts_probe_tx_buf() {
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+ wdt87xx_get_string(34);
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+ wdt87xx_get_string(8);
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+ wdt87xx_i2c_xfer(wdt87xx_ts_probe_tx_buf, 2);
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+}
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--
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2.28.0
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147
core/gcc/ipa-fix-bit-CPP-when-combined-with-IPA-bit-CP.patch
Normal file
147
core/gcc/ipa-fix-bit-CPP-when-combined-with-IPA-bit-CP.patch
Normal file
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@ -0,0 +1,147 @@
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From d58f078ce2d53e5dab6b3d0d5f960504268e1894 Mon Sep 17 00:00:00 2001
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From: Martin Liska <mliska@suse.cz>
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Date: Wed, 12 Aug 2020 09:21:51 +0200
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Subject: [PATCH] ipa: fix bit CPP when combined with IPA bit CP
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As mentioned in the PR, let's consider the following example:
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int
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__attribute__((noinline))
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foo(int arg)
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{
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if (arg == 3)
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return 1;
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if (arg == 4)
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return 123;
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__builtin_unreachable ();
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}
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during WPA we find all calls of the function
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(yes the call with value 5 is UBSAN):
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Node: foo/0:
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param [0]: 5 [loc_time: 4, loc_size: 2, prop_time: 0, prop_size: 0]
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3 [loc_time: 3, loc_size: 3, prop_time: 0, prop_size: 0]
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ctxs: VARIABLE
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Bits: value = 0x5, mask = 0x6
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in LTRANS we have the following VRP info:
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# RANGE [3, 3] NONZERO 3
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when we AND masks in get_default_value we end up with 6 & 3 = 2 (0x010).
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That means the only second (least significant bit) is unknown and
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value (5 = 0x101) & ~mask gives us either 7 (0x111) or 5 (0x101).
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That's why if (arg_2(D) == 3) gets optimized to false.
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gcc/ChangeLog:
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PR ipa/96482
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* ipa-cp.c (ipcp_bits_lattice::meet_with_1): Drop value bits
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for bits that are unknown.
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(ipcp_bits_lattice::set_to_constant): Likewise.
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* tree-ssa-ccp.c (get_default_value): Add sanity check that
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IPA CP bit info has all bits set to zero in bits that
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are unknown.
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gcc/testsuite/ChangeLog:
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PR ipa/96482
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* gcc.dg/ipa/pr96482.c: New test.
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---
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gcc/ipa-cp.c | 3 +-
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gcc/testsuite/gcc.dg/ipa/pr96482.c | 44 ++++++++++++++++++++++++++++++
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gcc/tree-ssa-ccp.c | 3 ++
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3 files changed, 49 insertions(+), 1 deletion(-)
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create mode 100644 gcc/testsuite/gcc.dg/ipa/pr96482.c
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diff --git a/gcc/ipa-cp.c b/gcc/ipa-cp.c
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index 945a69977f3..2b21280d919 100644
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--- a/gcc/ipa-cp.c
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+++ b/gcc/ipa-cp.c
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@@ -1011,7 +1011,7 @@ ipcp_bits_lattice::set_to_constant (widest_int value, widest_int mask)
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{
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gcc_assert (top_p ());
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m_lattice_val = IPA_BITS_CONSTANT;
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- m_value = value;
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+ m_value = wi::bit_and (wi::bit_not (mask), value);
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m_mask = mask;
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return true;
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}
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@@ -1048,6 +1048,7 @@ ipcp_bits_lattice::meet_with_1 (widest_int value, widest_int mask,
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widest_int old_mask = m_mask;
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m_mask = (m_mask | mask) | (m_value ^ value);
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+ m_value &= value;
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if (wi::sext (m_mask, precision) == -1)
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return set_to_bottom ();
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diff --git a/gcc/testsuite/gcc.dg/ipa/pr96482.c b/gcc/testsuite/gcc.dg/ipa/pr96482.c
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new file mode 100644
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index 00000000000..68ead798d28
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--- /dev/null
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+++ b/gcc/testsuite/gcc.dg/ipa/pr96482.c
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@@ -0,0 +1,44 @@
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+/* PR ipa/96482 */
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+/* { dg-do run } */
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+/* { dg-options "-O2 -flto" } */
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+/* { dg-require-effective-target lto } */
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+
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+int
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+__attribute__((noinline))
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+foo(int arg)
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+{
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+ if (arg == 3)
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+ return 1;
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+ if (arg == 4)
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+ return 123;
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+
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+ __builtin_unreachable ();
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+}
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+
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+int
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+__attribute__((noinline))
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+baz(int x)
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+{
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+ if (x != 0)
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+ return foo(3); /* called */
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+
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+ return 1;
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+}
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+
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+int
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+__attribute__((noinline))
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+bar(int x)
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+{
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+ if (x == 0)
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+ return foo(5); /* not executed */
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+
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+ return 1;
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+}
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+
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+int main(int argc, char **argv)
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+{
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+ if (bar(argc) != baz(argc))
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+ __builtin_abort ();
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+
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+ return 0;
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+}
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diff --git a/gcc/tree-ssa-ccp.c b/gcc/tree-ssa-ccp.c
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index 7e3921869b8..65dffe06530 100644
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--- a/gcc/tree-ssa-ccp.c
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+++ b/gcc/tree-ssa-ccp.c
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@@ -306,6 +306,9 @@ get_default_value (tree var)
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{
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val.lattice_val = CONSTANT;
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val.value = value;
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+ widest_int ipa_value = wi::to_widest (value);
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+ /* Unknown bits from IPA CP must be equal to zero. */
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+ gcc_assert (wi::bit_and (ipa_value, mask) == 0);
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val.mask = mask;
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if (nonzero_bits != -1)
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val.mask &= extend_mask (nonzero_bits,
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--
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2.28.0
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