removed core/linux-mmp

This commit is contained in:
Kevin Mihelich 2022-02-06 21:24:00 +00:00
parent 27e7575d0c
commit ed50025185
12 changed files with 0 additions and 5898 deletions

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@ -1,339 +0,0 @@
From bea2c36629ed9c4c2ca35977331dc3479396aee7 Mon Sep 17 00:00:00 2001
From: Ashokkumar G <0xfee1dead.sa@gmail.com>
Date: Mon, 26 Jan 2015 11:03:08 -0700
Subject: [PATCH 1/9] clk:mmp: Adding clocks of pxa168 peripherals for gplugd
1. Adding peripherals register address information
2. Changing clock names for sd driver reference sdhci-pxav2
3. Changing clock names for Display (LCD) controller
Signed-off-by: Ashokkumar G <0xfee1dead.sa@gmail.com>
---
drivers/clk/mmp/clk-pxa168.c | 241 ++++++++++++++++++++++++++++++++++---------
1 file changed, 191 insertions(+), 50 deletions(-)
diff --git a/drivers/clk/mmp/clk-pxa168.c b/drivers/clk/mmp/clk-pxa168.c
index 014396b028a2..39a80fb2aefa 100644
--- a/drivers/clk/mmp/clk-pxa168.c
+++ b/drivers/clk/mmp/clk-pxa168.c
@@ -20,30 +20,137 @@
#include "clk.h"
-#define APBC_RTC 0x28
-#define APBC_TWSI0 0x2c
-#define APBC_KPC 0x30
-#define APBC_UART0 0x0
-#define APBC_UART1 0x4
-#define APBC_GPIO 0x8
-#define APBC_PWM0 0xc
-#define APBC_PWM1 0x10
-#define APBC_PWM2 0x14
-#define APBC_PWM3 0x18
-#define APBC_SSP0 0x81c
-#define APBC_SSP1 0x820
-#define APBC_SSP2 0x84c
-#define APBC_SSP3 0x858
-#define APBC_SSP4 0x85c
-#define APBC_TWSI1 0x6c
-#define APBC_UART2 0x70
-#define APMU_SDH0 0x54
-#define APMU_SDH1 0x58
-#define APMU_USB 0x5c
-#define APMU_DISP0 0x4c
-#define APMU_CCIC0 0x50
-#define APMU_DFC 0x60
-#define MPMU_UART_PLL 0x14
+#define APBC_UART0 0x0000
+#define APBC_UART1 0x0004
+#define APBC_GPIO 0x0008
+#define APBC_PWM0 0x000c
+#define APBC_PWM1 0x0010
+#define APBC_PWM2 0x0014
+#define APBC_PWM3 0x0018
+#define APBC_RTC 0x0028
+#define APBC_TWSI0 0x002c
+#define APBC_KPC 0x0030
+#define APBC_TWSI1 0x006c
+#define APBC_UART2 0x0070
+#define APBC_SSP0 0x081c
+#define APBC_SSP1 0x0820
+#define APBC_SSP2 0x084c
+#define APBC_SSP3 0x0858
+#define APBC_SSP4 0x085c
+
+#define APBC_UART1_CLK_RST 0x0000 /*UART1 Clock/Reset Control*/
+#define APBC_UART2_CLK_RST 0x0004 /*UART2 Clock/Reset Control*/
+#define APBC_GPIO_CLK_RST 0x0008 /*GPIO Clock/Reset Control*/
+#define APBC_PWM1_CLK_RST 0x000C /*PWM1 Clock/Reset Control*/
+#define APBC_PWM2_CLK_RST 0x0010 /*PWM2 Clock/Reset Control*/
+#define APBC_PWM3_CLK_RST 0x0014 /*PWM3 Clock/Reset Control*/
+#define APBC_PWM4_CLK_RST 0x0018 /*PWM4 Clock/Reset Control*/
+#define APBC_RTC_CLK_RST 0x0028 /*RTC Clock/Reset Control*/
+#define APBC_TWSI0_CLK_RST 0x002C /*TWSI0 Clock/Reset Control*/
+#define APBC_KPC_CLK_RST 0x0030 /*Keypad Controller Clock/Reset
+ Control*/
+#define APBC_TIMERS_CLK_RST 0x0034 /*Timers Clock/Reset Control*/
+#define APBC_AIB_CLK_RST 0x003C /*AIB Clock/Reset Control*/
+#define APBC_SW_JTAG_CLK_RST 0x0040 /*Software emulated JTAG
+ Clock/Reset Control*/
+#define APBC_ONEWIRE_CLK_RST 0x0048 /*OneWire Clock/Reset
+ Control*/
+#define APBC_PWR_TWSI_CLK_RST 0x006C /*PWR_TWSI Clock/Reset
+ Control*/
+#define APBC_UART3_CLK_RST 0x0070 /*UART3 Clock/Reset Control*/
+#define APBC_AC97_CLK_RST 0x0084 /*AC97 Clock/Reset Control*/
+
+#define APBC_SSP0_CLK_RST 0x081C /*SSP1 Clock/Reset Control*/
+#define APBC_SSP1_CLK_RST 0x0820 /*SSP2 Clock/Reset Control*/
+#define APBC_SSP2_CLK_RST 0x084C /*SSP3 Clock/Reset Control*/
+#define APBC_SSP3_CLK_RST 0x0858 /*SSP4 Clock/Reset Control*/
+#define APBC_SSP4_CLK_RST 0x085C /*SSP5 Clock/Reset Control*/
+
+#define MPMU_UART_PLL 0x0014
+
+#define APMU_CCIC_GATE 0x0028
+#define APMU_IRE 0x0048
+#define APMU_DISP0 0x004c
+#define APMU_CCIC0 0x0050
+#define APMU_SDH0 0x0054
+#define APMU_SDH1 0x0058
+#define APMU_USB 0x005c
+#define APMU_DFC 0x0060
+#define APMU_DMA 0x0064
+#define APMU_GEU 0x0068
+#define APMU_BUS 0x006c
+#define APMU_WAKE_CLR 0x007c
+#define APMU_CCIC_DBG 0x0088
+#define APMU_GC 0x00cc
+#define APMU_GC_PD 0x00d0
+#define APMU_SMC 0x00d4
+#define APMU_SDH2 0x00e0
+#define APMU_SDH3 0x00e4
+#define APMU_CF 0x00f0
+#define APMU_ICR 0x00f8
+#define APMU_ETH 0x00fc
+
+#define APMU_PCR 0x0000
+#define APMU_CCR 0x0004
+#define APMU_CCSR 0x000c
+#define APMU_FC_TIMER 0x0010
+#define APMU_CP_IDLE_CFG 0x0014 /*Not listed in PXA16X
+ Document*/
+#define APMU_IDLE_CFG 0x0018
+#define APMU_LCD_CLK_RES_CTRL 0x004c
+#define APMU_CCIC_CLK_RES_CTRL 0x0050
+#define APMU_SDH0_CLK_RES_CTRL 0x0054 /*SD1*/
+#define APMU_SDH1_CLK_RES_CTRL 0x0058 /*SD2*/
+#define APMU_SDH2_CLK_RES_CTRL 0x00e0 /*SD3*/
+#define APMU_SDH3_CLK_RES_CTRL 0x00e4 /*SD4*/
+#define APMU_USB_CLK_RES_CTRL 0x005c
+#define APMU_NFC_CLK_RES_CTRL 0x0060 /*NAND Flash Controller
+ Clock/Reset*/
+#define APMU_DMA_CLK_RES_CTRL 0x0064 /*DMA Clock/Reset Control*/
+#define APMU_BUS_CLK_RES_CTRL 0x006c /*Bus Clock/Reste Control*/
+#define APMU_WAKE_CLK 0x007c /*Wake Clear*/
+#define APMU_PWR_STBL_TIMER 0x0084 /*Not listed in PXA16X
+ Document*/
+#define APMU_SRAM_PWR_DWN 0x008c /*Not listed in PXA16X
+ Document*/
+#define APMU_CORE_STATUS 0x0090 /*Core Status*/
+#define APMU_RES_FRM_SLP_CLR 0x0094 /*Resume from Sleep clear*/
+#define APMU_IMR 0x0098 /*PMU Interrupt Mask*/
+#define APMU_IRWC 0x009c /*Interrupt RD/WR Clear*/
+#define APMU_ISR 0x00a0 /*Interrupt Status*/
+#define APMU_DX8_CLK_RES_CTRL 0x00a4 /*Not listed in PXA16X
+ Document*/
+#define APMU_DTC_CLK_RES_CTRL 0x00ac /*Not listed in PXA16X
+ Document*/
+#define APMU_MC_HW_SLP_TYPE 0x00b0 /*Memory Controller Hardware
+ Sleep Type*/
+#define APMU_MC_SLP_REQ 0x00b4 /*Memory Controller Sleep
+ Request*/
+#define APMU_MC_SW_SLP_TYPE 0x00c0 /*Memory Controller Software
+ Sleep Type*/
+#define APMU_PLL_SEL_STATUS 0x00c4 /*PLL Clock select status*/
+#define APMU_SYNC_MODE_BYPASS 0x00c8 /*Sync Mode Bypass*/
+#define APMU_GC_CLK_RES_CTRL 0x00cc /*GC300 2D Graphics Controller
+ Clock/Reset control*/
+#define APMU_SMC_CLK_RES_CTRL 0x00d4 /*Static Memory controller
+ Clock/Reset control*/
+#define APMU_XD_CLK_RES_CTRL 0x00dc /*XD Controller clock/reset
+ control*/
+#define APMU_CF_CLK_RES_CTRL 0x00f0 /*Compact Flash controller
+ clock/reset control*/
+#define APMU_MSP_CLK_RES_CTRL 0x00f4 /*Memory Stick Pro clock/reset
+ control*/
+#define APMU_CMU_CLK_RES_CTRL 0x00f8 /*CMU clock/reset control*/
+#define APMU_MFU_CLK_RES_CTRL 0x00fc /*FE(Fast Ethernet)
+ clock/reset control*/
+#define APMU_PCIe_CLK_RES_CTRL 0x0100 /*PCIe clock/reset control*/
+#define APMU_EPD_CLK_RES_CTRL 0x0104 /*EPD clock/reset control*/
+
+#define APMU_GC_156M 0x0
+#define APMU_GC_312M 0x40
+#define APMU_GC_PLL2 0x80
+#define APMU_GC_PLL2_DIV2 0xc0
+#define APMU_GC_624M 0xc0 /* added according to Aspen SW spec v2.8*/
static DEFINE_SPINLOCK(clk_lock);
@@ -235,11 +342,11 @@ void __init pxa168_clk_init(void)
ARRAY_SIZE(ssp_parent),
CLK_SET_RATE_PARENT | CLK_SET_RATE_NO_REPARENT,
apbc_base + APBC_SSP0, 4, 3, 0, &clk_lock);
- clk_register_clkdev(clk, "uart_mux.0", NULL);
+ clk_register_clkdev(clk, "ssp_mux.0", NULL);
clk = mmp_clk_register_apbc("ssp0", "ssp0_mux", apbc_base + APBC_SSP0,
- 10, 0, &clk_lock);
- clk_register_clkdev(clk, NULL, "mmp-ssp.0");
+ 0, 0, &clk_lock);
+ clk_register_clkdev(clk, NULL, "pxa168-ssp.0");
clk = clk_register_mux(NULL, "ssp1_mux", ssp_parent,
ARRAY_SIZE(ssp_parent),
@@ -248,8 +355,8 @@ void __init pxa168_clk_init(void)
clk_register_clkdev(clk, "ssp_mux.1", NULL);
clk = mmp_clk_register_apbc("ssp1", "ssp1_mux", apbc_base + APBC_SSP1,
- 10, 0, &clk_lock);
- clk_register_clkdev(clk, NULL, "mmp-ssp.1");
+ 0, 0, &clk_lock);
+ clk_register_clkdev(clk, NULL, "pxa168-ssp.1");
clk = clk_register_mux(NULL, "ssp2_mux", ssp_parent,
ARRAY_SIZE(ssp_parent),
@@ -257,9 +364,9 @@ void __init pxa168_clk_init(void)
apbc_base + APBC_SSP2, 4, 3, 0, &clk_lock);
clk_register_clkdev(clk, "ssp_mux.2", NULL);
- clk = mmp_clk_register_apbc("ssp2", "ssp1_mux", apbc_base + APBC_SSP2,
- 10, 0, &clk_lock);
- clk_register_clkdev(clk, NULL, "mmp-ssp.2");
+ clk = mmp_clk_register_apbc("ssp2", "ssp2_mux", apbc_base + APBC_SSP2,
+ 0, 0, &clk_lock);
+ clk_register_clkdev(clk, NULL, "pxa168-ssp.2");
clk = clk_register_mux(NULL, "ssp3_mux", ssp_parent,
ARRAY_SIZE(ssp_parent),
@@ -267,9 +374,9 @@ void __init pxa168_clk_init(void)
apbc_base + APBC_SSP3, 4, 3, 0, &clk_lock);
clk_register_clkdev(clk, "ssp_mux.3", NULL);
- clk = mmp_clk_register_apbc("ssp3", "ssp1_mux", apbc_base + APBC_SSP3,
- 10, 0, &clk_lock);
- clk_register_clkdev(clk, NULL, "mmp-ssp.3");
+ clk = mmp_clk_register_apbc("ssp3", "ssp3_mux", apbc_base + APBC_SSP3,
+ 0, 0, &clk_lock);
+ clk_register_clkdev(clk, NULL, "pxa168-ssp.3");
clk = clk_register_mux(NULL, "ssp4_mux", ssp_parent,
ARRAY_SIZE(ssp_parent),
@@ -277,9 +384,9 @@ void __init pxa168_clk_init(void)
apbc_base + APBC_SSP4, 4, 3, 0, &clk_lock);
clk_register_clkdev(clk, "ssp_mux.4", NULL);
- clk = mmp_clk_register_apbc("ssp4", "ssp1_mux", apbc_base + APBC_SSP4,
- 10, 0, &clk_lock);
- clk_register_clkdev(clk, NULL, "mmp-ssp.4");
+ clk = mmp_clk_register_apbc("ssp4", "ssp4_mux", apbc_base + APBC_SSP4,
+ 0, 0, &clk_lock);
+ clk_register_clkdev(clk, NULL, "pxa168-ssp.4");
clk = mmp_clk_register_apmu("dfc", "pll1_4", apmu_base + APMU_DFC,
0x19b, &clk_lock);
@@ -291,9 +398,9 @@ void __init pxa168_clk_init(void)
apmu_base + APMU_SDH0, 6, 1, 0, &clk_lock);
clk_register_clkdev(clk, "sdh0_mux", NULL);
- clk = mmp_clk_register_apmu("sdh0", "sdh_mux", apmu_base + APMU_SDH0,
+ clk = mmp_clk_register_apmu("sdh0", "sdh0_mux", apmu_base + APMU_SDH0,
0x1b, &clk_lock);
- clk_register_clkdev(clk, NULL, "sdhci-pxa.0");
+ clk_register_clkdev(clk, NULL, "sdhci-pxav2.0");
clk = clk_register_mux(NULL, "sdh1_mux", sdh_parent,
ARRAY_SIZE(sdh_parent),
@@ -303,29 +410,59 @@ void __init pxa168_clk_init(void)
clk = mmp_clk_register_apmu("sdh1", "sdh1_mux", apmu_base + APMU_SDH1,
0x1b, &clk_lock);
- clk_register_clkdev(clk, NULL, "sdhci-pxa.1");
+ clk_register_clkdev(clk, NULL, "sdhci-pxav2.1");
- clk = mmp_clk_register_apmu("usb", "usb_pll", apmu_base + APMU_USB,
- 0x9, &clk_lock);
- clk_register_clkdev(clk, "usb_clk", NULL);
+ clk = clk_register_mux(NULL, "sdh2_mux", sdh_parent,
+ ARRAY_SIZE(sdh_parent),
+ CLK_SET_RATE_PARENT | CLK_SET_RATE_NO_REPARENT,
+ apmu_base + APMU_SDH2, 6, 1, 0, &clk_lock);
+ clk_register_clkdev(clk, "sdh2_mux", NULL);
+
+ clk = mmp_clk_register_apmu("sdh2", "sdh2_mux", apmu_base + APMU_SDH2,
+ 0x1b, &clk_lock);
+ clk_register_clkdev(clk, NULL, "sdhci-pxav2.2");
+
+ clk = clk_register_mux(NULL, "sdh3_mux", sdh_parent,
+ ARRAY_SIZE(sdh_parent),
+ CLK_SET_RATE_PARENT | CLK_SET_RATE_NO_REPARENT,
+ apmu_base + APMU_SDH3, 6, 1, 0, &clk_lock);
+ clk_register_clkdev(clk, "sdh3_mux", NULL);
- clk = mmp_clk_register_apmu("sph", "usb_pll", apmu_base + APMU_USB,
+ clk = mmp_clk_register_apmu("sdh3", "sdh3_mux", apmu_base + APMU_SDH3,
+ 0x1b, &clk_lock);
+ clk_register_clkdev(clk, NULL, "sdhci-pxav2.3");
+
+ clk = mmp_clk_register_apmu("sph", "pxa-sph", apmu_base + APMU_USB,
0x12, &clk_lock);
- clk_register_clkdev(clk, "sph_clk", NULL);
+ clk_register_clkdev(clk, NULL, "pxa-sph");
+
+ clk = mmp_clk_register_apmu("usb", "pxa-u2oehci", apmu_base + APMU_USB,
+ 0x09, &clk_lock);
+ clk_register_clkdev(clk, NULL, "pxa-u2oehci");
- clk = clk_register_mux(NULL, "disp0_mux", disp_parent,
+ clk = clk_register_mux(NULL, "LCDCLK", disp_parent,
+ ARRAY_SIZE(disp_parent),
+ CLK_SET_RATE_PARENT | CLK_SET_RATE_NO_REPARENT,
+ apmu_base + APMU_DISP0, 0, 7, 0, &clk_lock);
+ clk_register_clkdev(clk, "LCDCLK", NULL);
+
+ /*clk = clk_register_mux(NULL, "disp0_mux", disp_parent,
ARRAY_SIZE(disp_parent),
CLK_SET_RATE_PARENT | CLK_SET_RATE_NO_REPARENT,
apmu_base + APMU_DISP0, 6, 1, 0, &clk_lock);
- clk_register_clkdev(clk, "disp_mux.0", NULL);
+ clk_register_clkdev(clk, "disp_mux.0", NULL);*/
+
+ clk = mmp_clk_register_apmu("disp0", "LCDCLK",
+ apmu_base + APMU_DISP0, 0x7f, &clk_lock);
+ clk_register_clkdev(clk, NULL, "pxa168-fb");
- clk = mmp_clk_register_apmu("disp0", "disp0_mux",
+ /*clk = mmp_clk_register_apmu("disp0", "disp0_mux",
apmu_base + APMU_DISP0, 0x1b, &clk_lock);
clk_register_clkdev(clk, "fnclk", "mmp-disp.0");
clk = mmp_clk_register_apmu("disp0_hclk", "disp0_mux",
apmu_base + APMU_DISP0, 0x24, &clk_lock);
- clk_register_clkdev(clk, "hclk", "mmp-disp.0");
+ clk_register_clkdev(clk, "hclk", "mmp-disp.0");*/
clk = clk_register_mux(NULL, "ccic0_mux", ccic_parent,
ARRAY_SIZE(ccic_parent),
@@ -355,4 +492,8 @@ void __init pxa168_clk_init(void)
clk = mmp_clk_register_apmu("ccic0_sphy", "ccic0_sphy_div",
apmu_base + APMU_CCIC0, 0x300, &clk_lock);
clk_register_clkdev(clk, "sphyclk", "mmp-ccic.0");
+
+ clk = mmp_clk_register_apmu("eth", "pxa168-eth", apmu_base + APMU_ETH,
+ 0x9, &clk_lock);
+ clk_register_clkdev(clk, NULL, "pxa168-eth");
}
--
2.14.1

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@ -1,53 +0,0 @@
From 7797bb206e2f41653422cd93f0773090e8b7b830 Mon Sep 17 00:00:00 2001
From: Ashokkumar G <0xfee1dead.sa@gmail.com>
Date: Mon, 27 Jan 2014 09:26:20 -0700
Subject: [PATCH 2/9] arch:arm:mmp: initialize gpio driver before other drivers
Add gpio driver for pxa168 based gplugd before adding other
peripheral drivers to boot properly.
Add I2C information while initializing TWSI
---
arch/arm/mach-mmp/gplugd.c | 13 +++++++++----
1 file changed, 9 insertions(+), 4 deletions(-)
diff --git a/arch/arm/mach-mmp/gplugd.c b/arch/arm/mach-mmp/gplugd.c
index d81b2475e67e..83a7019b14f9 100644
--- a/arch/arm/mach-mmp/gplugd.c
+++ b/arch/arm/mach-mmp/gplugd.c
@@ -133,6 +133,10 @@ static struct pxa_gpio_platform_data pxa168_gpio_pdata = {
.irq_base = MMP_GPIO_TO_IRQ(0),
};
+static struct i2c_pxa_platform_data i2c_info __initdata = {
+ .use_pio = 1,
+};
+
static struct i2c_board_info gplugd_i2c_board_info[] = {
{
.type = "isl1208",
@@ -184,16 +188,17 @@ static void __init select_disp_freq(void)
static void __init gplugd_init(void)
{
mfp_config(ARRAY_AND_SIZE(gplugd_pin_config));
+ platform_device_add_data(&pxa168_device_gpio, &pxa168_gpio_pdata,
+ sizeof(struct pxa_gpio_platform_data));
+ platform_device_register(&pxa168_device_gpio);
select_disp_freq();
/* on-chip devices */
pxa168_add_uart(3);
pxa168_add_ssp(1);
- pxa168_add_twsi(0, NULL, ARRAY_AND_SIZE(gplugd_i2c_board_info));
- platform_device_add_data(&pxa168_device_gpio, &pxa168_gpio_pdata,
- sizeof(struct pxa_gpio_platform_data));
- platform_device_register(&pxa168_device_gpio);
+
+ pxa168_add_twsi(0, &i2c_info, ARRAY_AND_SIZE(gplugd_i2c_board_info));
pxa168_add_eth(&gplugd_eth_platform_data);
}
--
2.14.1

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@ -1,93 +0,0 @@
From 9d30bb9e947f0a97fe9d96090d2bc001faf99e75 Mon Sep 17 00:00:00 2001
From: Ashokkumar G <0xfee1dead.sa@gmail.com>
Date: Mon, 27 Jan 2014 09:47:06 -0700
Subject: [PATCH 3/9] arch:arm:mmp: Adding spi master and mtd dataflash for
gplugd
1. Adding SPI master for gplugd
2. Adding atmel mtd dataflash on SPI for gplugd
---
arch/arm/mach-mmp/gplugd.c | 48 ++++++++++++++++++++++++++++++++++++++++++++++
1 file changed, 48 insertions(+)
diff --git a/arch/arm/mach-mmp/gplugd.c b/arch/arm/mach-mmp/gplugd.c
index 83a7019b14f9..9c441e1b3159 100644
--- a/arch/arm/mach-mmp/gplugd.c
+++ b/arch/arm/mach-mmp/gplugd.c
@@ -12,6 +12,8 @@
#include <linux/platform_device.h>
#include <linux/gpio.h>
#include <linux/gpio-pxa.h>
+#include <linux/spi/spi.h>
+#include <linux/spi/pxa2xx_spi.h>
#include <asm/mach/arch.h>
#include <asm/mach-types.h>
@@ -185,6 +187,46 @@ static void __init select_disp_freq(void)
}
}
+static struct pxa2xx_spi_master pxa_ssp_master_info = {
+ .num_chipselect = 1,
+ .enable_dma = 1,
+};
+
+static struct pxa2xx_spi_chip AT45DB041D_spi_info = {
+ .tx_threshold = 1,
+ .rx_threshold = 1,
+ .timeout = 1000,
+ .gpio_cs = 110
+};
+
+static struct spi_board_info __initdata gplugD_spi_board_info[] = {
+ {
+ .modalias = "mtd_dataflash",
+ .mode = SPI_MODE_0,
+ .max_speed_hz = 260000,
+ .bus_num = 2,
+ .chip_select = 0,
+ .platform_data = NULL,
+ .controller_data = &AT45DB041D_spi_info,
+ .irq = -1,
+ },
+};
+
+static inline int pxa168_add_spi(int id, struct pxa2xx_spi_master *pdata)
+{
+ struct platform_device *pd;
+
+ pd = platform_device_alloc("pxa2xx-spi", id);
+ if (pd == NULL) {
+ pr_err("pxa2xx-spi: failed to allocate device (id=%d)\n", id);
+ return -ENOMEM;
+ }
+
+ platform_device_add_data(pd, pdata, sizeof(*pdata));
+
+ return platform_device_add(pd);
+}
+
static void __init gplugd_init(void)
{
mfp_config(ARRAY_AND_SIZE(gplugd_pin_config));
@@ -196,11 +238,17 @@ static void __init gplugd_init(void)
/* on-chip devices */
pxa168_add_uart(3);
+
pxa168_add_ssp(1);
pxa168_add_twsi(0, &i2c_info, ARRAY_AND_SIZE(gplugd_i2c_board_info));
pxa168_add_eth(&gplugd_eth_platform_data);
+
+ pxa168_add_ssp(2);
+
+ pxa168_add_spi(2, &pxa_ssp_master_info);
+ spi_register_board_info(gplugD_spi_board_info, ARRAY_SIZE(gplugD_spi_board_info));
}
MACHINE_START(GPLUGD, "PXA168-based GuruPlug Display (gplugD) Platform")
--
2.14.1

View file

@ -1,34 +0,0 @@
From 3808257bfc402bc170581f2151959846d80996be Mon Sep 17 00:00:00 2001
From: Ashokkumar G <0xfee1dead.sa@gmail.com>
Date: Mon, 26 Jan 2015 11:08:19 -0700
Subject: [PATCH 4/9] drivers:spi: Adding mmp dependency for SPI_PXA2XX
adding arch_mmp dependency for SPI_PXA2XX as pxa168 based gplugd
uses SPI_PXA2XX
resolving compilation error of multiple definitions of ssp functions
pxa_ssp_request, pxa_ssp_free from plat-pxa/ssp.c and include/linux/pxa2xx_ssp.h
Signed-off-by: Ashokkumar G <0xfee1dead.sa@gmail.com>
---
drivers/spi/Kconfig | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig
index 84e7c9e6ccef..caa969f64ff4 100644
--- a/drivers/spi/Kconfig
+++ b/drivers/spi/Kconfig
@@ -383,8 +383,8 @@ config SPI_PXA2XX_DMA
config SPI_PXA2XX
tristate "PXA2xx SSP SPI master"
- depends on (ARCH_PXA || PCI || ACPI)
- select PXA_SSP if ARCH_PXA
+ depends on (ARCH_PXA || ARCH_MMP || PCI || ACPI)
+ select PXA_SSP if (ARCH_PXA || ARCH_MMP)
help
This enables using a PXA2xx or Sodaville SSP port as a SPI master
controller. The driver can be configured to use any SSP port and
--
2.14.1

View file

@ -1,223 +0,0 @@
From d4c023f35d95eb676b0dce610e35b0c2cce274ca Mon Sep 17 00:00:00 2001
From: Ashokkumar G <0xfee1dead.sa@gmail.com>
Date: Mon, 26 Jan 2015 11:28:52 -0700
Subject: [PATCH 5/9] mmp:ethernet: Adding ethernet MAC address reading for
gplugd
Currently Marvell's pxa168 ethernet driver uses random MAC address
by default instead of reading MAC address from OTP SPI flash.
Adding support to uses MAC address provided instead of random MAC
address by default
Signed-off-by: Ashokkumar G <0xfee1dead.sa@gmail.com>
---
arch/arm/mach-mmp/gplugd.c | 132 ++++++++++++++++++++++++------
drivers/net/ethernet/marvell/pxa168_eth.c | 5 ++
include/linux/pxa168_eth.h | 3 +
3 files changed, 116 insertions(+), 24 deletions(-)
diff --git a/arch/arm/mach-mmp/gplugd.c b/arch/arm/mach-mmp/gplugd.c
index 9c441e1b3159..2981c8878ee7 100644
--- a/arch/arm/mach-mmp/gplugd.c
+++ b/arch/arm/mach-mmp/gplugd.c
@@ -22,6 +22,8 @@
#include <mach/pxa168.h>
#include <mach/mfp-pxa168.h>
+#include <uapi/linux/ethtool.h>
+#include <linux/etherdevice.h>
#include "common.h"
static unsigned long gplugd_pin_config[] __initdata = {
@@ -146,27 +148,6 @@ static struct i2c_board_info gplugd_i2c_board_info[] = {
}
};
-/* Bring PHY out of reset by setting GPIO 104 */
-static int gplugd_eth_init(void)
-{
- if (unlikely(gpio_request(104, "ETH_RESET_N"))) {
- printk(KERN_ERR "Can't get hold of GPIO 104 to bring Ethernet "
- "PHY out of reset\n");
- return -EIO;
- }
-
- gpio_direction_output(104, 1);
- gpio_free(104);
- return 0;
-}
-
-struct pxa168_eth_platform_data gplugd_eth_platform_data = {
- .port_number = 0,
- .phy_addr = 0,
- .speed = 0, /* Autonagotiation */
- .init = gplugd_eth_init,
-};
-
static void __init select_disp_freq(void)
{
/* set GPIO 35 & clear GPIO 85 to set LCD External Clock to 74.25 MHz */
@@ -227,6 +208,108 @@ static inline int pxa168_add_spi(int id, struct pxa2xx_spi_master *pdata)
return platform_device_add(pd);
}
+#ifdef CONFIG_MTD
+static void gplugd_parse_enetaddr(const u8 *addr, u8 *enetaddr)
+{
+ char *end;
+ int i;
+
+ for (i = 0; i < 6; ++i) {
+ enetaddr[i] = addr ? simple_strtoul(addr, &end, 16) : 0;
+ if (addr)
+ addr = (*end) ? end + 1 : end;
+ }
+}
+
+static struct pxa168_eth_platform_data gplugd_eth_platform_data;
+
+static void __init read_device_serial_mac(void)
+{
+#define GPLUGD_SERIAL_NUM_LENGTH 14
+#define GPLUGD_MAC_ADDR_LENGTH 18
+ char otp_serial_num[GPLUGD_SERIAL_NUM_LENGTH];
+ char otp_mac_addr[GPLUGD_MAC_ADDR_LENGTH];
+ u8 *mac_addr = gplugd_eth_platform_data.mac_addr;
+ size_t retlen;
+ struct mtd_info *mtd = NULL;
+
+ mtd = get_mtd_device(NULL, 0x00);
+
+ if (!mtd) {
+ pr_err("%s %d: No MTD devices found", __func__, __LINE__);
+ return;
+ }
+
+ if (mtd->_read_user_prot_reg) {
+ if (!mtd->_read_user_prot_reg(mtd, 0, GPLUGD_SERIAL_NUM_LENGTH,
+ &retlen, otp_serial_num)) {
+ if (!mtd->_read_user_prot_reg(mtd,
+ GPLUGD_SERIAL_NUM_LENGTH,
+ GPLUGD_MAC_ADDR_LENGTH,
+ &retlen, otp_mac_addr)) {
+
+ gplugd_parse_enetaddr(otp_mac_addr, mac_addr);
+ } else {
+ pr_err("%s %d: OTP MAC Address read failed\n",
+ __func__, __LINE__);
+ }
+ } else {
+ pr_err("%s %d: OTP Serial Number read failed\n",
+ __func__, __LINE__);
+ }
+ }
+
+ put_mtd_device(mtd);
+}
+#else
+static void __init read_device_serial_mac(void) {}
+#endif
+
+static int device_mac_address(u8 *mac_addr)
+{
+ pr_warn("%s %d: Entry\n", __func__, __LINE__);
+ read_device_serial_mac();
+ if (!is_valid_ether_addr(gplugd_eth_platform_data.mac_addr))
+ return -EINVAL;
+ memcpy(mac_addr, gplugd_eth_platform_data.mac_addr, 6);
+ return 0;
+}
+
+/* Bring PHY out of reset by setting GPIO 104 */
+static int gplugd_eth_init(void)
+{
+ int gpio_enet_reset = 104;
+ int gpio_enet_coma = 102;
+
+ if (unlikely(gpio_request(gpio_enet_reset, "ETH_RESET_N"))) {
+ printk(KERN_ERR "Can't get hold of GPIO %d to bring Ethernet "
+ "PHY out of reset\n", gpio_enet_reset);
+ return -EIO;
+ }
+ if (unlikely(gpio_request(gpio_enet_coma, "ETH_COMA_N"))) {
+ printk(KERN_ERR "Can't get hold of GPIO %d to bring Ethernet "
+ "PHY out of coma\n", gpio_enet_coma);
+ return -EIO;
+ }
+
+
+ gpio_direction_output(gpio_enet_reset, 1);
+ gpio_direction_output(gpio_enet_coma, 1);
+
+ gpio_free(gpio_enet_reset);
+ gpio_free(gpio_enet_coma);
+ return 0;
+}
+
+static struct pxa168_eth_platform_data gplugd_eth_platform_data = {
+ .port_number = 0,
+ .phy_addr = 0,
+ .speed = 0, /* Autonagotiation */
+ .mac_addr = {0x00},
+ .init = gplugd_eth_init,
+ .device_mac = device_mac_address,
+};
+
static void __init gplugd_init(void)
{
mfp_config(ARRAY_AND_SIZE(gplugd_pin_config));
@@ -243,12 +326,13 @@ static void __init gplugd_init(void)
pxa168_add_twsi(0, &i2c_info, ARRAY_AND_SIZE(gplugd_i2c_board_info));
- pxa168_add_eth(&gplugd_eth_platform_data);
+ pxa168_add_spi(2, &pxa_ssp_master_info);
+ spi_register_board_info(gplugD_spi_board_info,
+ ARRAY_SIZE(gplugD_spi_board_info));
pxa168_add_ssp(2);
- pxa168_add_spi(2, &pxa_ssp_master_info);
- spi_register_board_info(gplugD_spi_board_info, ARRAY_SIZE(gplugD_spi_board_info));
+ pxa168_add_eth(&gplugd_eth_platform_data);
}
MACHINE_START(GPLUGD, "PXA168-based GuruPlug Display (gplugD) Platform")
diff --git a/drivers/net/ethernet/marvell/pxa168_eth.c b/drivers/net/ethernet/marvell/pxa168_eth.c
index c3b209cd0660..9cb99ab9fa47 100644
--- a/drivers/net/ethernet/marvell/pxa168_eth.c
+++ b/drivers/net/ethernet/marvell/pxa168_eth.c
@@ -1552,6 +1552,11 @@ static int pxa168_eth_probe(struct platform_device *pdev)
pep->port_num = pep->pd->port_number;
pep->phy_addr = pep->pd->phy_addr;
+
+ if (pep->pd->device_mac)
+ pep->pd->device_mac(pep->pd->mac_addr);
+ if (is_valid_ether_addr(pep->pd->mac_addr))
+ memcpy(dev->dev_addr, pep->pd->mac_addr, 6);
} else if (pdev->dev.of_node) {
of_property_read_u32(pdev->dev.of_node, "port-id",
&pep->port_num);
diff --git a/include/linux/pxa168_eth.h b/include/linux/pxa168_eth.h
index 18d75e795606..ca941555d9b8 100644
--- a/include/linux/pxa168_eth.h
+++ b/include/linux/pxa168_eth.h
@@ -20,11 +20,14 @@ struct pxa168_eth_platform_data {
int rx_queue_size;
int tx_queue_size;
+ u8 mac_addr[6]; /* mac address if non-zero*/
+
/*
* init callback is used for board specific initialization
* e.g on Aspenite its used to initialize the PHY transceiver.
*/
int (*init)(void);
+ int (*device_mac)(u8 *mac_addr);
};
#endif /* __LINUX_PXA168_ETH_H */
--
2.14.1

View file

@ -1,181 +0,0 @@
From 3175fb4aa7624e068ebca34ca4a7bb2f659a0b34 Mon Sep 17 00:00:00 2001
From: Ashokkumar G <0xfee1dead.sa@gmail.com>
Date: Mon, 26 Jan 2015 11:40:41 -0700
Subject: [PATCH 6/9] mmp:mmc: adding sdhc support for pxa168 based gplugd
Fixing can't talk to controller for sdhci PXAV2
1. Fixing can't talk to controller for 8bus cycles at lowest speed
2. Changing clock name from PXA-SDHCLK to NULL
3. Adding MACH_GPLUGD dependency for SDHCI_PXAV2, SDHCI_IO_ACCESSORIES
Signed-off-by: Ashokkumar G <0xfee1dead.sa@gmail.com>
---
arch/arm/mach-mmp/Kconfig | 1 +
arch/arm/mach-mmp/gplugd.c | 8 ++++++++
arch/arm/mach-mmp/include/mach/pxa168.h | 21 ++++++++++++++++++++-
arch/arm/mach-mmp/pxa168.c | 4 ++++
drivers/mmc/host/Kconfig | 4 +++-
drivers/mmc/host/sdhci-pxav2.c | 19 ++++++++++++++++++-
6 files changed, 54 insertions(+), 3 deletions(-)
diff --git a/arch/arm/mach-mmp/Kconfig b/arch/arm/mach-mmp/Kconfig
index ebdba87b9671..5843def24351 100644
--- a/arch/arm/mach-mmp/Kconfig
+++ b/arch/arm/mach-mmp/Kconfig
@@ -80,6 +80,7 @@ config MACH_TETON_BGA
config MACH_GPLUGD
bool "Marvell's PXA168 GuruPlug Display (gplugD) Board"
select CPU_PXA168
+ select MMC
help
Say 'Y' here if you want to support the Marvell PXA168-based
GuruPlug Display (gplugD) Board
diff --git a/arch/arm/mach-mmp/gplugd.c b/arch/arm/mach-mmp/gplugd.c
index 2981c8878ee7..ba4ce4e63bbe 100644
--- a/arch/arm/mach-mmp/gplugd.c
+++ b/arch/arm/mach-mmp/gplugd.c
@@ -12,6 +12,7 @@
#include <linux/platform_device.h>
#include <linux/gpio.h>
#include <linux/gpio-pxa.h>
+#include <linux/mmc/sdhci.h>
#include <linux/spi/spi.h>
#include <linux/spi/pxa2xx_spi.h>
@@ -148,6 +149,10 @@ static struct i2c_board_info gplugd_i2c_board_info[] = {
}
};
+struct sdhci_pxa_platdata gplugd_sdh_platdata = {
+ .quirks = SDHCI_QUIRK_NO_HISPD_BIT | SDHCI_QUIRK_NO_BUSY_IRQ | SDHCI_QUIRK_32BIT_DMA_SIZE,
+};
+
static void __init select_disp_freq(void)
{
/* set GPIO 35 & clear GPIO 85 to set LCD External Clock to 74.25 MHz */
@@ -332,6 +337,9 @@ static void __init gplugd_init(void)
pxa168_add_ssp(2);
+ pxa168_add_sdh(1, &gplugd_sdh_platdata);
+ pxa168_add_sdh(2, &gplugd_sdh_platdata);
+
pxa168_add_eth(&gplugd_eth_platform_data);
}
diff --git a/arch/arm/mach-mmp/include/mach/pxa168.h b/arch/arm/mach-mmp/include/mach/pxa168.h
index a83ba7cb525d..def8f462943d 100644
--- a/arch/arm/mach-mmp/include/mach/pxa168.h
+++ b/arch/arm/mach-mmp/include/mach/pxa168.h
@@ -17,6 +17,7 @@ extern void pxa168_clear_keypad_wakeup(void);
#include <linux/platform_data/keypad-pxa27x.h>
#include <mach/cputype.h>
#include <linux/pxa168_eth.h>
+#include <linux/platform_data/pxa_sdhci.h>
#include <linux/platform_data/mv_usb.h>
extern struct pxa_device_desc pxa168_device_uart1;
@@ -37,7 +38,10 @@ extern struct pxa_device_desc pxa168_device_nand;
extern struct pxa_device_desc pxa168_device_fb;
extern struct pxa_device_desc pxa168_device_keypad;
extern struct pxa_device_desc pxa168_device_eth;
-
+extern struct pxa_device_desc pxa168_device_sdh1;
+extern struct pxa_device_desc pxa168_device_sdh2;
+extern struct pxa_device_desc pxa168_device_sdh3;
+extern struct pxa_device_desc pxa168_device_sdh4;
/* pdata can be NULL */
extern int __init pxa168_add_usb_host(struct mv_usb_platform_data *pdata);
@@ -134,4 +138,19 @@ static inline int pxa168_add_eth(struct pxa168_eth_platform_data *data)
{
return pxa_register_device(&pxa168_device_eth, data, sizeof(*data));
}
+
+static inline int pxa168_add_sdh(int id, struct sdhci_pxa_platdata *data)
+{
+ struct pxa_device_desc *d = NULL;
+
+ switch (id) {
+ case 1: d = &pxa168_device_sdh1; break;
+ case 2: d = &pxa168_device_sdh2; break;
+ case 3: d = &pxa168_device_sdh3; break;
+ case 4: d = &pxa168_device_sdh4; break;
+ default:
+ return -EINVAL;
+ }
+ return pxa_register_device(d, data, sizeof(*data));
+}
#endif /* __ASM_MACH_PXA168_H */
diff --git a/arch/arm/mach-mmp/pxa168.c b/arch/arm/mach-mmp/pxa168.c
index 144e997624c0..e7dee43e6458 100644
--- a/arch/arm/mach-mmp/pxa168.c
+++ b/arch/arm/mach-mmp/pxa168.c
@@ -110,6 +110,10 @@ PXA168_DEVICE(ssp5, "pxa168-ssp", 4, SSP5, 0xd4021000, 0x40, 60, 61);
PXA168_DEVICE(fb, "pxa168-fb", -1, LCD, 0xd420b000, 0x1c8);
PXA168_DEVICE(keypad, "pxa27x-keypad", -1, KEYPAD, 0xd4012000, 0x4c);
PXA168_DEVICE(eth, "pxa168-eth", -1, MFU, 0xc0800000, 0x0fff);
+PXA168_DEVICE(sdh1, "sdhci-pxav2", 0, SDH1, 0xd4280000, 0x100);
+PXA168_DEVICE(sdh2, "sdhci-pxav2", 1, SDH1, 0xd4281000, 0x100);
+PXA168_DEVICE(sdh3, "sdhci-pxav2", 2, SDH2, 0xd427e000, 0x100);
+PXA168_DEVICE(sdh4, "sdhci-pxav2", 3, SDH2, 0xd427f000, 0x100);
struct resource pxa168_resource_gpio[] = {
{
diff --git a/drivers/mmc/host/Kconfig b/drivers/mmc/host/Kconfig
index 13860656104b..02f8e4d08854 100644
--- a/drivers/mmc/host/Kconfig
+++ b/drivers/mmc/host/Kconfig
@@ -240,7 +240,9 @@ config MMC_SDHCI_PXAV2
tristate "Marvell PXA9XX SD Host Controller support (PXAV2)"
depends on CLKDEV_LOOKUP
depends on MMC_SDHCI_PLTFM
- default CPU_PXA910
+ select MMC_SDHCI_IO_ACCESSORS if MACH_GPLUGD
+ default y if (CPU_PXA910 || MACH_GPLUGD)
+
help
This selects the Marvell(R) PXAV2 SD Host Controller.
If you have a PXA9XX platform with SD Host Controller
diff --git a/drivers/mmc/host/sdhci-pxav2.c b/drivers/mmc/host/sdhci-pxav2.c
index b4c23e983baf..f0f36c9a803a 100644
--- a/drivers/mmc/host/sdhci-pxav2.c
+++ b/drivers/mmc/host/sdhci-pxav2.c
@@ -111,7 +111,24 @@ static void pxav2_mmc_set_bus_width(struct sdhci_host *host, int width)
writeb(ctrl, host->ioaddr + SDHCI_HOST_CONTROL);
}
+/*
+ * we cannot talk to controller for 8 bus cycles according to sdio spec
+ * at lowest speed this is 100,000 HZ per cycle or 800,000 cycles
+ * which is quite a LONG TIME on a fast cpu -- so delay if needed
+ */
+static inline u16 pxa168_readw(struct sdhci_host *host, int reg)
+{
+ u32 temp;
+ if (reg == SDHCI_HOST_VERSION) {
+ temp = readl (host->ioaddr + SDHCI_HOST_VERSION - 2) >> 16;
+ return temp & 0xffff;
+ }
+
+ return readw(host->ioaddr + reg);
+}
+
static const struct sdhci_ops pxav2_sdhci_ops = {
+ .read_w = &pxa168_readw,
.set_clock = sdhci_set_clock,
.get_max_clock = sdhci_pltfm_clk_get_max_clock,
.set_bus_width = pxav2_mmc_set_bus_width,
@@ -185,7 +202,7 @@ static int sdhci_pxav2_probe(struct platform_device *pdev)
pltfm_host = sdhci_priv(host);
pltfm_host->priv = pxa;
- clk = clk_get(dev, "PXA-SDHCLK");
+ clk = clk_get(dev, "NULL");
if (IS_ERR(clk)) {
dev_err(dev, "failed to get io clock\n");
ret = PTR_ERR(clk);
--
2.14.1

View file

@ -1,164 +0,0 @@
From 4e64f8fe95dd310cd234ed4d191f312e704ab19d Mon Sep 17 00:00:00 2001
From: Ashokkumar G <0xfee1dead.sa@gmail.com>
Date: Mon, 26 Jan 2015 11:51:13 -0700
Subject: [PATCH 7/9] arch:arm:mmp: Adding USB Host and OTG peripheral for
pxa168
Adding USB host, USB OTG peripherals memory, register information
for pxa168 SOC
Enable USB Host, USB OTG in gplugd
Signed-off-by: Ashokkumar G <0xfee1dead.sa@gmail.com>
---
arch/arm/mach-mmp/devices.c | 35 ++++++++++++++++++
arch/arm/mach-mmp/gplugd.c | 64 +++++++++++++++++++++++++++++++++
arch/arm/mach-mmp/include/mach/pxa168.h | 4 +++
3 files changed, 103 insertions(+)
diff --git a/arch/arm/mach-mmp/devices.c b/arch/arm/mach-mmp/devices.c
index 2bcb766af05d..7d8499f9c34c 100644
--- a/arch/arm/mach-mmp/devices.c
+++ b/arch/arm/mach-mmp/devices.c
@@ -241,6 +241,41 @@ void pxa_usb_phy_deinit(void __iomem *phy_reg)
#if IS_ENABLED(CONFIG_USB_SUPPORT)
static u64 usb_dma_mask = ~(u32)0;
+#if IS_ENABLED(CONFIG_USB_EHCI_MV)
+struct resource pxa168_u2h_resources[] = {
+ /* regbase */
+ [0] = {
+ .start = PXA168_U2H_REGBASE + U2x_CAPREGS_OFFSET,
+ .end = PXA168_U2H_REGBASE + USB_REG_RANGE,
+ .flags = IORESOURCE_MEM,
+ .name = "capregs",
+ },
+ /* phybase */
+ [1] = {
+ .start = PXA168_U2H_PHYBASE,
+ .end = PXA168_U2H_PHYBASE + USB_PHY_RANGE,
+ .flags = IORESOURCE_MEM,
+ .name = "phyregs",
+ },
+ [2] = {
+ .start = IRQ_PXA168_USB2,
+ .end = IRQ_PXA168_USB2,
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+struct platform_device pxa168_device_u2h = {
+ .name = "pxa-sph",
+ .id = -1,
+ .resource = pxa168_u2h_resources,
+ .num_resources = ARRAY_SIZE(pxa168_u2h_resources),
+ .dev = {
+ .dma_mask = &usb_dma_mask,
+ .coherent_dma_mask = 0xffffffff,
+ },
+};
+#endif
+
#if IS_ENABLED(CONFIG_USB_MV_UDC)
struct resource pxa168_u2o_resources[] = {
/* regbase */
diff --git a/arch/arm/mach-mmp/gplugd.c b/arch/arm/mach-mmp/gplugd.c
index ba4ce4e63bbe..b9c3c9257eec 100644
--- a/arch/arm/mach-mmp/gplugd.c
+++ b/arch/arm/mach-mmp/gplugd.c
@@ -173,6 +173,56 @@ static void __init select_disp_freq(void)
}
}
+#ifdef CONFIG_USB_SUPPORT
+
+#if defined(CONFIG_USB_EHCI_HCD) && defined(CONFIG_USB_EHCI_MV)
+
+static char *pxa168_u2h_clock_name[] = {
+ [0] = "U2HCLK",
+};
+
+static struct mv_usb_platform_data pxa168_u2h_pdata = {
+ .mode = MV_USB_MODE_HOST,
+ .phy_init = pxa_usb_phy_init,
+ .phy_deinit = pxa_usb_phy_deinit,
+ .set_vbus = NULL,
+};
+#endif
+
+#if defined(CONFIG_USB_MV_UDC) || defined(CONFIG_USB_EHCI_MV_U2O)
+static char *pxa168_u2o_clock_name[] = {
+ [0] = "U2OCLK",
+};
+
+static struct mv_usb_platform_data pxa168_u2o_udc_pdata = {
+ .vbus = NULL,
+ .mode = MV_USB_MODE_OTG,
+ .otg_force_a_bus_req = 1,
+ .phy_init = pxa_usb_phy_init,
+ .phy_deinit = pxa_usb_phy_deinit,
+ .set_vbus = NULL,
+};
+static struct mv_usb_platform_data pxa168_u2o_pdata = {
+ .vbus = NULL,
+ .mode = MV_USB_MODE_OTG,
+ .otg_force_a_bus_req = 1,
+ .phy_init = pxa_usb_phy_init,
+ .phy_deinit = pxa_usb_phy_deinit,
+ .set_vbus = NULL,
+};
+static struct mv_usb_platform_data pxa168_u2o_otg_pdata = {
+ .vbus = NULL,
+ .mode = MV_USB_MODE_OTG,
+ .otg_force_a_bus_req = 1,
+ .phy_init = pxa_usb_phy_init,
+ .phy_deinit = pxa_usb_phy_deinit,
+
+ .set_vbus = NULL,
+};
+
+#endif
+#endif
+
static struct pxa2xx_spi_master pxa_ssp_master_info = {
.num_chipselect = 1,
.enable_dma = 1,
@@ -340,6 +390,20 @@ static void __init gplugd_init(void)
pxa168_add_sdh(1, &gplugd_sdh_platdata);
pxa168_add_sdh(2, &gplugd_sdh_platdata);
+#if defined(CONFIG_USB_EHCI_HCD) && defined(CONFIG_USB_EHCI_MV)
+ pxa168_device_u2h.dev.platform_data = &pxa168_u2h_pdata;
+ platform_device_register(&pxa168_device_u2h);
+#endif
+#ifdef CONFIG_USB_MV_UDC
+ pxa168_device_u2o.dev.platform_data = &pxa168_u2o_udc_pdata;
+ platform_device_register(&pxa168_device_u2o);
+#endif
+
+#ifdef CONFIG_USB_EHCI_MV_U2O
+ pxa168_device_u2oehci.dev.platform_data = &pxa168_u2o_pdata;
+ platform_device_register(&pxa168_device_u2oehci);
+#endif
+
pxa168_add_eth(&gplugd_eth_platform_data);
}
diff --git a/arch/arm/mach-mmp/include/mach/pxa168.h b/arch/arm/mach-mmp/include/mach/pxa168.h
index def8f462943d..feed849620c1 100644
--- a/arch/arm/mach-mmp/include/mach/pxa168.h
+++ b/arch/arm/mach-mmp/include/mach/pxa168.h
@@ -42,6 +42,10 @@ extern struct pxa_device_desc pxa168_device_sdh1;
extern struct pxa_device_desc pxa168_device_sdh2;
extern struct pxa_device_desc pxa168_device_sdh3;
extern struct pxa_device_desc pxa168_device_sdh4;
+extern struct platform_device pxa168_device_u2o;
+extern struct platform_device pxa168_device_u2h;
+extern struct platform_device pxa168_device_u2oehci;
+extern struct platform_device pxa168_device_u2ootg;
/* pdata can be NULL */
extern int __init pxa168_add_usb_host(struct mv_usb_platform_data *pdata);
--
2.14.1

View file

@ -1,147 +0,0 @@
From 05b2373ebb352f497015281f3251481fba1d0a41 Mon Sep 17 00:00:00 2001
From: Ashokkumar G <0xfee1dead.sa@gmail.com>
Date: Mon, 26 Jan 2015 12:08:26 -0700
Subject: [PATCH 8/9] arch:arm:mmp:gplugd: Fix gPlugD reboot issue
Board hangs in u-boot after issuing reboot related
commands from Linux console due to not resetting
Timer registers in the platform reset function which uses
generic softreset. Fixing the issue by adding board reset
code for gPlugD.
Signed-off-by: Ashokkumar G <0xfee1dead.sa@gmail.com>
---
arch/arm/mach-mmp/gplugd.c | 35 ++++++++++++++++-
arch/arm/mach-mmp/include/mach/regs-mpmu.h | 62 ++++++++++++++++++++++++++++++
2 files changed, 96 insertions(+), 1 deletion(-)
create mode 100644 arch/arm/mach-mmp/include/mach/regs-mpmu.h
diff --git a/arch/arm/mach-mmp/gplugd.c b/arch/arm/mach-mmp/gplugd.c
index b9c3c9257eec..ec4257ee1d60 100644
--- a/arch/arm/mach-mmp/gplugd.c
+++ b/arch/arm/mach-mmp/gplugd.c
@@ -22,6 +22,8 @@
#include <mach/irqs.h>
#include <mach/pxa168.h>
#include <mach/mfp-pxa168.h>
+#include <mach/regs-mpmu.h>
+#include <mach/regs-timers.h>
#include <uapi/linux/ethtool.h>
#include <linux/etherdevice.h>
@@ -365,6 +367,37 @@ static struct pxa168_eth_platform_data gplugd_eth_platform_data = {
.device_mac = device_mac_address,
};
+static void gplugd_restart(char mode, const char *cmd)
+{
+#define MPMU_APRR_WDTR (1<<4)
+ volatile u32 watchdog_virt_base;
+
+ watchdog_virt_base = (u32)TIMERS1_VIRT_BASE;
+ /* negate hardware reset to the WDT after system reset */
+ writel((readl(MPMU_APRR) | MPMU_APRR_WDTR), MPMU_APRR);
+
+ /*disable functional WDT clock */
+ writel(0x1, MPMU_WDTPCR);
+
+ /* clear previous WDT status */
+ writel(0xbaba, (volatile void*)(watchdog_virt_base + TMR_WFAR));
+ writel(0xeb10, (volatile void*)(watchdog_virt_base + TMR_WSAR));
+ writel(0, (volatile void*)(watchdog_virt_base + TMR_WSR));
+
+ /* set match counter */
+ writel(0xbaba, (volatile void*)(watchdog_virt_base + TMR_WFAR));
+ writel(0xeb10, (volatile void*)(watchdog_virt_base + TMR_WSAR));
+ writel(0xf, (volatile void*)(watchdog_virt_base + TMR_WMR));
+
+ /* enable WDT reset */
+ writel(0xbaba, (volatile void*)(watchdog_virt_base + TMR_WFAR));
+ writel(0xeb10, (volatile void*)(watchdog_virt_base + TMR_WSAR));
+ writel(0x3, (volatile void*)(watchdog_virt_base + TMR_WMER));
+
+ /*enable functional WDT clock */
+ writel(0x3, MPMU_WDTPCR);
+}
+
static void __init gplugd_init(void)
{
mfp_config(ARRAY_AND_SIZE(gplugd_pin_config));
@@ -413,5 +446,5 @@ MACHINE_START(GPLUGD, "PXA168-based GuruPlug Display (gplugD) Platform")
.init_irq = pxa168_init_irq,
.init_time = pxa168_timer_init,
.init_machine = gplugd_init,
- .restart = pxa168_restart,
+ .restart = gplugd_restart,
MACHINE_END
diff --git a/arch/arm/mach-mmp/include/mach/regs-mpmu.h b/arch/arm/mach-mmp/include/mach/regs-mpmu.h
new file mode 100644
index 000000000000..91ecb7899ff0
--- /dev/null
+++ b/arch/arm/mach-mmp/include/mach/regs-mpmu.h
@@ -0,0 +1,62 @@
+/**************************************************************************
+ *
+ * Copyright (c) 2009, 2010 Marvell International Ltd.
+ *
+ * This file is part of GNU program.
+ *
+ * GNU program is free software: you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation, either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ * GNU program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General
+ * Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program.
+ *
+ * If not, see http://www.gnu.org/licenses/old-licenses/gpl-2.0.html
+ *
+ *************************************************************************/
+
+/*
+ * linux/arch/arm/mach-mmp/include/mach/regs-mpmu.h
+ *
+ * Main Power Management Unit
+ */
+
+#ifndef __ASM_MACH_REGS_MPMU_H
+#define __ASM_MACH_REGS_MPMU_H
+
+#include <mach/addr-map.h>
+
+#define MPMU_CPCR MPMU_REG(0x0000)
+#define MPMU_FCCR MPMU_REG(0x0008)
+#define MPMU_POCR MPMU_REG(0x000c)
+#define MPMU_POSR MPMU_REG(0x0010)
+#define MPMU_SUCCR MPMU_REG(0x0014)
+#define MPMU_VRCR MPMU_REG(0x0018)
+#define MPMU_OHCR MPMU_REG(0x001c)
+#define MPMU_GPCR MPMU_REG(0x0030)
+#define MPMU_PLL2CR MPMU_REG(0x0034)
+#define MPMU_SCCR MPMU_REG(0x0038)
+#define MPMU_CWUCRM MPMU_REG(0x004c)
+#define MPMU_PLL1_REG1 MPMU_REG(0x0050)
+#define MPMU_PLL1_REG2 MPMU_REG(0x0054)
+#define MPMU_PLL1_SSC MPMU_REG(0x0058)
+#define MPMU_PLL2_REG1 MPMU_REG(0x0060)
+#define MPMU_PLL2_REG2 MPMU_REG(0x0064)
+#define MPMU_PLL2_SSC MPMU_REG(0x0068)
+#define MPMU_TS MPMU_REG(0x0080)
+#define MPMU_WDTPCR MPMU_REG(0x0200)
+#define MPMU_APCR MPMU_REG(0x1000)
+#define MPMU_APSR MPMU_REG(0x1004)
+#define MPMU_APRR MPMU_REG(0x1020)
+#define MPMU_ACGR MPMU_REG(0x1024)
+#define MPMU_ARSR MPMU_REG(0x1028)
+#define MPMU_AWUCRS MPMU_REG(0x1048)
+#define MPMU_AWUCRM MPMU_REG(0x104c)
+
+#endif /* __ASM_MACH_REGS_APMU_H */
--
2.14.1

View file

@ -1,43 +0,0 @@
From 6f2f971a88aa929add4db7c0060d97d5b68c7dd1 Mon Sep 17 00:00:00 2001
From: Kevin Mihelich <kevin@archlinuxarm.org>
Date: Sun, 3 Sep 2017 13:42:51 -0600
Subject: [PATCH 9/9] Revert "net: phy: Do not perform software reset for
Generic PHY"
This reverts commit aa3a735de9c9999da16b189424ca000a5bae5244.
---
drivers/net/phy/phy_device.c | 2 +-
include/linux/phy.h | 4 ----
2 files changed, 1 insertion(+), 5 deletions(-)
diff --git a/drivers/net/phy/phy_device.c b/drivers/net/phy/phy_device.c
index a1c0d6986148..9a648fdfbf19 100644
--- a/drivers/net/phy/phy_device.c
+++ b/drivers/net/phy/phy_device.c
@@ -1343,7 +1343,7 @@ static struct phy_driver genphy_driver[] = {
.phy_id = 0xffffffff,
.phy_id_mask = 0xffffffff,
.name = "Generic PHY",
- .soft_reset = genphy_no_soft_reset,
+ .soft_reset = genphy_soft_reset,
.config_init = genphy_config_init,
.features = PHY_GBIT_FEATURES | SUPPORTED_MII |
SUPPORTED_AUI | SUPPORTED_FIBRE |
diff --git a/include/linux/phy.h b/include/linux/phy.h
index fbdacd1278e3..d090cfcaa167 100644
--- a/include/linux/phy.h
+++ b/include/linux/phy.h
@@ -737,10 +737,6 @@ int genphy_read_status(struct phy_device *phydev);
int genphy_suspend(struct phy_device *phydev);
int genphy_resume(struct phy_device *phydev);
int genphy_soft_reset(struct phy_device *phydev);
-static inline int genphy_no_soft_reset(struct phy_device *phydev)
-{
- return 0;
-}
void phy_driver_unregister(struct phy_driver *drv);
void phy_drivers_unregister(struct phy_driver *drv, int n);
int phy_driver_register(struct phy_driver *new_driver);
--
2.14.1

View file

@ -1,253 +0,0 @@
# Marvell PXA168/MMP Platforms
# Maintainer: Kevin Mihelich <kevin@archlinuxarm.org>
buildarch=2
pkgbase=linux-mmp
_srcname=linux-3.18
_kernelname=${pkgbase#linux}
_desc="Marvell PXA168/MMP platforms"
pkgver=3.18.140
pkgrel=1
arch=('arm')
url="https://github.com/Marvell-Semi/PXA168_kernel/tree/gplugd-dev"
license=('GPL2')
makedepends=('xmlto' 'docbook-xsl' 'kmod' 'inetutils' 'bc' 'git')
options=('!strip')
source=("https://cdn.kernel.org/pub/linux/kernel/v3.x/${_srcname}.tar.xz"
"https://cdn.kernel.org/pub/linux/kernel/v3.x/patch-${pkgver}.xz"
'0001-clk-mmp-Adding-clocks-of-pxa168-peripherals-for-gplu.patch'
'0002-arch-arm-mmp-initialize-gpio-driver-before-other-dri.patch'
'0003-arch-arm-mmp-Adding-spi-master-and-mtd-dataflash-for.patch'
'0004-drivers-spi-Adding-mmp-dependency-for-SPI_PXA2XX.patch'
'0005-mmp-ethernet-Adding-ethernet-MAC-address-reading-for.patch'
'0006-mmp-mmc-adding-sdhc-support-for-pxa168-based-gplugd.patch'
'0007-arch-arm-mmp-Adding-USB-Host-and-OTG-peripheral-for-.patch'
'0008-arch-arm-mmp-gplugd-Fix-gPlugD-reboot-issue.patch'
'0009-Revert-net-phy-Do-not-perform-software-reset-for-Gen.patch'
'config')
md5sums=('9e854df51ca3fef8bfe566dbd7b89241'
'eae22c07df77e95d86303e21a847cef7'
'bfd81313763714222a0ba84d51ad12bc'
'f2b57a976904e07acc637a963691b588'
'a1746d9678717d18eb57ea318f68be6d'
'a21ed5340db1142508637bd6f4740b1d'
'c306eb2920e2665bc80b48c1bdf5d826'
'8a36b07eb503c946fe3ad4b5cf0d5e07'
'132bd1fc48bf35847ff6998050673733'
'9b04a627cf70d3d69eb02c2544170b06'
'7bb7483b63e8f348cb8981f0b04cf3cc'
'b2ccde39a0d3942d66a3af5dcbf54ba4')
prepare() {
cd "${srcdir}/${_srcname}"
# upstream patch
git apply --whitespace=nowarn ../patch-${pkgver}
# gplugd patch
git apply ../0001-clk-mmp-Adding-clocks-of-pxa168-peripherals-for-gplu.patch
git apply ../0002-arch-arm-mmp-initialize-gpio-driver-before-other-dri.patch
git apply ../0003-arch-arm-mmp-Adding-spi-master-and-mtd-dataflash-for.patch
git apply ../0004-drivers-spi-Adding-mmp-dependency-for-SPI_PXA2XX.patch
git apply ../0005-mmp-ethernet-Adding-ethernet-MAC-address-reading-for.patch
git apply ../0006-mmp-mmc-adding-sdhc-support-for-pxa168-based-gplugd.patch
git apply ../0007-arch-arm-mmp-Adding-USB-Host-and-OTG-peripheral-for-.patch
git apply ../0008-arch-arm-mmp-gplugd-Fix-gPlugD-reboot-issue.patch
git apply ../0009-Revert-net-phy-Do-not-perform-software-reset-for-Gen.patch
cat "${srcdir}/config" > ./.config
# add pkgrel to extraversion
sed -ri "s|^(EXTRAVERSION =)(.*)|\1 \2-${pkgrel}|" Makefile
# don't run depmod on 'make install'. We'll do this ourselves in packaging
sed -i '2iexit 0' scripts/depmod.sh
}
build() {
cd "${srcdir}/${_srcname}"
# get kernel version
make prepare
# build!
make ${MAKEFLAGS} zImage modules
}
_package() {
pkgdesc="The Linux Kernel and modules - ${_desc}"
depends=('coreutils' 'linux-firmware' 'kmod' 'mkinitcpio>=0.7')
optdepends=('crda: to set the correct wireless channels of your country')
provides=('kernel26' "linux=${pkgver}" 'aufs_friendly')
conflicts=('linux')
install=${pkgname}.install
cd "${srcdir}/${_srcname}"
KARCH=arm
# get kernel version
_kernver="$(make kernelrelease)"
_basekernel=${_kernver%%-*}
_basekernel=${_basekernel%.*}
mkdir -p "${pkgdir}"/{lib/modules,lib/firmware,boot/dtbs}
make INSTALL_MOD_PATH="${pkgdir}" modules_install
cp arch/$KARCH/boot/zImage "${pkgdir}/boot/zImage"
# set correct depmod command for install
sed \
-e "s/KERNEL_NAME=.*/KERNEL_NAME=${_kernelname}/g" \
-e "s/KERNEL_VERSION=.*/KERNEL_VERSION=${_kernver}/g" \
-i "${startdir}/${pkgname}.install"
# remove build and source links
rm -f "${pkgdir}"/lib/modules/${_kernver}/{source,build}
# remove the firmware
rm -rf "${pkgdir}/lib/firmware"
# gzip -9 all modules to save 100MB of space
find "${pkgdir}" -name '*.ko' -exec gzip -9 {} \;
# make room for external modules
ln -s "../extramodules-${_basekernel}${_kernelname:--ARCH}" "${pkgdir}/lib/modules/${_kernver}/extramodules"
# add real version for building modules and running depmod from post_install/upgrade
mkdir -p "${pkgdir}/lib/modules/extramodules-${_basekernel}${_kernelname:--ARCH}"
echo "${_kernver}" > "${pkgdir}/lib/modules/extramodules-${_basekernel}${_kernelname:--ARCH}/version"
# Now we call depmod...
depmod -b "${pkgdir}" -F System.map "${_kernver}"
# move module tree /lib -> /usr/lib
mkdir -p "${pkgdir}/usr"
mv "${pkgdir}/lib" "${pkgdir}/usr/"
}
_package-headers() {
pkgdesc="Header files and scripts for building modules for linux kernel - ${_desc}"
provides=("linux-headers=${pkgver}")
conflicts=('linux-headers')
install -dm755 "${pkgdir}/usr/lib/modules/${_kernver}"
cd "${srcdir}/${_srcname}"
install -D -m644 Makefile \
"${pkgdir}/usr/lib/modules/${_kernver}/build/Makefile"
install -D -m644 kernel/Makefile \
"${pkgdir}/usr/lib/modules/${_kernver}/build/kernel/Makefile"
install -D -m644 .config \
"${pkgdir}/usr/lib/modules/${_kernver}/build/.config"
mkdir -p "${pkgdir}/usr/lib/modules/${_kernver}/build/include"
for i in acpi asm-generic config crypto drm generated keys linux math-emu \
media net pcmcia scsi sound trace uapi video xen; do
cp -a include/${i} "${pkgdir}/usr/lib/modules/${_kernver}/build/include/"
done
# copy arch includes for external modules
mkdir -p ${pkgdir}/usr/src/linux-${_kernver}/arch/$KARCH
cp -a arch/$KARCH/include ${pkgdir}/usr/src/linux-${_kernver}/arch/$KARCH/
mkdir -p ${pkgdir}/usr/src/linux-${_kernver}/arch/$KARCH/mach-mmp
cp -a arch/$KARCH/mach-mmp/include ${pkgdir}/usr/src/linux-${_kernver}/arch/$KARCH/mach-mmp
mkdir -p ${pkgdir}/usr/src/linux-${_kernver}/arch/$KARCH/plat-pxa
cp -a arch/$KARCH/plat-pxa/include ${pkgdir}/usr/src/linux-${_kernver}/arch/$KARCH/plat-pxa/
# copy files necessary for later builds, like nvidia and vmware
cp Module.symvers "${pkgdir}/usr/lib/modules/${_kernver}/build"
cp -a scripts "${pkgdir}/usr/lib/modules/${_kernver}/build"
# fix permissions on scripts dir
chmod og-w -R "${pkgdir}/usr/lib/modules/${_kernver}/build/scripts"
mkdir -p "${pkgdir}/usr/lib/modules/${_kernver}/build/.tmp_versions"
mkdir -p "${pkgdir}/usr/lib/modules/${_kernver}/build/arch/${KARCH}/kernel"
cp arch/${KARCH}/Makefile "${pkgdir}/usr/lib/modules/${_kernver}/build/arch/${KARCH}/"
if [ "${CARCH}" = "i686" ]; then
cp arch/${KARCH}/Makefile_32.cpu "${pkgdir}/usr/lib/modules/${_kernver}/build/arch/${KARCH}/"
fi
cp arch/${KARCH}/kernel/asm-offsets.s "${pkgdir}/usr/lib/modules/${_kernver}/build/arch/${KARCH}/kernel/"
# add docbook makefile
install -D -m644 Documentation/DocBook/Makefile \
"${pkgdir}/usr/lib/modules/${_kernver}/build/Documentation/DocBook/Makefile"
# add dm headers
mkdir -p "${pkgdir}/usr/lib/modules/${_kernver}/build/drivers/md"
cp drivers/md/*.h "${pkgdir}/usr/lib/modules/${_kernver}/build/drivers/md"
# add inotify.h
mkdir -p "${pkgdir}/usr/lib/modules/${_kernver}/build/include/linux"
cp include/linux/inotify.h "${pkgdir}/usr/lib/modules/${_kernver}/build/include/linux/"
# add wireless headers
mkdir -p "${pkgdir}/usr/lib/modules/${_kernver}/build/net/mac80211/"
cp net/mac80211/*.h "${pkgdir}/usr/lib/modules/${_kernver}/build/net/mac80211/"
# add dvb headers for external modules
# in reference to:
# http://bugs.archlinux.org/task/9912
mkdir -p "${pkgdir}/usr/lib/modules/${_kernver}/build/drivers/media/dvb-core"
cp drivers/media/dvb-core/*.h "${pkgdir}/usr/lib/modules/${_kernver}/build/drivers/media/dvb-core/"
# and...
# http://bugs.archlinux.org/task/11194
mkdir -p "${pkgdir}/usr/lib/modules/${_kernver}/build/include/config/dvb/"
cp include/config/dvb/*.h "${pkgdir}/usr/lib/modules/${_kernver}/build/include/config/dvb/"
# add dvb headers for http://mcentral.de/hg/~mrec/em28xx-new
# in reference to:
# http://bugs.archlinux.org/task/13146
mkdir -p "${pkgdir}/usr/lib/modules/${_kernver}/build/drivers/media/dvb-frontends/"
cp drivers/media/dvb-frontends/lgdt330x.h "${pkgdir}/usr/lib/modules/${_kernver}/build/drivers/media/dvb-frontends/"
mkdir -p "${pkgdir}/usr/lib/modules/${_kernver}/build/drivers/media/i2c/"
cp drivers/media/i2c/msp3400-driver.h "${pkgdir}/usr/lib/modules/${_kernver}/build/drivers/media/i2c/"
# add dvb headers
# in reference to:
# http://bugs.archlinux.org/task/20402
mkdir -p "${pkgdir}/usr/lib/modules/${_kernver}/build/drivers/media/usb/dvb-usb"
cp drivers/media/usb/dvb-usb/*.h "${pkgdir}/usr/lib/modules/${_kernver}/build/drivers/media/usb/dvb-usb/"
mkdir -p "${pkgdir}/usr/lib/modules/${_kernver}/build/drivers/media/dvb-frontends"
cp drivers/media/dvb-frontends/*.h "${pkgdir}/usr/lib/modules/${_kernver}/build/drivers/media/dvb-frontends/"
mkdir -p "${pkgdir}/usr/lib/modules/${_kernver}/build/drivers/media/tuners"
cp drivers/media/tuners/*.h "${pkgdir}/usr/lib/modules/${_kernver}/build/drivers/media/tuners/"
# add xfs and shmem for aufs building
mkdir -p "${pkgdir}/usr/lib/modules/${_kernver}/build/fs/xfs"
mkdir -p "${pkgdir}/usr/lib/modules/${_kernver}/build/mm"
# removed in 3.17 series
# cp fs/xfs/xfs_sb.h "${pkgdir}/usr/lib/modules/${_kernver}/build/fs/xfs/xfs_sb.h"
# copy in Kconfig files
for i in $(find . -name "Kconfig*"); do
mkdir -p "${pkgdir}"/usr/lib/modules/${_kernver}/build/`echo ${i} | sed 's|/Kconfig.*||'`
cp ${i} "${pkgdir}/usr/lib/modules/${_kernver}/build/${i}"
done
chown -R root.root "${pkgdir}/usr/lib/modules/${_kernver}/build"
find "${pkgdir}/usr/lib/modules/${_kernver}/build" -type d -exec chmod 755 {} \;
# strip scripts directory
find "${pkgdir}/usr/lib/modules/${_kernver}/build/scripts" -type f -perm -u+w 2>/dev/null | while read binary ; do
case "$(file -bi "${binary}")" in
*application/x-sharedlib*) # Libraries (.so)
/usr/bin/strip ${STRIP_SHARED} "${binary}";;
*application/x-archive*) # Libraries (.a)
/usr/bin/strip ${STRIP_STATIC} "${binary}";;
*application/x-executable*) # Binaries
/usr/bin/strip ${STRIP_BINARIES} "${binary}";;
esac
done
# remove unneeded architectures
rm -rf "${pkgdir}"/usr/lib/modules/${_kernver}/build/arch/{alpha,arc,arm26,arm64,avr32,blackfin,c6x,cris,frv,h8300,hexagon,ia64,m32r,m68k,m68knommu,metag,mips,microblaze,mn10300,openrisc,parisc,powerpc,ppc,s390,score,sh,sh64,sparc,sparc64,tile,unicore32,um,v850,x86,xtensa}
}
pkgname=("${pkgbase}" "${pkgbase}-headers")
for _p in ${pkgname[@]}; do
eval "package_${_p}() {
_package${_p#${pkgbase}}
}"
done

File diff suppressed because it is too large Load diff

View file

@ -1,14 +0,0 @@
KERNEL_NAME=-mmp
KERNEL_VERSION=3.10.33-1-ARCH
post_install () {
# updating module dependencies
echo ">>> Updating module dependencies. Please wait ..."
depmod ${KERNEL_VERSION}
}
post_upgrade() {
# updating module dependencies
echo ">>> Updating module dependencies. Please wait ..."
depmod ${KERNEL_VERSION}
}