mirror of
https://github.com/archlinuxarm/PKGBUILDs.git
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59 lines
3.3 KiB
Diff
59 lines
3.3 KiB
Diff
From 6e5287df72d9ed7f6855714eb0f175e43cd1f3cf Mon Sep 17 00:00:00 2001
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From: Jacky Bai <ping.bai@nxp.com>
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Date: Mon, 20 May 2019 07:54:51 +0000
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Subject: [PATCH 10/10] clk: imx: keep the mmdc p1 ipg clock always on on
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6sx/ul/ull/sll
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The MMDC_P1_IPG clock need to be on always on to make sure
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the MMDC register can be accessed successfully.
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Signed-off-by: Jacky Bai <ping.bai@nxp.com>
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Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com>
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---
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drivers/clk/imx/clk-imx6sll.c | 2 +-
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drivers/clk/imx/clk-imx6sx.c | 2 +-
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drivers/clk/imx/clk-imx6ul.c | 2 +-
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3 files changed, 3 insertions(+), 3 deletions(-)
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diff --git a/drivers/clk/imx/clk-imx6sll.c b/drivers/clk/imx/clk-imx6sll.c
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index 7eea448cb9a9..4d91e48e5918 100644
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--- a/drivers/clk/imx/clk-imx6sll.c
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+++ b/drivers/clk/imx/clk-imx6sll.c
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@@ -307,7 +307,7 @@ static void __init imx6sll_clocks_init(struct device_node *ccm_node)
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clks[IMX6SLL_CLK_WDOG1] = imx_clk_gate2("wdog1", "ipg", base + 0x74, 16);
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clks[IMX6SLL_CLK_MMDC_P0_FAST] = imx_clk_gate_flags("mmdc_p0_fast", "mmdc_podf", base + 0x74, 20, CLK_IS_CRITICAL);
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clks[IMX6SLL_CLK_MMDC_P0_IPG] = imx_clk_gate2_flags("mmdc_p0_ipg", "ipg", base + 0x74, 24, CLK_IS_CRITICAL);
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- clks[IMX6SLL_CLK_MMDC_P1_IPG] = imx_clk_gate2("mmdc_p1_ipg", "ipg", base + 0x74, 26);
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+ clks[IMX6SLL_CLK_MMDC_P1_IPG] = imx_clk_gate2_flags("mmdc_p1_ipg", "ipg", base + 0x74, 26, CLK_IS_CRITICAL);
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clks[IMX6SLL_CLK_OCRAM] = imx_clk_gate_flags("ocram","ahb", base + 0x74, 28, CLK_IS_CRITICAL);
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/* CCGR4 */
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diff --git a/drivers/clk/imx/clk-imx6sx.c b/drivers/clk/imx/clk-imx6sx.c
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index d243e3483e24..b1206e2309bb 100644
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--- a/drivers/clk/imx/clk-imx6sx.c
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+++ b/drivers/clk/imx/clk-imx6sx.c
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@@ -426,7 +426,7 @@ static void __init imx6sx_clocks_init(struct device_node *ccm_node)
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clks[IMX6SX_CLK_MLB] = imx_clk_gate2("mlb", "ahb", base + 0x74, 18);
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clks[IMX6SX_CLK_MMDC_P0_FAST] = imx_clk_gate2_flags("mmdc_p0_fast", "mmdc_podf", base + 0x74, 20, CLK_IS_CRITICAL);
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clks[IMX6SX_CLK_MMDC_P0_IPG] = imx_clk_gate2_flags("mmdc_p0_ipg", "ipg", base + 0x74, 24, CLK_IS_CRITICAL);
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- clks[IMX6SX_CLK_MMDC_P1_IPG] = imx_clk_gate2("mmdc_p1_ipg", "ipg", base + 0x74, 26);
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+ clks[IMX6SX_CLK_MMDC_P1_IPG] = imx_clk_gate2_flags("mmdc_p1_ipg", "ipg", base + 0x74, 26, CLK_IS_CRITICAL);
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clks[IMX6SX_CLK_OCRAM] = imx_clk_gate2_flags("ocram", "ocram_podf", base + 0x74, 28, CLK_IS_CRITICAL);
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/* CCGR4 */
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diff --git a/drivers/clk/imx/clk-imx6ul.c b/drivers/clk/imx/clk-imx6ul.c
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index 8fd52e103cc2..2b64ffe50054 100644
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--- a/drivers/clk/imx/clk-imx6ul.c
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+++ b/drivers/clk/imx/clk-imx6ul.c
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@@ -402,7 +402,7 @@ static void __init imx6ul_clocks_init(struct device_node *ccm_node)
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clks[IMX6UL_CLK_WDOG1] = imx_clk_gate2("wdog1", "ipg", base + 0x74, 16);
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clks[IMX6UL_CLK_MMDC_P0_FAST] = imx_clk_gate_flags("mmdc_p0_fast", "mmdc_podf", base + 0x74, 20, CLK_IS_CRITICAL);
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clks[IMX6UL_CLK_MMDC_P0_IPG] = imx_clk_gate2_flags("mmdc_p0_ipg", "ipg", base + 0x74, 24, CLK_IS_CRITICAL);
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- clks[IMX6UL_CLK_MMDC_P1_IPG] = imx_clk_gate2("mmdc_p1_ipg", "ipg", base + 0x74, 26);
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+ clks[IMX6UL_CLK_MMDC_P1_IPG] = imx_clk_gate2_flags("mmdc_p1_ipg", "ipg", base + 0x74, 26, CLK_IS_CRITICAL);
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clks[IMX6UL_CLK_AXI] = imx_clk_gate_flags("axi", "axi_podf", base + 0x74, 28, CLK_IS_CRITICAL);
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/* CCGR4 */
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--
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2.22.0
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