mirror of
https://github.com/wvdv2002/SMA-SB2500-Off-Grid.git
synced 2025-01-12 18:34:03 +00:00
Logic board PCB design added (converterd from Eagle) and moved powerboard schematic drawings to other folder
This commit is contained in:
parent
2cd6a586b8
commit
d870d55953
41 changed files with 12488 additions and 540 deletions
|
@ -1,540 +0,0 @@
|
|||
EESchema-LIBRARY Version 2.4
|
||||
#encoding utf-8
|
||||
#
|
||||
# Connector_Generic_Conn_02x20_Odd_Even
|
||||
#
|
||||
DEF Connector_Generic_Conn_02x20_Odd_Even J 0 40 Y N 1 F N
|
||||
F0 "J" 50 1000 50 H V C CNN
|
||||
F1 "Connector_Generic_Conn_02x20_Odd_Even" 50 -1100 50 H V C CNN
|
||||
F2 "" 0 0 50 H I C CNN
|
||||
F3 "" 0 0 50 H I C CNN
|
||||
$FPLIST
|
||||
Connector*:*_2x??_*
|
||||
$ENDFPLIST
|
||||
DRAW
|
||||
S -50 -995 0 -1005 1 1 6 N
|
||||
S -50 -895 0 -905 1 1 6 N
|
||||
S -50 -795 0 -805 1 1 6 N
|
||||
S -50 -695 0 -705 1 1 6 N
|
||||
S -50 -595 0 -605 1 1 6 N
|
||||
S -50 -495 0 -505 1 1 6 N
|
||||
S -50 -395 0 -405 1 1 6 N
|
||||
S -50 -295 0 -305 1 1 6 N
|
||||
S -50 -195 0 -205 1 1 6 N
|
||||
S -50 -95 0 -105 1 1 6 N
|
||||
S -50 5 0 -5 1 1 6 N
|
||||
S -50 105 0 95 1 1 6 N
|
||||
S -50 205 0 195 1 1 6 N
|
||||
S -50 305 0 295 1 1 6 N
|
||||
S -50 405 0 395 1 1 6 N
|
||||
S -50 505 0 495 1 1 6 N
|
||||
S -50 605 0 595 1 1 6 N
|
||||
S -50 705 0 695 1 1 6 N
|
||||
S -50 805 0 795 1 1 6 N
|
||||
S -50 905 0 895 1 1 6 N
|
||||
S -50 950 150 -1050 1 1 10 f
|
||||
S 150 -995 100 -1005 1 1 6 N
|
||||
S 150 -895 100 -905 1 1 6 N
|
||||
S 150 -795 100 -805 1 1 6 N
|
||||
S 150 -695 100 -705 1 1 6 N
|
||||
S 150 -595 100 -605 1 1 6 N
|
||||
S 150 -495 100 -505 1 1 6 N
|
||||
S 150 -395 100 -405 1 1 6 N
|
||||
S 150 -295 100 -305 1 1 6 N
|
||||
S 150 -195 100 -205 1 1 6 N
|
||||
S 150 -95 100 -105 1 1 6 N
|
||||
S 150 5 100 -5 1 1 6 N
|
||||
S 150 105 100 95 1 1 6 N
|
||||
S 150 205 100 195 1 1 6 N
|
||||
S 150 305 100 295 1 1 6 N
|
||||
S 150 405 100 395 1 1 6 N
|
||||
S 150 505 100 495 1 1 6 N
|
||||
S 150 605 100 595 1 1 6 N
|
||||
S 150 705 100 695 1 1 6 N
|
||||
S 150 805 100 795 1 1 6 N
|
||||
S 150 905 100 895 1 1 6 N
|
||||
X Pin_1 1 -200 900 150 R 50 50 1 1 P
|
||||
X Pin_10 10 300 500 150 L 50 50 1 1 P
|
||||
X Pin_11 11 -200 400 150 R 50 50 1 1 P
|
||||
X Pin_12 12 300 400 150 L 50 50 1 1 P
|
||||
X Pin_13 13 -200 300 150 R 50 50 1 1 P
|
||||
X Pin_14 14 300 300 150 L 50 50 1 1 P
|
||||
X Pin_15 15 -200 200 150 R 50 50 1 1 P
|
||||
X Pin_16 16 300 200 150 L 50 50 1 1 P
|
||||
X Pin_17 17 -200 100 150 R 50 50 1 1 P
|
||||
X Pin_18 18 300 100 150 L 50 50 1 1 P
|
||||
X Pin_19 19 -200 0 150 R 50 50 1 1 P
|
||||
X Pin_2 2 300 900 150 L 50 50 1 1 P
|
||||
X Pin_20 20 300 0 150 L 50 50 1 1 P
|
||||
X Pin_21 21 -200 -100 150 R 50 50 1 1 P
|
||||
X Pin_22 22 300 -100 150 L 50 50 1 1 P
|
||||
X Pin_23 23 -200 -200 150 R 50 50 1 1 P
|
||||
X Pin_24 24 300 -200 150 L 50 50 1 1 P
|
||||
X Pin_25 25 -200 -300 150 R 50 50 1 1 P
|
||||
X Pin_26 26 300 -300 150 L 50 50 1 1 P
|
||||
X Pin_27 27 -200 -400 150 R 50 50 1 1 P
|
||||
X Pin_28 28 300 -400 150 L 50 50 1 1 P
|
||||
X Pin_29 29 -200 -500 150 R 50 50 1 1 P
|
||||
X Pin_3 3 -200 800 150 R 50 50 1 1 P
|
||||
X Pin_30 30 300 -500 150 L 50 50 1 1 P
|
||||
X Pin_31 31 -200 -600 150 R 50 50 1 1 P
|
||||
X Pin_32 32 300 -600 150 L 50 50 1 1 P
|
||||
X Pin_33 33 -200 -700 150 R 50 50 1 1 P
|
||||
X Pin_34 34 300 -700 150 L 50 50 1 1 P
|
||||
X Pin_35 35 -200 -800 150 R 50 50 1 1 P
|
||||
X Pin_36 36 300 -800 150 L 50 50 1 1 P
|
||||
X Pin_37 37 -200 -900 150 R 50 50 1 1 P
|
||||
X Pin_38 38 300 -900 150 L 50 50 1 1 P
|
||||
X Pin_39 39 -200 -1000 150 R 50 50 1 1 P
|
||||
X Pin_4 4 300 800 150 L 50 50 1 1 P
|
||||
X Pin_40 40 300 -1000 150 L 50 50 1 1 P
|
||||
X Pin_5 5 -200 700 150 R 50 50 1 1 P
|
||||
X Pin_6 6 300 700 150 L 50 50 1 1 P
|
||||
X Pin_7 7 -200 600 150 R 50 50 1 1 P
|
||||
X Pin_8 8 300 600 150 L 50 50 1 1 P
|
||||
X Pin_9 9 -200 500 150 R 50 50 1 1 P
|
||||
ENDDRAW
|
||||
ENDDEF
|
||||
#
|
||||
# Device_EMI_Filter_CommonMode
|
||||
#
|
||||
DEF Device_EMI_Filter_CommonMode FL 0 10 Y N 1 F N
|
||||
F0 "FL" 0 175 50 H V C CNN
|
||||
F1 "Device_EMI_Filter_CommonMode" 0 -175 50 H V C CNN
|
||||
F2 "" 0 40 50 H I C CNN
|
||||
F3 "" 0 40 50 H I C CNN
|
||||
ALIAS EMI_Filter_CommonMode
|
||||
$FPLIST
|
||||
L_*
|
||||
L_CommonMode*
|
||||
$ENDFPLIST
|
||||
DRAW
|
||||
A -80 -80 20 1 1799 0 1 0 N -60 -80 -100 -80
|
||||
A -80 80 20 -1799 -1 0 1 0 N -100 80 -60 80
|
||||
A -40 -80 20 1 1799 0 1 0 N -20 -80 -60 -80
|
||||
A -40 80 20 -1799 -1 0 1 0 N -60 80 -20 80
|
||||
A 0 -80 20 1 1799 0 1 0 N 20 -80 -20 -80
|
||||
A 0 80 20 -1799 -1 0 1 0 N -20 80 20 80
|
||||
A 40 -80 20 1 1799 0 1 0 N 60 -80 20 -80
|
||||
A 40 80 20 -1799 -1 0 1 0 N 20 80 60 80
|
||||
A 80 -80 20 1 1799 0 1 0 N 100 -80 60 -80
|
||||
A 80 80 20 -1799 -1 0 1 0 N 60 80 100 80
|
||||
C -120 -50 10 0 1 0 F
|
||||
C -120 60 10 0 1 0 F
|
||||
P 2 0 1 0 -100 -80 -100 -100 N
|
||||
P 2 0 1 0 -100 20 100 20 N
|
||||
P 2 0 1 0 -100 80 -100 100 N
|
||||
P 2 0 1 0 100 -80 100 -100 N
|
||||
P 2 0 1 0 100 -20 -100 -20 N
|
||||
P 2 0 1 0 100 100 100 80 N
|
||||
X 1 1 -200 100 100 R 50 50 1 1 P
|
||||
X 2 2 200 100 100 L 50 50 1 1 P
|
||||
X 3 3 -200 -100 100 R 50 50 1 1 P
|
||||
X 4 4 200 -100 100 L 50 50 1 1 P
|
||||
ENDDRAW
|
||||
ENDDEF
|
||||
#
|
||||
# Device_L
|
||||
#
|
||||
DEF Device_L L 0 40 N N 1 F N
|
||||
F0 "L" -50 0 50 V V C CNN
|
||||
F1 "Device_L" 75 0 50 V V C CNN
|
||||
F2 "" 0 0 50 H I C CNN
|
||||
F3 "" 0 0 50 H I C CNN
|
||||
$FPLIST
|
||||
Choke_*
|
||||
*Coil*
|
||||
Inductor_*
|
||||
L_*
|
||||
$ENDFPLIST
|
||||
DRAW
|
||||
A 0 -75 25 -899 899 0 1 0 N 0 -100 0 -50
|
||||
A 0 -25 25 -899 899 0 1 0 N 0 -50 0 0
|
||||
A 0 25 25 -899 899 0 1 0 N 0 0 0 50
|
||||
A 0 75 25 -899 899 0 1 0 N 0 50 0 100
|
||||
X 1 1 0 150 50 D 50 50 1 1 P
|
||||
X 2 2 0 -150 50 U 50 50 1 1 P
|
||||
ENDDRAW
|
||||
ENDDEF
|
||||
#
|
||||
# Device_Q_NIGBT_GCE
|
||||
#
|
||||
DEF Device_Q_NIGBT_GCE Q 0 0 Y N 1 F N
|
||||
F0 "Q" 200 50 50 H V L CNN
|
||||
F1 "Device_Q_NIGBT_GCE" 200 -50 50 H V L CNN
|
||||
F2 "" 200 100 50 H I C CNN
|
||||
F3 "" 0 0 50 H I C CNN
|
||||
DRAW
|
||||
C 50 0 111 0 1 10 N
|
||||
P 2 0 1 10 30 -40 30 -80 N
|
||||
P 2 0 1 10 30 20 30 -20 N
|
||||
P 2 0 1 10 30 80 30 40 N
|
||||
P 2 0 1 0 100 -95 30 -60 N
|
||||
P 2 0 1 0 100 -35 30 0 N
|
||||
P 2 0 1 0 100 95 30 60 N
|
||||
P 3 0 1 10 10 75 10 -75 10 -75 N
|
||||
P 4 0 1 0 55 -85 65 -65 100 -95 55 -85 F
|
||||
P 4 0 1 0 85 75 75 95 40 65 85 75 F
|
||||
X G 1 -200 0 210 R 50 50 1 1 I
|
||||
X C 2 100 200 100 D 50 50 1 1 P
|
||||
X E 3 100 -200 100 U 50 50 1 1 P
|
||||
ENDDRAW
|
||||
ENDDEF
|
||||
#
|
||||
# Device_R
|
||||
#
|
||||
DEF Device_R R 0 0 N Y 1 F N
|
||||
F0 "R" 80 0 50 V V C CNN
|
||||
F1 "Device_R" 0 0 50 V V C CNN
|
||||
F2 "" -70 0 50 V I C CNN
|
||||
F3 "" 0 0 50 H I C CNN
|
||||
$FPLIST
|
||||
R_*
|
||||
$ENDFPLIST
|
||||
DRAW
|
||||
S -40 -100 40 100 0 1 10 N
|
||||
X ~ 1 0 150 50 D 50 50 1 1 P
|
||||
X ~ 2 0 -150 50 U 50 50 1 1 P
|
||||
ENDDRAW
|
||||
ENDDEF
|
||||
#
|
||||
# Device_Thermistor_PTC
|
||||
#
|
||||
DEF Device_Thermistor_PTC TH 0 0 N Y 1 F N
|
||||
F0 "TH" -160 0 50 V V C CNN
|
||||
F1 "Device_Thermistor_PTC" 120 0 50 V V C CNN
|
||||
F2 "" 50 -200 50 H I L CNN
|
||||
F3 "" 0 0 50 H I C CNN
|
||||
$FPLIST
|
||||
*PTC*
|
||||
*Thermistor*
|
||||
PIN?ARRAY*
|
||||
bornier*
|
||||
*Terminal?Block*
|
||||
R_*
|
||||
$ENDFPLIST
|
||||
DRAW
|
||||
A -126 88 7 -265 818 0 1 0 N -120 85 -125 95
|
||||
A -110 85 10 1800 -900 0 1 0 N -120 85 -110 75
|
||||
A -110 85 10 -900 0 0 1 0 N -110 75 -100 85
|
||||
A -110 110 10 0 900 0 1 0 N -100 110 -110 120
|
||||
A -110 110 10 900 1800 0 1 0 N -110 120 -120 110
|
||||
A -110 110 10 1800 -900 0 1 0 N -120 110 -110 100
|
||||
A -104 119 20 -1075 -253 0 1 0 N -110 100 -85 110
|
||||
S -40 100 40 -100 0 1 10 N
|
||||
P 2 0 1 0 -100 85 -100 110 N
|
||||
P 4 0 1 0 -70 100 -70 60 70 -60 70 -100 N
|
||||
P 6 0 1 0 -100 -145 -100 -55 -110 -85 -90 -85 -100 -55 -100 -65 F
|
||||
P 6 0 1 0 -70 -145 -70 -55 -80 -85 -60 -85 -70 -55 -70 -65 F
|
||||
X ~ 1 0 150 50 D 50 50 1 1 P
|
||||
X ~ 2 0 -150 50 U 50 50 1 1 P
|
||||
ENDDRAW
|
||||
ENDDEF
|
||||
#
|
||||
# Device_Transformer_1P_1S
|
||||
#
|
||||
DEF Device_Transformer_1P_1S T 0 40 Y N 1 F N
|
||||
F0 "T" 0 250 50 H V C CNN
|
||||
F1 "Device_Transformer_1P_1S" 0 -300 50 H V C CNN
|
||||
F2 "" 0 0 50 H I C CNN
|
||||
F3 "" 0 0 50 H I C CNN
|
||||
DRAW
|
||||
A -100 -150 50 899 1 0 1 0 N -100 -100 -50 -150
|
||||
A -100 -150 50 -1 -899 0 1 0 N -50 -150 -100 -199
|
||||
A -100 -50 50 899 1 0 1 0 N -100 0 -50 -50
|
||||
A -100 -50 50 -1 -899 0 1 0 N -50 -50 -100 -99
|
||||
A -100 50 50 899 1 0 1 0 N -100 100 -50 50
|
||||
A -100 50 50 -1 -899 0 1 0 N -50 50 -100 1
|
||||
A -100 150 50 899 1 0 1 0 N -100 200 -50 150
|
||||
A -100 150 50 -1 -899 0 1 0 N -50 150 -100 101
|
||||
A 100 -50 50 899 -1799 0 1 0 N 100 0 51 -50
|
||||
A 100 -50 50 1799 -899 0 1 0 N 51 -50 100 -99
|
||||
A 100 50 50 899 -1799 0 1 0 N 100 100 51 50
|
||||
A 100 50 50 1799 -899 0 1 0 N 51 50 100 1
|
||||
A 100 150 50 899 -1799 0 1 0 N 100 200 51 150
|
||||
A 100 150 50 1799 -899 0 1 0 N 51 150 100 101
|
||||
A 101 -150 50 910 -1799 0 1 0 N 101 -100 52 -150
|
||||
A 101 -150 50 -912 -1799 0 1 0 N 101 -199 52 -150
|
||||
P 2 0 1 0 -25 200 -25 -200 N
|
||||
P 2 0 1 0 25 -200 25 200 N
|
||||
X AA 1 -400 200 300 R 50 50 1 1 P
|
||||
X AB 2 -400 -200 300 R 50 50 1 1 P
|
||||
X SA 3 400 -200 300 L 50 50 1 1 P
|
||||
X SB 4 400 200 300 L 50 50 1 1 P
|
||||
ENDDRAW
|
||||
ENDDEF
|
||||
#
|
||||
# Device_Transformer_1P_SS
|
||||
#
|
||||
DEF Device_Transformer_1P_SS T 0 40 Y N 1 F N
|
||||
F0 "T" 0 250 50 H V C CNN
|
||||
F1 "Device_Transformer_1P_SS" 0 -300 50 H V C CNN
|
||||
F2 "" 0 0 50 H I C CNN
|
||||
F3 "" 0 0 50 H I C CNN
|
||||
DRAW
|
||||
A -100 -150 50 899 1 0 1 0 N -100 -100 -50 -150
|
||||
A -100 -150 50 -1 -899 0 1 0 N -50 -150 -100 -199
|
||||
A -100 -50 50 899 1 0 1 0 N -100 0 -50 -50
|
||||
A -100 -50 50 -1 -899 0 1 0 N -50 -50 -100 -99
|
||||
A -100 50 50 899 1 0 1 0 N -100 100 -50 50
|
||||
A -100 50 50 -1 -899 0 1 0 N -50 50 -100 1
|
||||
A -100 150 50 899 1 0 1 0 N -100 200 -50 150
|
||||
A -100 150 50 -1 -899 0 1 0 N -50 150 -100 101
|
||||
A 100 -50 50 899 -1799 0 1 0 N 100 0 51 -50
|
||||
A 100 -50 50 1799 -899 0 1 0 N 51 -50 100 -99
|
||||
A 100 50 50 899 -1799 0 1 0 N 100 100 51 50
|
||||
A 100 50 50 1799 -899 0 1 0 N 51 50 100 1
|
||||
A 100 150 50 899 -1799 0 1 0 N 100 200 51 150
|
||||
A 100 150 50 1799 -899 0 1 0 N 51 150 100 101
|
||||
A 101 -150 50 910 -1799 0 1 0 N 101 -100 52 -150
|
||||
A 101 -150 50 -912 -1799 0 1 0 N 101 -199 52 -150
|
||||
P 2 0 1 0 -25 200 -25 -200 N
|
||||
P 2 0 1 0 25 -200 25 200 N
|
||||
X AA 1 -400 200 300 R 50 50 1 1 P
|
||||
X AB 2 -400 -200 300 R 50 50 1 1 P
|
||||
X SA 3 400 -200 300 L 50 50 1 1 P
|
||||
X SC 4 400 0 300 L 50 50 1 1 P
|
||||
X SB 5 400 200 300 L 50 50 1 1 P
|
||||
ENDDRAW
|
||||
ENDDEF
|
||||
#
|
||||
# Device_Varistor
|
||||
#
|
||||
DEF Device_Varistor RV 0 0 N Y 1 F N
|
||||
F0 "RV" 125 0 50 V V C CNN
|
||||
F1 "Device_Varistor" -125 0 50 V V C CNN
|
||||
F2 "" -70 0 50 V I C CNN
|
||||
F3 "" 0 0 50 H I C CNN
|
||||
$FPLIST
|
||||
RV_*
|
||||
Varistor*
|
||||
$ENDFPLIST
|
||||
DRAW
|
||||
T 0 -70 -80 50 0 0 0 U Normal 0 C C
|
||||
S -40 -100 40 100 0 1 10 N
|
||||
P 3 0 1 0 -75 100 -75 50 75 -50 N
|
||||
X ~ 1 0 150 50 D 50 50 1 1 P
|
||||
X ~ 2 0 -150 50 U 50 50 1 1 P
|
||||
ENDDRAW
|
||||
ENDDEF
|
||||
#
|
||||
# Filter_1FP41-4R
|
||||
#
|
||||
DEF Filter_1FP41-4R FL 0 20 Y Y 1 F N
|
||||
F0 "FL" 0 300 50 H V C CNN
|
||||
F1 "Filter_1FP41-4R" 0 200 50 H V C CNN
|
||||
F2 "Filter:Filter_FILTERCON_1FPxx" 0 0 50 H I C CNN
|
||||
F3 "" 0 0 50 H I C CNN
|
||||
ALIAS 1FP65-0R 1FP45-1R 1FP65-1R 1FP44-2R 1FP64-2R 1FP42-3R 1FP62-3R 1FP41-4R 1FP61-4R
|
||||
$FPLIST
|
||||
Filter*FILTERCON*1FPxx*
|
||||
$ENDFPLIST
|
||||
DRAW
|
||||
A -45 -100 15 1 1799 1 1 0 N -30 -100 -60 -100
|
||||
A -45 100 15 1 1799 1 1 0 N -30 100 -60 100
|
||||
A -15 -100 15 1 1799 1 1 0 N 0 -100 -30 -100
|
||||
A -15 100 15 1 1799 1 1 0 N 0 100 -30 100
|
||||
A 15 -100 15 1 1799 1 1 0 N 30 -100 0 -100
|
||||
A 15 100 15 1 1799 1 1 0 N 30 100 0 100
|
||||
A 45 -100 15 1 1799 1 1 0 N 60 -100 30 -100
|
||||
A 45 100 15 1 1799 1 1 0 N 60 100 30 100
|
||||
C 0 0 71 1 1 0 N
|
||||
S -400 150 400 -150 1 1 10 f
|
||||
S -190 -10 -110 -20 1 1 0 F
|
||||
S -190 10 -110 20 1 1 0 F
|
||||
S 110 -10 190 -20 1 1 0 F
|
||||
S 110 10 190 20 1 1 0 F
|
||||
P 2 1 1 0 -270 -50 -270 50 N
|
||||
P 2 1 1 0 -270 -50 -230 -50 N
|
||||
P 2 1 1 0 -270 50 -230 50 N
|
||||
P 2 1 1 0 -250 -50 -250 -100 N
|
||||
P 2 1 1 0 -250 50 -250 100 N
|
||||
P 2 1 1 0 -230 -50 -230 50 N
|
||||
P 2 1 1 0 -150 -20 -150 -100 N
|
||||
P 2 1 1 0 -150 20 -150 100 N
|
||||
P 2 1 1 0 -60 -100 -300 -100 N
|
||||
P 2 1 1 0 -60 100 -300 100 N
|
||||
P 2 1 1 0 60 -100 280 -100 N
|
||||
P 2 1 1 0 150 -20 150 -100 N
|
||||
P 2 1 1 0 150 20 150 100 N
|
||||
P 2 1 1 0 280 100 60 100 N
|
||||
X P 1 -500 100 100 R 50 50 1 1 P
|
||||
X P' 2 500 100 100 L 50 50 1 1 P
|
||||
X N 3 -500 -100 100 R 50 50 1 1 P
|
||||
X N' 4 500 -100 100 L 50 50 1 1 P
|
||||
ENDDRAW
|
||||
ENDDEF
|
||||
#
|
||||
# Relay_RM50-xx21
|
||||
#
|
||||
DEF Relay_RM50-xx21 K 0 20 Y Y 1 F N
|
||||
F0 "K" 450 150 50 H V L CNN
|
||||
F1 "Relay_RM50-xx21" 450 50 50 H V L CNN
|
||||
F2 "Relay_THT:Relay_SPST_Finder_32.21-x300" 1270 -30 50 H I C CNN
|
||||
F3 "" 0 0 50 H I C CNN
|
||||
ALIAS FINDER-36.11-4301 RM50-xx21
|
||||
$FPLIST
|
||||
Relay*SPST*Finder*32.21*x300*
|
||||
$ENDFPLIST
|
||||
DRAW
|
||||
S -400 200 400 -200 0 1 10 f
|
||||
S -325 75 -75 -75 0 1 10 N
|
||||
P 2 0 1 10 -300 -75 -100 75 N
|
||||
P 2 0 1 0 -200 -200 -200 -75 N
|
||||
P 2 0 1 0 -200 200 -200 75 N
|
||||
P 2 0 1 10 -75 0 -50 0 N
|
||||
P 2 0 1 10 -25 0 0 0 N
|
||||
P 2 0 1 10 25 0 50 0 N
|
||||
P 2 0 1 10 75 0 100 0 N
|
||||
P 2 0 1 10 125 0 150 0 N
|
||||
P 2 0 1 20 200 -100 125 150 N
|
||||
P 2 0 1 0 200 -100 200 -200 N
|
||||
P 4 0 1 0 300 200 300 100 275 125 300 150 N
|
||||
X ~ 11 200 -300 100 U 50 50 1 1 P
|
||||
X ~ 14 300 300 100 D 50 50 1 1 P
|
||||
X ~ A1 -200 300 100 D 50 50 1 1 P
|
||||
X ~ A2 -200 -300 100 U 50 50 1 1 P
|
||||
ENDDRAW
|
||||
ENDDEF
|
||||
#
|
||||
# Sensor_Current_HX15-P-SP2
|
||||
#
|
||||
DEF Sensor_Current_HX15-P-SP2 U 0 20 Y Y 1 F N
|
||||
F0 "U" -200 350 50 H V R CNN
|
||||
F1 "Sensor_Current_HX15-P-SP2" 550 350 50 H V R CNN
|
||||
F2 "Sensor_Current:LEM_HX15-P-SP2" 0 0 50 H I C CNN
|
||||
F3 "" 0 0 50 H I C CNN
|
||||
$FPLIST
|
||||
LEM*HX15*P*SP2*
|
||||
$ENDFPLIST
|
||||
DRAW
|
||||
S -300 300 300 -300 0 1 10 f
|
||||
X GND 1 0 -400 100 U 50 50 1 1 W
|
||||
X GND 2 100 -400 100 U 50 50 1 1 W
|
||||
X + 3 0 400 100 D 50 50 1 1 W
|
||||
X OUT 4 400 0 100 L 50 50 1 1 O
|
||||
X IN+ 5 -400 100 100 R 50 50 1 1 P
|
||||
X IN- 6 -400 -100 100 R 50 50 1 1 P
|
||||
ENDDRAW
|
||||
ENDDEF
|
||||
#
|
||||
# power_+15V
|
||||
#
|
||||
DEF power_+15V #PWR 0 0 Y Y 1 F P
|
||||
F0 "#PWR" 0 -150 50 H I C CNN
|
||||
F1 "power_+15V" 0 140 50 H V C CNN
|
||||
F2 "" 0 0 50 H I C CNN
|
||||
F3 "" 0 0 50 H I C CNN
|
||||
DRAW
|
||||
P 2 0 1 0 -30 50 0 100 N
|
||||
P 2 0 1 0 0 0 0 100 N
|
||||
P 2 0 1 0 0 100 30 50 N
|
||||
X +15V 1 0 0 0 U 50 50 1 1 W N
|
||||
ENDDRAW
|
||||
ENDDEF
|
||||
#
|
||||
# power_+VDC
|
||||
#
|
||||
DEF power_+VDC #PWR 0 0 Y Y 1 F P
|
||||
F0 "#PWR" 0 -100 50 H I C CNN
|
||||
F1 "power_+VDC" 0 250 50 H V C CNN
|
||||
F2 "" 0 0 50 H I C CNN
|
||||
F3 "" 0 0 50 H I C CNN
|
||||
DRAW
|
||||
C 0 125 75 0 1 10 N
|
||||
P 2 0 1 20 -45 125 45 125 N
|
||||
P 2 0 1 0 0 0 0 50 N
|
||||
P 2 0 1 20 0 80 0 170 N
|
||||
X +VDC 1 0 0 0 U 50 50 1 1 W N
|
||||
ENDDRAW
|
||||
ENDDEF
|
||||
#
|
||||
# power_-15V
|
||||
#
|
||||
DEF power_-15V #PWR 0 0 Y Y 1 F P
|
||||
F0 "#PWR" 0 100 50 H I C CNN
|
||||
F1 "power_-15V" 0 150 50 H V C CNN
|
||||
F2 "" 0 0 50 H I C CNN
|
||||
F3 "" 0 0 50 H I C CNN
|
||||
DRAW
|
||||
P 6 0 1 0 0 0 0 50 30 50 0 100 -30 50 0 50 F
|
||||
X -15V 1 0 0 0 U 50 50 0 0 W N
|
||||
ENDDRAW
|
||||
ENDDEF
|
||||
#
|
||||
# power_-VDC
|
||||
#
|
||||
DEF power_-VDC #PWR 0 0 Y Y 1 F P
|
||||
F0 "#PWR" 0 -100 50 H I C CNN
|
||||
F1 "power_-VDC" 0 250 50 H V C CNN
|
||||
F2 "" 0 0 50 H I C CNN
|
||||
F3 "" 0 0 50 H I C CNN
|
||||
DRAW
|
||||
C 0 125 75 0 1 10 N
|
||||
P 2 0 1 20 -45 125 45 125 N
|
||||
P 2 0 1 0 0 0 0 50 N
|
||||
X -VDC 1 0 0 0 U 50 50 1 1 W N
|
||||
ENDDRAW
|
||||
ENDDEF
|
||||
#
|
||||
# power_Earth
|
||||
#
|
||||
DEF power_Earth #PWR 0 0 Y Y 1 F P
|
||||
F0 "#PWR" 0 -250 50 H I C CNN
|
||||
F1 "power_Earth" 0 -150 50 H I C CNN
|
||||
F2 "" 0 0 50 H I C CNN
|
||||
F3 "" 0 0 50 H I C CNN
|
||||
DRAW
|
||||
P 2 0 1 0 -25 -75 25 -75 N
|
||||
P 2 0 1 0 -5 -100 5 -100 N
|
||||
P 2 0 1 0 0 -50 0 0 N
|
||||
P 2 0 1 0 50 -50 -50 -50 N
|
||||
X Earth 1 0 0 0 D 50 50 1 1 W N
|
||||
ENDDRAW
|
||||
ENDDEF
|
||||
#
|
||||
# power_GND
|
||||
#
|
||||
DEF power_GND #PWR 0 0 Y Y 1 F P
|
||||
F0 "#PWR" 0 -250 50 H I C CNN
|
||||
F1 "power_GND" 0 -150 50 H V C CNN
|
||||
F2 "" 0 0 50 H I C CNN
|
||||
F3 "" 0 0 50 H I C CNN
|
||||
DRAW
|
||||
P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N
|
||||
X GND 1 0 0 0 D 50 50 1 1 W N
|
||||
ENDDRAW
|
||||
ENDDEF
|
||||
#
|
||||
# power_PRI_MID
|
||||
#
|
||||
DEF power_PRI_MID #PWR 0 0 Y Y 1 F P
|
||||
F0 "#PWR" 0 -150 50 H I C CNN
|
||||
F1 "power_PRI_MID" 0 150 50 H V C CNN
|
||||
F2 "" 0 0 50 H I C CNN
|
||||
F3 "" 0 0 50 H I C CNN
|
||||
DRAW
|
||||
P 2 0 1 0 -30 50 0 100 N
|
||||
P 2 0 1 0 0 0 0 100 N
|
||||
P 2 0 1 0 0 100 30 50 N
|
||||
X PRI_MID 1 0 0 0 U 50 50 1 1 W N
|
||||
ENDDRAW
|
||||
ENDDEF
|
||||
#
|
||||
# pspice_CAP
|
||||
#
|
||||
DEF pspice_CAP C 0 10 Y Y 1 F N
|
||||
F0 "C" 100 150 50 V V C CNN
|
||||
F1 "pspice_CAP" 100 -150 50 V V C CNN
|
||||
F2 "" 0 0 50 H I C CNN
|
||||
F3 "" 0 0 50 H I C CNN
|
||||
ALIAS C
|
||||
DRAW
|
||||
P 2 0 1 0 -150 -50 150 -50 N
|
||||
P 2 0 1 0 -150 50 150 50 N
|
||||
X ~ 1 0 250 200 D 40 40 1 1 P
|
||||
X ~ 2 0 -250 200 U 40 40 1 1 P
|
||||
ENDDRAW
|
||||
ENDDEF
|
||||
#
|
||||
#End Library
|
836
PCB/kicad/logicBoard/Microcontroller.sch
Normal file
836
PCB/kicad/logicBoard/Microcontroller.sch
Normal file
|
@ -0,0 +1,836 @@
|
|||
EESchema Schematic File Version 4
|
||||
EELAYER 30 0
|
||||
EELAYER END
|
||||
$Descr User 12398 8268
|
||||
encoding utf-8
|
||||
Sheet 1 4
|
||||
Title ""
|
||||
Date ""
|
||||
Rev ""
|
||||
Comp ""
|
||||
Comment1 ""
|
||||
Comment2 ""
|
||||
Comment3 ""
|
||||
Comment4 ""
|
||||
$EndDescr
|
||||
Wire Wire Line
|
||||
5800 4100 5100 4100
|
||||
Text GLabel 5800 4100 0 10 BiDi ~ 0
|
||||
GND
|
||||
Wire Wire Line
|
||||
8100 2500 8900 2500
|
||||
Text GLabel 8100 2500 0 10 BiDi ~ 0
|
||||
GND
|
||||
Wire Wire Line
|
||||
4900 3500 5800 3500
|
||||
Text GLabel 4900 3500 0 10 BiDi ~ 0
|
||||
GND
|
||||
Wire Wire Line
|
||||
8900 4100 9000 4100
|
||||
Text GLabel 8900 4100 0 10 BiDi ~ 0
|
||||
GND
|
||||
Wire Wire Line
|
||||
3200 3800 3200 4000
|
||||
Wire Wire Line
|
||||
3200 4000 3600 4000
|
||||
Wire Wire Line
|
||||
3600 3800 3600 4000
|
||||
Wire Wire Line
|
||||
3200 4000 3200 4200
|
||||
Connection ~ 3200 4000
|
||||
Text GLabel 3200 3800 0 10 BiDi ~ 0
|
||||
GND
|
||||
Wire Wire Line
|
||||
8900 2800 8100 2800
|
||||
Text GLabel 8900 2800 0 10 BiDi ~ 0
|
||||
GND
|
||||
Wire Wire Line
|
||||
10100 4000 10300 4000
|
||||
Wire Wire Line
|
||||
10300 4000 10500 4000
|
||||
Wire Wire Line
|
||||
10500 4000 10700 4000
|
||||
Wire Wire Line
|
||||
10700 4000 10900 4000
|
||||
Connection ~ 10300 4000
|
||||
Connection ~ 10500 4000
|
||||
Connection ~ 10700 4000
|
||||
Connection ~ 10100 4000
|
||||
Text GLabel 10100 4000 0 10 BiDi ~ 0
|
||||
GND
|
||||
Wire Wire Line
|
||||
4800 3900 4600 3900
|
||||
Wire Wire Line
|
||||
4600 3900 4400 3900
|
||||
Text GLabel 4800 3900 0 10 BiDi ~ 0
|
||||
GND
|
||||
Wire Wire Line
|
||||
9300 4000 9300 3900
|
||||
Text GLabel 9300 4000 0 10 BiDi ~ 0
|
||||
GND
|
||||
Wire Wire Line
|
||||
1200 3600 1400 3600
|
||||
Text GLabel 1200 3600 0 10 BiDi ~ 0
|
||||
GND
|
||||
Wire Wire Line
|
||||
8100 2400 8900 2400
|
||||
Text GLabel 8100 2400 0 10 BiDi ~ 0
|
||||
+3V3
|
||||
Wire Wire Line
|
||||
8100 4000 9000 4000
|
||||
Text GLabel 8100 4000 0 10 BiDi ~ 0
|
||||
+3V3
|
||||
Wire Wire Line
|
||||
5800 4200 5100 4200
|
||||
Text GLabel 5800 4200 0 10 BiDi ~ 0
|
||||
+3V3
|
||||
Wire Wire Line
|
||||
5800 5500 5100 5500
|
||||
Text GLabel 5800 5500 0 10 BiDi ~ 0
|
||||
+3V3
|
||||
Wire Wire Line
|
||||
5800 2400 5100 2400
|
||||
Text GLabel 5800 2400 0 10 BiDi ~ 0
|
||||
+3V3
|
||||
Wire Wire Line
|
||||
10100 3700 10300 3700
|
||||
Wire Wire Line
|
||||
10300 3700 10500 3700
|
||||
Wire Wire Line
|
||||
10500 3700 10700 3700
|
||||
Wire Wire Line
|
||||
10700 3700 10900 3700
|
||||
Connection ~ 10700 3700
|
||||
Connection ~ 10500 3700
|
||||
Connection ~ 10300 3700
|
||||
Connection ~ 10100 3700
|
||||
Text GLabel 10100 3700 0 10 BiDi ~ 0
|
||||
+3V3
|
||||
Wire Wire Line
|
||||
4200 3500 4200 3600
|
||||
Text GLabel 4200 3500 0 10 BiDi ~ 0
|
||||
+3V3
|
||||
Wire Wire Line
|
||||
5400 5400 5800 5400
|
||||
Wire Wire Line
|
||||
8100 4100 8600 4100
|
||||
Wire Wire Line
|
||||
5800 2800 3200 2800
|
||||
Wire Wire Line
|
||||
3200 2800 3200 3200
|
||||
Wire Wire Line
|
||||
3200 3200 3200 3500
|
||||
Wire Wire Line
|
||||
3300 3200 3200 3200
|
||||
Connection ~ 3200 3200
|
||||
Wire Wire Line
|
||||
5800 2900 3600 2900
|
||||
Wire Wire Line
|
||||
3600 2900 3600 3200
|
||||
Wire Wire Line
|
||||
3600 3200 3600 3500
|
||||
Wire Wire Line
|
||||
3500 3200 3600 3200
|
||||
Connection ~ 3600 3200
|
||||
Wire Wire Line
|
||||
5800 3000 5600 3000
|
||||
Text GLabel 5600 3000 0 50 BiDi ~ 0
|
||||
RESET
|
||||
Wire Wire Line
|
||||
8100 4200 8400 4200
|
||||
Text GLabel 8400 4200 2 50 BiDi ~ 0
|
||||
SWDIO
|
||||
Wire Wire Line
|
||||
8100 3900 8400 3900
|
||||
Text GLabel 8400 3900 2 50 BiDi ~ 0
|
||||
SWCLK
|
||||
Wire Wire Line
|
||||
8100 3300 8400 3300
|
||||
Text GLabel 8400 3300 2 50 BiDi ~ 0
|
||||
SWO
|
||||
Wire Wire Line
|
||||
8100 3500 8400 3500
|
||||
Text GLabel 8400 3500 2 50 BiDi ~ 0
|
||||
LCD_D4
|
||||
Wire Wire Line
|
||||
5800 5100 5600 5100
|
||||
Text GLabel 5600 5100 0 50 BiDi ~ 0
|
||||
LED_RED
|
||||
Wire Wire Line
|
||||
5800 5000 5600 5000
|
||||
Text GLabel 5600 5000 0 50 BiDi ~ 0
|
||||
LCD_MIC
|
||||
Wire Wire Line
|
||||
8100 5200 8400 5200
|
||||
Text GLabel 8400 5200 2 50 BiDi ~ 0
|
||||
BRIDGE1_LIN
|
||||
Wire Wire Line
|
||||
8100 3800 9300 3800
|
||||
Text Label 8400 3800 0 50 ~ 0
|
||||
IO_IN1
|
||||
Wire Wire Line
|
||||
8400 3200 8100 3200
|
||||
Text GLabel 8400 3200 2 50 BiDi ~ 0
|
||||
LCD_RS
|
||||
Wire Wire Line
|
||||
8100 4400 8400 4400
|
||||
Text GLabel 8400 4400 2 50 BiDi ~ 0
|
||||
IO_OUT0
|
||||
Wire Wire Line
|
||||
8100 5000 8400 5000
|
||||
Text GLabel 8400 5000 2 50 BiDi ~ 0
|
||||
LCD_RW
|
||||
Wire Wire Line
|
||||
8100 4900 8400 4900
|
||||
Text GLabel 8400 4900 2 50 BiDi ~ 0
|
||||
LCD_BACKL
|
||||
Wire Wire Line
|
||||
8100 4800 8400 4800
|
||||
Text GLabel 8400 4800 2 50 BiDi ~ 0
|
||||
LCD_SWB
|
||||
Wire Wire Line
|
||||
8100 5100 8400 5100
|
||||
Text GLabel 8400 5100 2 50 BiDi ~ 0
|
||||
HEARTBEAT_LED
|
||||
Wire Wire Line
|
||||
5800 5300 4800 5300
|
||||
Wire Wire Line
|
||||
8100 5300 8400 5300
|
||||
Text GLabel 8400 5300 2 50 BiDi ~ 0
|
||||
BRIDGE0_LIN
|
||||
Wire Wire Line
|
||||
4800 3600 4600 3600
|
||||
Wire Wire Line
|
||||
4800 3600 5800 3600
|
||||
Wire Wire Line
|
||||
5800 3700 5600 3700
|
||||
Text GLabel 5600 3700 0 50 BiDi ~ 0
|
||||
VARISTOR_SENSE
|
||||
Wire Wire Line
|
||||
8400 3000 8100 3000
|
||||
Text GLabel 8400 3000 2 50 BiDi ~ 0
|
||||
RS485_TX
|
||||
Text GLabel 8400 3000 2 50 BiDi ~ 0
|
||||
RS485_TX
|
||||
Wire Wire Line
|
||||
8100 3600 8400 3600
|
||||
Text GLabel 8400 3600 2 50 BiDi ~ 0
|
||||
LCD_D6
|
||||
Wire Wire Line
|
||||
8100 3700 8400 3700
|
||||
Text GLabel 8400 3700 2 50 BiDi ~ 0
|
||||
LCD_D7
|
||||
Wire Wire Line
|
||||
8100 4300 8400 4300
|
||||
Text GLabel 8400 4300 2 50 BiDi ~ 0
|
||||
RS485_TXENA
|
||||
Wire Wire Line
|
||||
8100 2600 8400 2600
|
||||
Text GLabel 8400 2600 2 50 BiDi ~ 0
|
||||
RS485_RXENA
|
||||
Wire Wire Line
|
||||
5800 4700 5600 4700
|
||||
Text GLabel 5600 4700 0 50 BiDi ~ 0
|
||||
ADC_IN1
|
||||
Wire Wire Line
|
||||
8100 5400 8400 5400
|
||||
Text GLabel 8400 5400 2 50 BiDi ~ 0
|
||||
BRIDGES_SHUTDOWN
|
||||
Wire Wire Line
|
||||
8400 2900 8100 2900
|
||||
Text GLabel 8400 2900 2 50 BiDi ~ 0
|
||||
RS485_RX
|
||||
Wire Wire Line
|
||||
8100 4500 8400 4500
|
||||
Text GLabel 8400 4500 2 50 BiDi ~ 0
|
||||
BRIDGE1_HIN
|
||||
Wire Wire Line
|
||||
8100 4600 8400 4600
|
||||
Text GLabel 8400 4600 2 50 BiDi ~ 0
|
||||
BRIDGE0_HIN
|
||||
Wire Wire Line
|
||||
8100 4700 8400 4700
|
||||
Text GLabel 8400 4700 2 50 BiDi ~ 0
|
||||
IO_OUT1
|
||||
Wire Wire Line
|
||||
4700 4700 4300 4700
|
||||
Text Label 4300 4700 2 50 ~ 0
|
||||
ISOLATION_SENSE
|
||||
Wire Wire Line
|
||||
5800 4800 5600 4800
|
||||
Text Label 5600 4800 2 50 ~ 0
|
||||
ISOLATION_SENSE
|
||||
Wire Wire Line
|
||||
5800 4900 5600 4900
|
||||
Text Label 5600 4900 2 50 ~ 0
|
||||
IO_IN2
|
||||
Wire Wire Line
|
||||
4700 4800 4300 4800
|
||||
Text Label 4300 4800 2 50 ~ 0
|
||||
IO_IN2
|
||||
Wire Wire Line
|
||||
8100 5500 8400 5500
|
||||
Text GLabel 8400 5500 2 50 BiDi ~ 0
|
||||
LED_GREEN
|
||||
Wire Wire Line
|
||||
8100 3400 8400 3400
|
||||
Text GLabel 8400 3400 2 50 BiDi ~ 0
|
||||
LCD_SWA
|
||||
Wire Wire Line
|
||||
8100 3100 8400 3100
|
||||
Text GLabel 8400 3100 2 50 BiDi ~ 0
|
||||
LCD_ENA
|
||||
Wire Wire Line
|
||||
5800 2700 5600 2700
|
||||
Text GLabel 5600 2700 0 50 BiDi ~ 0
|
||||
GRIDRELAY_0
|
||||
Wire Wire Line
|
||||
5800 2600 5600 2600
|
||||
Text GLabel 5600 2600 0 50 BiDi ~ 0
|
||||
GRIDRELAY_1
|
||||
Wire Wire Line
|
||||
5800 3900 5600 3900
|
||||
Text Label 5600 3900 2 50 ~ 0
|
||||
USART2_TX
|
||||
Wire Wire Line
|
||||
1200 3400 1400 3400
|
||||
Text Label 1400 3400 0 50 ~ 0
|
||||
USART2_TX
|
||||
Wire Wire Line
|
||||
5800 4000 5600 4000
|
||||
Text Label 5600 4000 2 50 ~ 0
|
||||
USART2_RX
|
||||
Wire Wire Line
|
||||
1200 3500 1400 3500
|
||||
Text Label 1400 3500 0 50 ~ 0
|
||||
USART2_RX
|
||||
Wire Wire Line
|
||||
5800 2500 5600 2500
|
||||
Text Label 5600 2500 2 50 ~ 0
|
||||
NCNO3
|
||||
Wire Wire Line
|
||||
8100 2700 8400 2700
|
||||
Text GLabel 8400 2700 2 50 BiDi ~ 0
|
||||
LCD_D5
|
||||
Wire Wire Line
|
||||
5800 5200 5600 5200
|
||||
Text GLabel 5600 5200 0 50 BiDi ~ 0
|
||||
LED_YELLOW
|
||||
Wire Wire Line
|
||||
5800 4300 5600 4300
|
||||
Text GLabel 5600 4300 0 50 BiDi ~ 0
|
||||
VDCBUS
|
||||
Wire Wire Line
|
||||
5800 3800 5600 3800
|
||||
Text GLabel 5600 3800 0 50 BiDi ~ 0
|
||||
TEMPHEAT
|
||||
Wire Wire Line
|
||||
5800 4600 5600 4600
|
||||
Text GLabel 5600 4600 0 50 BiDi ~ 0
|
||||
IO_IN0
|
||||
Wire Wire Line
|
||||
5800 4500 5600 4500
|
||||
Text GLabel 5600 4500 0 50 BiDi ~ 0
|
||||
RELAY0_CHECK
|
||||
Wire Wire Line
|
||||
5800 4400 5600 4400
|
||||
Text GLabel 5600 4400 0 50 BiDi ~ 0
|
||||
RELAY1_CHECK
|
||||
Wire Wire Line
|
||||
5800 3100 5600 3100
|
||||
Text GLabel 5600 3100 0 50 BiDi ~ 0
|
||||
ADC_IN0
|
||||
Wire Wire Line
|
||||
5800 3200 5600 3200
|
||||
Text GLabel 5600 3200 0 50 BiDi ~ 0
|
||||
CURSENS
|
||||
Wire Wire Line
|
||||
5800 3300 5600 3300
|
||||
Text GLabel 5600 3300 0 50 BiDi ~ 0
|
||||
TRAFO
|
||||
Wire Wire Line
|
||||
5800 3400 5600 3400
|
||||
Text Label 5600 3400 2 50 ~ 0
|
||||
NC
|
||||
$Comp
|
||||
L SB_LOGICBOARD_V01-eagle-import:STM32F405RG U$5
|
||||
U 1 1 BCE09641
|
||||
P 6900 4000
|
||||
AR Path="/BCE09641" Ref="U$5" Part="1"
|
||||
AR Path="/6303E571/BCE09641" Ref="U$5" Part="1"
|
||||
F 0 "U$5" H 6000 5900 85 0000 L BNN
|
||||
F 1 "STM32F405RG" H 6000 2100 85 0000 L BNN
|
||||
F 2 "SB_LOGICBOARD_V01:TQFP64" H 6900 4000 50 0001 C CNN
|
||||
F 3 "" H 6900 4000 50 0001 C CNN
|
||||
1 6900 4000
|
||||
1 0 0 -1
|
||||
$EndComp
|
||||
$Comp
|
||||
L SB_LOGICBOARD_V01-eagle-import:+3V3 #+3V7
|
||||
U 1 1 A67731B0
|
||||
P 9000 2400
|
||||
AR Path="/A67731B0" Ref="#+3V7" Part="1"
|
||||
AR Path="/6303E571/A67731B0" Ref="#+3V07" Part="1"
|
||||
F 0 "#+3V07" H 9000 2400 50 0001 C CNN
|
||||
F 1 "+3V3" V 8900 2200 59 0000 L BNN
|
||||
F 2 "" H 9000 2400 50 0001 C CNN
|
||||
F 3 "" H 9000 2400 50 0001 C CNN
|
||||
1 9000 2400
|
||||
0 1 1 0
|
||||
$EndComp
|
||||
$Comp
|
||||
L SB_LOGICBOARD_V01-eagle-import:+3V3 #+3V8
|
||||
U 1 1 7BD3A1AE
|
||||
P 5000 5500
|
||||
AR Path="/7BD3A1AE" Ref="#+3V8" Part="1"
|
||||
AR Path="/6303E571/7BD3A1AE" Ref="#+3V08" Part="1"
|
||||
F 0 "#+3V08" H 5000 5500 50 0001 C CNN
|
||||
F 1 "+3V3" V 4900 5300 59 0000 L BNN
|
||||
F 2 "" H 5000 5500 50 0001 C CNN
|
||||
F 3 "" H 5000 5500 50 0001 C CNN
|
||||
1 5000 5500
|
||||
0 -1 -1 0
|
||||
$EndComp
|
||||
$Comp
|
||||
L SB_LOGICBOARD_V01-eagle-import:+3V3 #+3V9
|
||||
U 1 1 4A62666F
|
||||
P 5000 4200
|
||||
AR Path="/4A62666F" Ref="#+3V9" Part="1"
|
||||
AR Path="/6303E571/4A62666F" Ref="#+3V09" Part="1"
|
||||
F 0 "#+3V09" H 5000 4200 50 0001 C CNN
|
||||
F 1 "+3V3" V 4900 4000 59 0000 L BNN
|
||||
F 2 "" H 5000 4200 50 0001 C CNN
|
||||
F 3 "" H 5000 4200 50 0001 C CNN
|
||||
1 5000 4200
|
||||
0 -1 -1 0
|
||||
$EndComp
|
||||
$Comp
|
||||
L SB_LOGICBOARD_V01-eagle-import:+3V3 #+3V10
|
||||
U 1 1 A80C603B
|
||||
P 9100 4000
|
||||
AR Path="/A80C603B" Ref="#+3V10" Part="1"
|
||||
AR Path="/6303E571/A80C603B" Ref="#+3V010" Part="1"
|
||||
F 0 "#+3V010" H 9100 4000 50 0001 C CNN
|
||||
F 1 "+3V3" V 9000 3800 59 0000 L BNN
|
||||
F 2 "" H 9100 4000 50 0001 C CNN
|
||||
F 3 "" H 9100 4000 50 0001 C CNN
|
||||
1 9100 4000
|
||||
0 1 1 0
|
||||
$EndComp
|
||||
$Comp
|
||||
L SB_LOGICBOARD_V01-eagle-import:GND #GND39
|
||||
U 1 1 76CA36D4
|
||||
P 5000 4100
|
||||
AR Path="/76CA36D4" Ref="#GND39" Part="1"
|
||||
AR Path="/6303E571/76CA36D4" Ref="#GND039" Part="1"
|
||||
F 0 "#GND039" H 5000 4100 50 0001 C CNN
|
||||
F 1 "GND" H 4900 4000 59 0000 L BNN
|
||||
F 2 "" H 5000 4100 50 0001 C CNN
|
||||
F 3 "" H 5000 4100 50 0001 C CNN
|
||||
1 5000 4100
|
||||
0 1 1 0
|
||||
$EndComp
|
||||
$Comp
|
||||
L SB_LOGICBOARD_V01-eagle-import:GND #GND40
|
||||
U 1 1 2B74A96F
|
||||
P 9000 2500
|
||||
AR Path="/2B74A96F" Ref="#GND40" Part="1"
|
||||
AR Path="/6303E571/2B74A96F" Ref="#GND040" Part="1"
|
||||
F 0 "#GND040" H 9000 2500 50 0001 C CNN
|
||||
F 1 "GND" H 8900 2400 59 0000 L BNN
|
||||
F 2 "" H 9000 2500 50 0001 C CNN
|
||||
F 3 "" H 9000 2500 50 0001 C CNN
|
||||
1 9000 2500
|
||||
0 -1 -1 0
|
||||
$EndComp
|
||||
$Comp
|
||||
L SB_LOGICBOARD_V01-eagle-import:GND #GND41
|
||||
U 1 1 057C4BD5
|
||||
P 4800 3500
|
||||
AR Path="/057C4BD5" Ref="#GND41" Part="1"
|
||||
AR Path="/6303E571/057C4BD5" Ref="#GND041" Part="1"
|
||||
F 0 "#GND041" H 4800 3500 50 0001 C CNN
|
||||
F 1 "GND" H 4700 3400 59 0000 L BNN
|
||||
F 2 "" H 4800 3500 50 0001 C CNN
|
||||
F 3 "" H 4800 3500 50 0001 C CNN
|
||||
1 4800 3500
|
||||
0 1 1 0
|
||||
$EndComp
|
||||
$Comp
|
||||
L SB_LOGICBOARD_V01-eagle-import:C-EUC0603 C21
|
||||
U 1 1 9E548DD3
|
||||
P 8800 4100
|
||||
AR Path="/9E548DD3" Ref="C21" Part="1"
|
||||
AR Path="/6303E571/9E548DD3" Ref="C21" Part="1"
|
||||
F 0 "C21" H 8860 4115 59 0000 L BNN
|
||||
F 1 "2.2uf/6.3v/x7r" H 8860 3915 59 0000 L BNN
|
||||
F 2 "SB_LOGICBOARD_V01:C0603" H 8800 4100 50 0001 C CNN
|
||||
F 3 "" H 8800 4100 50 0001 C CNN
|
||||
1 8800 4100
|
||||
0 1 1 0
|
||||
$EndComp
|
||||
$Comp
|
||||
L SB_LOGICBOARD_V01-eagle-import:C-EUC0603 C30
|
||||
U 1 1 0344B64C
|
||||
P 5300 5400
|
||||
AR Path="/0344B64C" Ref="C30" Part="1"
|
||||
AR Path="/6303E571/0344B64C" Ref="C30" Part="1"
|
||||
F 0 "C30" H 5360 5415 59 0000 L BNN
|
||||
F 1 "2.2uf/6.3v/x7r" H 5360 5215 59 0000 L BNN
|
||||
F 2 "SB_LOGICBOARD_V01:C0603" H 5300 5400 50 0001 C CNN
|
||||
F 3 "" H 5300 5400 50 0001 C CNN
|
||||
1 5300 5400
|
||||
0 1 1 0
|
||||
$EndComp
|
||||
$Comp
|
||||
L SB_LOGICBOARD_V01-eagle-import:GND #GND42
|
||||
U 1 1 6D21A43A
|
||||
P 5000 5400
|
||||
AR Path="/6D21A43A" Ref="#GND42" Part="1"
|
||||
AR Path="/6303E571/6D21A43A" Ref="#GND042" Part="1"
|
||||
F 0 "#GND042" H 5000 5400 50 0001 C CNN
|
||||
F 1 "GND" H 4900 5300 59 0000 L BNN
|
||||
F 2 "" H 5000 5400 50 0001 C CNN
|
||||
F 3 "" H 5000 5400 50 0001 C CNN
|
||||
1 5000 5400
|
||||
0 1 1 0
|
||||
$EndComp
|
||||
$Comp
|
||||
L SB_LOGICBOARD_V01-eagle-import:GND #GND43
|
||||
U 1 1 7A046983
|
||||
P 9100 4100
|
||||
AR Path="/7A046983" Ref="#GND43" Part="1"
|
||||
AR Path="/6303E571/7A046983" Ref="#GND043" Part="1"
|
||||
F 0 "#GND043" H 9100 4100 50 0001 C CNN
|
||||
F 1 "GND" H 9000 4000 59 0000 L BNN
|
||||
F 2 "" H 9100 4100 50 0001 C CNN
|
||||
F 3 "" H 9100 4100 50 0001 C CNN
|
||||
1 9100 4100
|
||||
0 -1 -1 0
|
||||
$EndComp
|
||||
$Comp
|
||||
L SB_LOGICBOARD_V01-eagle-import:+3V3 #+3V12
|
||||
U 1 1 34CFF32A
|
||||
P 5000 2400
|
||||
AR Path="/34CFF32A" Ref="#+3V12" Part="1"
|
||||
AR Path="/6303E571/34CFF32A" Ref="#+3V012" Part="1"
|
||||
F 0 "#+3V012" H 5000 2400 50 0001 C CNN
|
||||
F 1 "+3V3" V 4900 2200 59 0000 L BNN
|
||||
F 2 "" H 5000 2400 50 0001 C CNN
|
||||
F 3 "" H 5000 2400 50 0001 C CNN
|
||||
1 5000 2400
|
||||
0 -1 -1 0
|
||||
$EndComp
|
||||
$Comp
|
||||
L SB_LOGICBOARD_V01-eagle-import:C-EUC0805 C55
|
||||
U 1 1 B172C0F6
|
||||
P 3200 3600
|
||||
AR Path="/B172C0F6" Ref="C55" Part="1"
|
||||
AR Path="/6303E571/B172C0F6" Ref="C55" Part="1"
|
||||
F 0 "C55" H 3260 3615 59 0000 L BNN
|
||||
F 1 "22pf" H 3260 3415 59 0000 L BNN
|
||||
F 2 "SB_LOGICBOARD_V01:C0805" H 3200 3600 50 0001 C CNN
|
||||
F 3 "" H 3200 3600 50 0001 C CNN
|
||||
1 3200 3600
|
||||
1 0 0 -1
|
||||
$EndComp
|
||||
$Comp
|
||||
L SB_LOGICBOARD_V01-eagle-import:C-EUC0805 C57
|
||||
U 1 1 573C8F8F
|
||||
P 3600 3600
|
||||
AR Path="/573C8F8F" Ref="C57" Part="1"
|
||||
AR Path="/6303E571/573C8F8F" Ref="C57" Part="1"
|
||||
F 0 "C57" H 3660 3615 59 0000 L BNN
|
||||
F 1 "22pf" H 3660 3415 59 0000 L BNN
|
||||
F 2 "SB_LOGICBOARD_V01:C0805" H 3600 3600 50 0001 C CNN
|
||||
F 3 "" H 3600 3600 50 0001 C CNN
|
||||
1 3600 3600
|
||||
1 0 0 -1
|
||||
$EndComp
|
||||
$Comp
|
||||
L SB_LOGICBOARD_V01-eagle-import:GND #GND62
|
||||
U 1 1 4410D087
|
||||
P 3200 4300
|
||||
AR Path="/4410D087" Ref="#GND62" Part="1"
|
||||
AR Path="/6303E571/4410D087" Ref="#GND062" Part="1"
|
||||
F 0 "#GND062" H 3200 4300 50 0001 C CNN
|
||||
F 1 "GND" H 3100 4200 59 0000 L BNN
|
||||
F 2 "" H 3200 4300 50 0001 C CNN
|
||||
F 3 "" H 3200 4300 50 0001 C CNN
|
||||
1 3200 4300
|
||||
1 0 0 -1
|
||||
$EndComp
|
||||
$Comp
|
||||
L SB_LOGICBOARD_V01-eagle-import:CRYSTALCRYSTAL-SMD-5X3-16MHZ Y3
|
||||
U 1 1 169E846A
|
||||
P 3400 3200
|
||||
AR Path="/169E846A" Ref="Y3" Part="1"
|
||||
AR Path="/6303E571/169E846A" Ref="Y3" Part="1"
|
||||
F 0 "Y3" H 3500 3240 59 0000 L BNN
|
||||
F 1 "8.00M-CFPX104" H 3500 3100 59 0000 L BNN
|
||||
F 2 "SB_LOGICBOARD_V01:CRYSTAL-SMD-5X3" H 3400 3200 50 0001 C CNN
|
||||
F 3 "" H 3400 3200 50 0001 C CNN
|
||||
1 3400 3200
|
||||
1 0 0 -1
|
||||
$EndComp
|
||||
$Comp
|
||||
L SB_LOGICBOARD_V01-eagle-import:GND #GND48
|
||||
U 1 1 A043859C
|
||||
P 9000 2800
|
||||
AR Path="/A043859C" Ref="#GND48" Part="1"
|
||||
AR Path="/6303E571/A043859C" Ref="#GND048" Part="1"
|
||||
F 0 "#GND048" H 9000 2800 50 0001 C CNN
|
||||
F 1 "GND" H 8900 2700 59 0000 L BNN
|
||||
F 2 "" H 9000 2800 50 0001 C CNN
|
||||
F 3 "" H 9000 2800 50 0001 C CNN
|
||||
1 9000 2800
|
||||
0 -1 -1 0
|
||||
$EndComp
|
||||
$Comp
|
||||
L SB_LOGICBOARD_V01-eagle-import:C-EUC0603 C37
|
||||
U 1 1 324ED17E
|
||||
P 10100 3800
|
||||
AR Path="/324ED17E" Ref="C37" Part="1"
|
||||
AR Path="/6303E571/324ED17E" Ref="C37" Part="1"
|
||||
F 0 "C37" H 10160 3815 59 0000 L BNN
|
||||
F 1 "2.2uf/6.3v/x7r" H 10160 3615 59 0000 L BNN
|
||||
F 2 "SB_LOGICBOARD_V01:C0603" H 10100 3800 50 0001 C CNN
|
||||
F 3 "" H 10100 3800 50 0001 C CNN
|
||||
1 10100 3800
|
||||
1 0 0 -1
|
||||
$EndComp
|
||||
$Comp
|
||||
L SB_LOGICBOARD_V01-eagle-import:C-EUC0603 C38
|
||||
U 1 1 A1C79CAE
|
||||
P 10300 3800
|
||||
AR Path="/A1C79CAE" Ref="C38" Part="1"
|
||||
AR Path="/6303E571/A1C79CAE" Ref="C38" Part="1"
|
||||
F 0 "C38" H 10360 3815 59 0000 L BNN
|
||||
F 1 "2.2uf/6.3v/x7r" H 10360 3615 59 0000 L BNN
|
||||
F 2 "SB_LOGICBOARD_V01:C0603" H 10300 3800 50 0001 C CNN
|
||||
F 3 "" H 10300 3800 50 0001 C CNN
|
||||
1 10300 3800
|
||||
1 0 0 -1
|
||||
$EndComp
|
||||
$Comp
|
||||
L SB_LOGICBOARD_V01-eagle-import:C-EUC0603 C39
|
||||
U 1 1 D731FBCB
|
||||
P 10500 3800
|
||||
AR Path="/D731FBCB" Ref="C39" Part="1"
|
||||
AR Path="/6303E571/D731FBCB" Ref="C39" Part="1"
|
||||
F 0 "C39" H 10560 3815 59 0000 L BNN
|
||||
F 1 "2.2uf/6.3v/x7r" H 10560 3615 59 0000 L BNN
|
||||
F 2 "SB_LOGICBOARD_V01:C0603" H 10500 3800 50 0001 C CNN
|
||||
F 3 "" H 10500 3800 50 0001 C CNN
|
||||
1 10500 3800
|
||||
1 0 0 -1
|
||||
$EndComp
|
||||
$Comp
|
||||
L SB_LOGICBOARD_V01-eagle-import:C-EUC0603 C40
|
||||
U 1 1 132A8524
|
||||
P 10700 3800
|
||||
AR Path="/132A8524" Ref="C40" Part="1"
|
||||
AR Path="/6303E571/132A8524" Ref="C40" Part="1"
|
||||
F 0 "C40" H 10760 3815 59 0000 L BNN
|
||||
F 1 "2.2uf/6.3v/x7r" H 10760 3615 59 0000 L BNN
|
||||
F 2 "SB_LOGICBOARD_V01:C0603" H 10700 3800 50 0001 C CNN
|
||||
F 3 "" H 10700 3800 50 0001 C CNN
|
||||
1 10700 3800
|
||||
1 0 0 -1
|
||||
$EndComp
|
||||
$Comp
|
||||
L SB_LOGICBOARD_V01-eagle-import:C-EUC0603 C41
|
||||
U 1 1 0D7E0265
|
||||
P 10900 3800
|
||||
AR Path="/0D7E0265" Ref="C41" Part="1"
|
||||
AR Path="/6303E571/0D7E0265" Ref="C41" Part="1"
|
||||
F 0 "C41" H 10960 3815 59 0000 L BNN
|
||||
F 1 "2.2uf/6.3v/x7r" H 10960 3615 59 0000 L BNN
|
||||
F 2 "SB_LOGICBOARD_V01:C0603" H 10900 3800 50 0001 C CNN
|
||||
F 3 "" H 10900 3800 50 0001 C CNN
|
||||
1 10900 3800
|
||||
1 0 0 -1
|
||||
$EndComp
|
||||
$Comp
|
||||
L SB_LOGICBOARD_V01-eagle-import:GND #GND57
|
||||
U 1 1 304CF269
|
||||
P 10100 4100
|
||||
AR Path="/304CF269" Ref="#GND57" Part="1"
|
||||
AR Path="/6303E571/304CF269" Ref="#GND057" Part="1"
|
||||
F 0 "#GND057" H 10100 4100 50 0001 C CNN
|
||||
F 1 "GND" H 10000 4000 59 0000 L BNN
|
||||
F 2 "" H 10100 4100 50 0001 C CNN
|
||||
F 3 "" H 10100 4100 50 0001 C CNN
|
||||
1 10100 4100
|
||||
1 0 0 -1
|
||||
$EndComp
|
||||
$Comp
|
||||
L SB_LOGICBOARD_V01-eagle-import:+3V3 #+3V18
|
||||
U 1 1 A02C8E50
|
||||
P 10100 3600
|
||||
AR Path="/A02C8E50" Ref="#+3V18" Part="1"
|
||||
AR Path="/6303E571/A02C8E50" Ref="#+3V018" Part="1"
|
||||
F 0 "#+3V018" H 10100 3600 50 0001 C CNN
|
||||
F 1 "+3V3" V 10000 3400 59 0000 L BNN
|
||||
F 2 "" H 10100 3600 50 0001 C CNN
|
||||
F 3 "" H 10100 3600 50 0001 C CNN
|
||||
1 10100 3600
|
||||
1 0 0 -1
|
||||
$EndComp
|
||||
$Comp
|
||||
L SB_LOGICBOARD_V01-eagle-import:C-EUC0603 C5
|
||||
U 1 1 286F808E
|
||||
P 4700 5300
|
||||
AR Path="/286F808E" Ref="C5" Part="1"
|
||||
AR Path="/6303E571/286F808E" Ref="C5" Part="1"
|
||||
F 0 "C5" H 4760 5315 59 0000 L BNN
|
||||
F 1 "NC" H 4760 5115 59 0000 L BNN
|
||||
F 2 "SB_LOGICBOARD_V01:C0603" H 4700 5300 50 0001 C CNN
|
||||
F 3 "" H 4700 5300 50 0001 C CNN
|
||||
1 4700 5300
|
||||
0 1 1 0
|
||||
$EndComp
|
||||
$Comp
|
||||
L SB_LOGICBOARD_V01-eagle-import:GND #GND63
|
||||
U 1 1 B66ACBFF
|
||||
P 4400 5300
|
||||
AR Path="/B66ACBFF" Ref="#GND63" Part="1"
|
||||
AR Path="/6303E571/B66ACBFF" Ref="#GND063" Part="1"
|
||||
F 0 "#GND063" H 4400 5300 50 0001 C CNN
|
||||
F 1 "GND" H 4300 5200 59 0000 L BNN
|
||||
F 2 "" H 4400 5300 50 0001 C CNN
|
||||
F 3 "" H 4400 5300 50 0001 C CNN
|
||||
1 4400 5300
|
||||
0 1 1 0
|
||||
$EndComp
|
||||
$Comp
|
||||
L SB_LOGICBOARD_V01-eagle-import:SMD-FERRITE-BEAD-200R-2A(0805) L9
|
||||
U 1 1 1BD628B3
|
||||
P 4400 3600
|
||||
AR Path="/1BD628B3" Ref="L9" Part="1"
|
||||
AR Path="/6303E571/1BD628B3" Ref="L9" Part="1"
|
||||
F 0 "L9" H 4300 3650 42 0000 L BNN
|
||||
F 1 "LCBB-601" H 4300 3500 42 0000 L BNN
|
||||
F 2 "SB_LOGICBOARD_V01:L0805" H 4400 3600 50 0001 C CNN
|
||||
F 3 "" H 4400 3600 50 0001 C CNN
|
||||
1 4400 3600
|
||||
-1 0 0 -1
|
||||
$EndComp
|
||||
$Comp
|
||||
L SB_LOGICBOARD_V01-eagle-import:+3V3 #+3V19
|
||||
U 1 1 36055ABC
|
||||
P 4200 3400
|
||||
AR Path="/36055ABC" Ref="#+3V19" Part="1"
|
||||
AR Path="/6303E571/36055ABC" Ref="#+3V019" Part="1"
|
||||
F 0 "#+3V019" H 4200 3400 50 0001 C CNN
|
||||
F 1 "+3V3" V 4100 3200 59 0000 L BNN
|
||||
F 2 "" H 4200 3400 50 0001 C CNN
|
||||
F 3 "" H 4200 3400 50 0001 C CNN
|
||||
1 4200 3400
|
||||
1 0 0 -1
|
||||
$EndComp
|
||||
$Comp
|
||||
L SB_LOGICBOARD_V01-eagle-import:C-EUC0603 C28
|
||||
U 1 1 B8A72585
|
||||
P 4600 3700
|
||||
AR Path="/B8A72585" Ref="C28" Part="1"
|
||||
AR Path="/6303E571/B8A72585" Ref="C28" Part="1"
|
||||
F 0 "C28" H 4660 3715 59 0000 L BNN
|
||||
F 1 "2.2uf/6.3v/x7r" H 4660 3515 59 0000 L BNN
|
||||
F 2 "SB_LOGICBOARD_V01:C0603" H 4600 3700 50 0001 C CNN
|
||||
F 3 "" H 4600 3700 50 0001 C CNN
|
||||
1 4600 3700
|
||||
1 0 0 -1
|
||||
$EndComp
|
||||
$Comp
|
||||
L SB_LOGICBOARD_V01-eagle-import:C-EUC0603 C42
|
||||
U 1 1 F57E786C
|
||||
P 4800 3700
|
||||
AR Path="/F57E786C" Ref="C42" Part="1"
|
||||
AR Path="/6303E571/F57E786C" Ref="C42" Part="1"
|
||||
F 0 "C42" H 4860 3715 59 0000 L BNN
|
||||
F 1 "2.2uf/6.3v/x7r" H 4860 3515 59 0000 L BNN
|
||||
F 2 "SB_LOGICBOARD_V01:C0603" H 4800 3700 50 0001 C CNN
|
||||
F 3 "" H 4800 3700 50 0001 C CNN
|
||||
1 4800 3700
|
||||
1 0 0 -1
|
||||
$EndComp
|
||||
$Comp
|
||||
L SB_LOGICBOARD_V01-eagle-import:GND #GND65
|
||||
U 1 1 DC4DDF45
|
||||
P 4400 4000
|
||||
AR Path="/DC4DDF45" Ref="#GND65" Part="1"
|
||||
AR Path="/6303E571/DC4DDF45" Ref="#GND065" Part="1"
|
||||
F 0 "#GND065" H 4400 4000 50 0001 C CNN
|
||||
F 1 "GND" H 4300 3900 59 0000 L BNN
|
||||
F 2 "" H 4400 4000 50 0001 C CNN
|
||||
F 3 "" H 4400 4000 50 0001 C CNN
|
||||
1 4400 4000
|
||||
1 0 0 -1
|
||||
$EndComp
|
||||
$Comp
|
||||
L SB_LOGICBOARD_V01-eagle-import:JP1E JP18
|
||||
U 1 1 24BB3575
|
||||
P 4600 4800
|
||||
AR Path="/24BB3575" Ref="JP18" Part="1"
|
||||
AR Path="/6303E571/24BB3575" Ref="JP18" Part="1"
|
||||
F 0 "JP18" V 4550 4800 59 0000 L BNN
|
||||
F 1 "JP1E" V 4825 4800 59 0000 L BNN
|
||||
F 2 "SB_LOGICBOARD_V01:JP1" H 4600 4800 50 0001 C CNN
|
||||
F 3 "" H 4600 4800 50 0001 C CNN
|
||||
1 4600 4800
|
||||
0 -1 -1 0
|
||||
$EndComp
|
||||
$Comp
|
||||
L SB_LOGICBOARD_V01-eagle-import:JP1E JP19
|
||||
U 1 1 8C09E143
|
||||
P 9400 3800
|
||||
AR Path="/8C09E143" Ref="JP19" Part="1"
|
||||
AR Path="/6303E571/8C09E143" Ref="JP19" Part="1"
|
||||
F 0 "JP19" V 9350 3800 59 0000 L BNN
|
||||
F 1 "JP1E" V 9625 3800 59 0000 L BNN
|
||||
F 2 "SB_LOGICBOARD_V01:JP1" H 9400 3800 50 0001 C CNN
|
||||
F 3 "" H 9400 3800 50 0001 C CNN
|
||||
1 9400 3800
|
||||
0 1 1 0
|
||||
$EndComp
|
||||
$Comp
|
||||
L SB_LOGICBOARD_V01-eagle-import:GND #GND51
|
||||
U 1 1 2CF0FB45
|
||||
P 9300 4100
|
||||
AR Path="/2CF0FB45" Ref="#GND51" Part="1"
|
||||
AR Path="/6303E571/2CF0FB45" Ref="#GND051" Part="1"
|
||||
F 0 "#GND051" H 9300 4100 50 0001 C CNN
|
||||
F 1 "GND" H 9200 4000 59 0000 L BNN
|
||||
F 2 "" H 9300 4100 50 0001 C CNN
|
||||
F 3 "" H 9300 4100 50 0001 C CNN
|
||||
1 9300 4100
|
||||
1 0 0 -1
|
||||
$EndComp
|
||||
$Comp
|
||||
L SB_LOGICBOARD_V01-eagle-import:MA03-1 SV1
|
||||
U 1 1 1FCB83CC
|
||||
P 900 3500
|
||||
AR Path="/1FCB83CC" Ref="SV1" Part="1"
|
||||
AR Path="/6303E571/1FCB83CC" Ref="SV1" Part="1"
|
||||
F 0 "SV1" H 850 3730 59 0000 L BNN
|
||||
F 1 "MA03-1" H 850 3200 59 0000 L BNN
|
||||
F 2 "SB_LOGICBOARD_V01:MA03-1" H 900 3500 50 0001 C CNN
|
||||
F 3 "" H 900 3500 50 0001 C CNN
|
||||
1 900 3500
|
||||
1 0 0 -1
|
||||
$EndComp
|
||||
$Comp
|
||||
L SB_LOGICBOARD_V01-eagle-import:GND #GND18
|
||||
U 1 1 195191A6
|
||||
P 1400 3700
|
||||
AR Path="/195191A6" Ref="#GND18" Part="1"
|
||||
AR Path="/6303E571/195191A6" Ref="#GND018" Part="1"
|
||||
F 0 "#GND018" H 1400 3700 50 0001 C CNN
|
||||
F 1 "GND" H 1300 3600 59 0000 L BNN
|
||||
F 2 "" H 1400 3700 50 0001 C CNN
|
||||
F 3 "" H 1400 3700 50 0001 C CNN
|
||||
1 1400 3700
|
||||
1 0 0 -1
|
||||
$EndComp
|
||||
$EndSCHEMATC
|
755
PCB/kicad/logicBoard/Psup_5v_and_3.3v.sch
Normal file
755
PCB/kicad/logicBoard/Psup_5v_and_3.3v.sch
Normal file
|
@ -0,0 +1,755 @@
|
|||
EESchema Schematic File Version 4
|
||||
EELAYER 30 0
|
||||
EELAYER END
|
||||
$Descr A4 11693 8268
|
||||
encoding utf-8
|
||||
Sheet 1 4
|
||||
Title ""
|
||||
Date ""
|
||||
Rev ""
|
||||
Comp ""
|
||||
Comment1 ""
|
||||
Comment2 ""
|
||||
Comment3 ""
|
||||
Comment4 ""
|
||||
$EndDescr
|
||||
Wire Wire Line
|
||||
5300 4800 5200 4800
|
||||
Wire Wire Line
|
||||
5200 4900 5200 4800
|
||||
Wire Wire Line
|
||||
5200 4800 4700 4800
|
||||
Wire Wire Line
|
||||
4700 4800 4500 4800
|
||||
Wire Wire Line
|
||||
4500 4800 4500 4600
|
||||
Wire Wire Line
|
||||
4700 4900 4700 4800
|
||||
Wire Wire Line
|
||||
4500 4800 4500 4900
|
||||
Connection ~ 5200 4800
|
||||
Text GLabel 5300 4800 0 10 BiDi ~ 0
|
||||
+5V
|
||||
Wire Wire Line
|
||||
7200 5400 7200 5300
|
||||
Text GLabel 7200 5400 0 10 BiDi ~ 0
|
||||
GND
|
||||
Wire Wire Line
|
||||
6600 5100 6600 5300
|
||||
Text GLabel 6600 5100 0 10 BiDi ~ 0
|
||||
GND
|
||||
Wire Wire Line
|
||||
7600 5300 7600 5400
|
||||
Text GLabel 7600 5300 0 10 BiDi ~ 0
|
||||
GND
|
||||
Wire Wire Line
|
||||
8000 5300 8000 5400
|
||||
Wire Wire Line
|
||||
8000 5300 8100 5300
|
||||
Text GLabel 8000 5300 0 10 BiDi ~ 0
|
||||
GND
|
||||
Wire Wire Line
|
||||
6100 5200 6100 5300
|
||||
Text GLabel 6100 5200 0 10 BiDi ~ 0
|
||||
GND
|
||||
Wire Wire Line
|
||||
5200 5700 5200 5800
|
||||
Text GLabel 5200 5700 0 10 BiDi ~ 0
|
||||
GND
|
||||
Wire Wire Line
|
||||
8300 5700 8300 5900
|
||||
Text GLabel 8300 5700 0 10 BiDi ~ 0
|
||||
GND
|
||||
Wire Wire Line
|
||||
5850 5200 5850 5300
|
||||
Text GLabel 5850 5200 0 10 BiDi ~ 0
|
||||
GND
|
||||
Wire Wire Line
|
||||
5600 2900 6400 2900
|
||||
Text GLabel 5600 2900 0 10 BiDi ~ 0
|
||||
GND
|
||||
Wire Wire Line
|
||||
3400 5200 3400 5300
|
||||
Text GLabel 3400 5200 0 10 BiDi ~ 0
|
||||
GND
|
||||
Wire Wire Line
|
||||
4100 3300 4100 3400
|
||||
Text GLabel 4100 3300 0 10 BiDi ~ 0
|
||||
GND
|
||||
Wire Wire Line
|
||||
4700 5300 4700 5200
|
||||
Wire Wire Line
|
||||
4500 5200 4700 5200
|
||||
Text GLabel 4700 5300 0 10 BiDi ~ 0
|
||||
GND
|
||||
Wire Wire Line
|
||||
5200 5200 5200 5300
|
||||
Wire Wire Line
|
||||
8300 5200 8300 5300
|
||||
Wire Wire Line
|
||||
8300 4800 8300 4900
|
||||
Wire Wire Line
|
||||
8300 4700 8300 4800
|
||||
Wire Wire Line
|
||||
8000 4600 8000 4800
|
||||
Wire Wire Line
|
||||
8000 4800 8100 4800
|
||||
Wire Wire Line
|
||||
8100 4800 8300 4800
|
||||
Wire Wire Line
|
||||
8000 5000 8000 4800
|
||||
Wire Wire Line
|
||||
8100 5000 8100 4800
|
||||
Connection ~ 8300 4800
|
||||
Connection ~ 8000 4800
|
||||
Text GLabel 8300 4800 0 10 BiDi ~ 0
|
||||
+3V3
|
||||
Wire Wire Line
|
||||
5700 3100 5700 3400
|
||||
Wire Wire Line
|
||||
5600 3100 5700 3100
|
||||
Text GLabel 5700 3100 0 10 BiDi ~ 0
|
||||
+3V3
|
||||
Wire Wire Line
|
||||
4100 2400 4100 2500
|
||||
Text GLabel 4100 2400 0 10 BiDi ~ 0
|
||||
+3V3
|
||||
Wire Wire Line
|
||||
7200 4800 7200 5000
|
||||
Wire Wire Line
|
||||
7200 4800 7600 4800
|
||||
Wire Wire Line
|
||||
7000 4800 7200 4800
|
||||
Wire Wire Line
|
||||
7600 5000 7600 4800
|
||||
Connection ~ 7200 4800
|
||||
Connection ~ 7600 4800
|
||||
Wire Wire Line
|
||||
5850 4800 5700 4800
|
||||
Wire Wire Line
|
||||
5850 4900 5850 4800
|
||||
Wire Wire Line
|
||||
6100 4800 5850 4800
|
||||
Wire Wire Line
|
||||
6100 4900 6100 4800
|
||||
Wire Wire Line
|
||||
6100 4800 6200 4800
|
||||
Connection ~ 5850 4800
|
||||
Connection ~ 6100 4800
|
||||
Wire Wire Line
|
||||
6600 2600 5800 2600
|
||||
Wire Wire Line
|
||||
5800 2600 5800 2700
|
||||
Wire Wire Line
|
||||
5600 2700 5800 2700
|
||||
Text GLabel 6600 2600 2 70 BiDi ~ 0
|
||||
RESET
|
||||
Wire Wire Line
|
||||
4100 2900 4100 3000
|
||||
Wire Wire Line
|
||||
4100 2900 3500 2900
|
||||
Text GLabel 3500 2900 0 70 BiDi ~ 0
|
||||
RESET
|
||||
Connection ~ 4100 2900
|
||||
Wire Wire Line
|
||||
6630 2800 5600 2800
|
||||
Text GLabel 6630 2800 2 70 BiDi ~ 0
|
||||
SWDIO
|
||||
Wire Wire Line
|
||||
5800 3200 5800 3000
|
||||
Wire Wire Line
|
||||
6700 3200 5800 3200
|
||||
Wire Wire Line
|
||||
5800 3000 5600 3000
|
||||
Text GLabel 6700 3200 2 70 BiDi ~ 0
|
||||
SWCLK
|
||||
Wire Wire Line
|
||||
5700 2600 5700 2400
|
||||
Wire Wire Line
|
||||
5700 2400 6600 2400
|
||||
Wire Wire Line
|
||||
5700 2600 5600 2600
|
||||
Text GLabel 6600 2400 2 70 BiDi ~ 0
|
||||
SWO
|
||||
Wire Wire Line
|
||||
5200 2600 5100 2600
|
||||
Wire Wire Line
|
||||
5100 2700 5200 2700
|
||||
Wire Wire Line
|
||||
5200 2800 5100 2800
|
||||
Wire Wire Line
|
||||
5100 2900 5200 2900
|
||||
Wire Wire Line
|
||||
5200 3000 5100 3000
|
||||
Wire Wire Line
|
||||
5100 3100 5200 3100
|
||||
Wire Wire Line
|
||||
3400 4400 3400 4100
|
||||
Text GLabel 3400 4100 2 70 BiDi ~ 0
|
||||
HEARTBEAT_LED
|
||||
Wire Wire Line
|
||||
3400 4800 3400 4700
|
||||
$Comp
|
||||
L SB_LOGICBOARD_V01-eagle-import:GND #GND27
|
||||
U 1 1 F8638A93
|
||||
P 6600 5400
|
||||
AR Path="/F8638A93" Ref="#GND27" Part="1"
|
||||
AR Path="/6303E79D/F8638A93" Ref="#GND027" Part="1"
|
||||
F 0 "#GND027" H 6600 5400 50 0001 C CNN
|
||||
F 1 "GND" H 6500 5300 59 0000 L BNN
|
||||
F 2 "" H 6600 5400 50 0001 C CNN
|
||||
F 3 "" H 6600 5400 50 0001 C CNN
|
||||
1 6600 5400
|
||||
1 0 0 -1
|
||||
$EndComp
|
||||
$Comp
|
||||
L SB_LOGICBOARD_V01-eagle-import:C-EUC0805 C20
|
||||
U 1 1 12BF572B
|
||||
P 7200 5200
|
||||
AR Path="/12BF572B" Ref="C20" Part="1"
|
||||
AR Path="/6303E79D/12BF572B" Ref="C20" Part="1"
|
||||
F 0 "C20" H 6990 5025 59 0000 L BNN
|
||||
F 1 "100n" H 6960 5215 59 0000 L BNN
|
||||
F 2 "SB_LOGICBOARD_V01:C0805" H 7200 5200 50 0001 C CNN
|
||||
F 3 "" H 7200 5200 50 0001 C CNN
|
||||
1 7200 5200
|
||||
-1 0 0 1
|
||||
$EndComp
|
||||
$Comp
|
||||
L SB_LOGICBOARD_V01-eagle-import:GND #GND29
|
||||
U 1 1 B0E7A0AF
|
||||
P 7200 5500
|
||||
AR Path="/B0E7A0AF" Ref="#GND29" Part="1"
|
||||
AR Path="/6303E79D/B0E7A0AF" Ref="#GND029" Part="1"
|
||||
F 0 "#GND029" H 7200 5500 50 0001 C CNN
|
||||
F 1 "GND" H 7100 5400 59 0000 L BNN
|
||||
F 2 "" H 7200 5500 50 0001 C CNN
|
||||
F 3 "" H 7200 5500 50 0001 C CNN
|
||||
1 7200 5500
|
||||
1 0 0 -1
|
||||
$EndComp
|
||||
$Comp
|
||||
L SB_LOGICBOARD_V01-eagle-import:C-EUC0805 C25
|
||||
U 1 1 9CB31313
|
||||
P 7600 5200
|
||||
AR Path="/9CB31313" Ref="C25" Part="1"
|
||||
AR Path="/6303E79D/9CB31313" Ref="C25" Part="1"
|
||||
F 0 "C25" H 7390 5025 59 0000 L BNN
|
||||
F 1 "100n" H 7460 5215 59 0000 L BNN
|
||||
F 2 "SB_LOGICBOARD_V01:C0805" H 7600 5200 50 0001 C CNN
|
||||
F 3 "" H 7600 5200 50 0001 C CNN
|
||||
1 7600 5200
|
||||
-1 0 0 1
|
||||
$EndComp
|
||||
$Comp
|
||||
L SB_LOGICBOARD_V01-eagle-import:C-EUC1206 C26
|
||||
U 1 1 8E9A860F
|
||||
P 8000 5200
|
||||
AR Path="/8E9A860F" Ref="C26" Part="1"
|
||||
AR Path="/6303E79D/8E9A860F" Ref="C26" Part="1"
|
||||
F 0 "C26" H 8060 5215 59 0001 L BNN
|
||||
F 1 "1206DD106KAT2A" H 8060 5015 59 0001 L BNN
|
||||
F 2 "SB_LOGICBOARD_V01:C1206" H 8000 5200 50 0001 C CNN
|
||||
F 3 "" H 8000 5200 50 0001 C CNN
|
||||
1 8000 5200
|
||||
-1 0 0 1
|
||||
$EndComp
|
||||
$Comp
|
||||
L SB_LOGICBOARD_V01-eagle-import:GND #GND32
|
||||
U 1 1 FD501343
|
||||
P 7600 5500
|
||||
AR Path="/FD501343" Ref="#GND32" Part="1"
|
||||
AR Path="/6303E79D/FD501343" Ref="#GND032" Part="1"
|
||||
F 0 "#GND032" H 7600 5500 50 0001 C CNN
|
||||
F 1 "GND" H 7500 5400 59 0000 L BNN
|
||||
F 2 "" H 7600 5500 50 0001 C CNN
|
||||
F 3 "" H 7600 5500 50 0001 C CNN
|
||||
1 7600 5500
|
||||
1 0 0 -1
|
||||
$EndComp
|
||||
$Comp
|
||||
L SB_LOGICBOARD_V01-eagle-import:GND #GND33
|
||||
U 1 1 C5585B8D
|
||||
P 8000 5500
|
||||
AR Path="/C5585B8D" Ref="#GND33" Part="1"
|
||||
AR Path="/6303E79D/C5585B8D" Ref="#GND033" Part="1"
|
||||
F 0 "#GND033" H 8000 5500 50 0001 C CNN
|
||||
F 1 "GND" H 7900 5400 59 0000 L BNN
|
||||
F 2 "" H 8000 5500 50 0001 C CNN
|
||||
F 3 "" H 8000 5500 50 0001 C CNN
|
||||
1 8000 5500
|
||||
1 0 0 -1
|
||||
$EndComp
|
||||
$Comp
|
||||
L SB_LOGICBOARD_V01-eagle-import:C-EUC0805 C31
|
||||
U 1 1 C442BB79
|
||||
P 6100 5100
|
||||
AR Path="/C442BB79" Ref="C31" Part="1"
|
||||
AR Path="/6303E79D/C442BB79" Ref="C31" Part="1"
|
||||
F 0 "C31" H 6160 5115 59 0000 L BNN
|
||||
F 1 "100n" H 6160 4915 59 0000 L BNN
|
||||
F 2 "SB_LOGICBOARD_V01:C0805" H 6100 5100 50 0001 C CNN
|
||||
F 3 "" H 6100 5100 50 0001 C CNN
|
||||
1 6100 5100
|
||||
-1 0 0 1
|
||||
$EndComp
|
||||
$Comp
|
||||
L SB_LOGICBOARD_V01-eagle-import:GND #GND36
|
||||
U 1 1 CF583ECA
|
||||
P 6100 5400
|
||||
AR Path="/CF583ECA" Ref="#GND36" Part="1"
|
||||
AR Path="/6303E79D/CF583ECA" Ref="#GND036" Part="1"
|
||||
F 0 "#GND036" H 6100 5400 50 0001 C CNN
|
||||
F 1 "GND" H 6000 5300 59 0000 L BNN
|
||||
F 2 "" H 6100 5400 50 0001 C CNN
|
||||
F 3 "" H 6100 5400 50 0001 C CNN
|
||||
1 6100 5400
|
||||
1 0 0 -1
|
||||
$EndComp
|
||||
$Comp
|
||||
L SB_LOGICBOARD_V01-eagle-import:LEDSML0805 5VOK
|
||||
U 1 1 20425762
|
||||
P 5200 5000
|
||||
AR Path="/20425762" Ref="5VOK" Part="1"
|
||||
AR Path="/6303E79D/20425762" Ref="5VOK1" Part="1"
|
||||
F 0 "5VOK1" V 5340 4820 59 0000 L BNN
|
||||
F 1 "OSR50805C1E" V 5425 4820 59 0000 L BNN
|
||||
F 2 "SB_LOGICBOARD_V01:SML0805" H 5200 5000 50 0001 C CNN
|
||||
F 3 "" H 5200 5000 50 0001 C CNN
|
||||
1 5200 5000
|
||||
1 0 0 -1
|
||||
$EndComp
|
||||
$Comp
|
||||
L SB_LOGICBOARD_V01-eagle-import:R-EU_R0805 R108
|
||||
U 1 1 64ABC050
|
||||
P 5200 5500
|
||||
AR Path="/64ABC050" Ref="R108" Part="1"
|
||||
AR Path="/6303E79D/64ABC050" Ref="R108" Part="1"
|
||||
F 0 "R108" H 5050 5559 59 0000 L BNN
|
||||
F 1 "2k2/1%" H 5050 5370 59 0000 L BNN
|
||||
F 2 "SB_LOGICBOARD_V01:R0805" H 5200 5500 50 0001 C CNN
|
||||
F 3 "" H 5200 5500 50 0001 C CNN
|
||||
1 5200 5500
|
||||
0 -1 -1 0
|
||||
$EndComp
|
||||
$Comp
|
||||
L SB_LOGICBOARD_V01-eagle-import:LEDSML0805 3V3OK
|
||||
U 1 1 22729381
|
||||
P 8300 5000
|
||||
AR Path="/22729381" Ref="3V3OK" Part="1"
|
||||
AR Path="/6303E79D/22729381" Ref="3V3OK1" Part="1"
|
||||
F 0 "3V3OK1" V 8440 4820 59 0000 L BNN
|
||||
F 1 "OSR50805C1E" V 8525 4820 59 0000 L BNN
|
||||
F 2 "SB_LOGICBOARD_V01:SML0805" H 8300 5000 50 0001 C CNN
|
||||
F 3 "" H 8300 5000 50 0001 C CNN
|
||||
1 8300 5000
|
||||
1 0 0 -1
|
||||
$EndComp
|
||||
$Comp
|
||||
L SB_LOGICBOARD_V01-eagle-import:R-EU_R0805 R109
|
||||
U 1 1 C6AC243E
|
||||
P 8300 5500
|
||||
AR Path="/C6AC243E" Ref="R109" Part="1"
|
||||
AR Path="/6303E79D/C6AC243E" Ref="R109" Part="1"
|
||||
F 0 "R109" H 8150 5559 59 0000 L BNN
|
||||
F 1 "2k2/1%" H 8150 5370 59 0000 L BNN
|
||||
F 2 "SB_LOGICBOARD_V01:R0805" H 8300 5500 50 0001 C CNN
|
||||
F 3 "" H 8300 5500 50 0001 C CNN
|
||||
1 8300 5500
|
||||
0 -1 -1 0
|
||||
$EndComp
|
||||
$Comp
|
||||
L SB_LOGICBOARD_V01-eagle-import:GND #GND68
|
||||
U 1 1 003ACE57
|
||||
P 5200 5900
|
||||
AR Path="/003ACE57" Ref="#GND68" Part="1"
|
||||
AR Path="/6303E79D/003ACE57" Ref="#GND068" Part="1"
|
||||
F 0 "#GND068" H 5200 5900 50 0001 C CNN
|
||||
F 1 "GND" H 5100 5800 59 0000 L BNN
|
||||
F 2 "" H 5200 5900 50 0001 C CNN
|
||||
F 3 "" H 5200 5900 50 0001 C CNN
|
||||
1 5200 5900
|
||||
1 0 0 -1
|
||||
$EndComp
|
||||
$Comp
|
||||
L SB_LOGICBOARD_V01-eagle-import:GND #GND69
|
||||
U 1 1 660B32C3
|
||||
P 8300 6000
|
||||
AR Path="/660B32C3" Ref="#GND69" Part="1"
|
||||
AR Path="/6303E79D/660B32C3" Ref="#GND069" Part="1"
|
||||
F 0 "#GND069" H 8300 6000 50 0001 C CNN
|
||||
F 1 "GND" H 8200 5900 59 0000 L BNN
|
||||
F 2 "" H 8300 6000 50 0001 C CNN
|
||||
F 3 "" H 8300 6000 50 0001 C CNN
|
||||
1 8300 6000
|
||||
1 0 0 -1
|
||||
$EndComp
|
||||
$Comp
|
||||
L SB_LOGICBOARD_V01-eagle-import:C-EUC0805 C74
|
||||
U 1 1 15BE111E
|
||||
P 5850 5000
|
||||
AR Path="/15BE111E" Ref="C74" Part="1"
|
||||
AR Path="/6303E79D/15BE111E" Ref="C74" Part="1"
|
||||
F 0 "C74" H 5910 5015 59 0000 L BNN
|
||||
F 1 "100n" H 5910 4815 59 0000 L BNN
|
||||
F 2 "SB_LOGICBOARD_V01:C0805" H 5850 5000 50 0001 C CNN
|
||||
F 3 "" H 5850 5000 50 0001 C CNN
|
||||
1 5850 5000
|
||||
1 0 0 -1
|
||||
$EndComp
|
||||
$Comp
|
||||
L SB_LOGICBOARD_V01-eagle-import:GND #GND78
|
||||
U 1 1 22B7F523
|
||||
P 5850 5400
|
||||
AR Path="/22B7F523" Ref="#GND78" Part="1"
|
||||
AR Path="/6303E79D/22B7F523" Ref="#GND078" Part="1"
|
||||
F 0 "#GND078" H 5850 5400 50 0001 C CNN
|
||||
F 1 "GND" H 5750 5300 59 0000 L BNN
|
||||
F 2 "" H 5850 5400 50 0001 C CNN
|
||||
F 3 "" H 5850 5400 50 0001 C CNN
|
||||
1 5850 5400
|
||||
1 0 0 -1
|
||||
$EndComp
|
||||
$Comp
|
||||
L SB_LOGICBOARD_V01-eagle-import:PTR1B2,54 3V3
|
||||
U 1 1 FCCF6EE1
|
||||
P 8300 4600
|
||||
AR Path="/FCCF6EE1" Ref="3V3" Part="1"
|
||||
AR Path="/6303E79D/FCCF6EE1" Ref="3V3" Part="1"
|
||||
F 0 "3V3" V 8260 4350 59 0000 L BNN
|
||||
F 1 "NC" H 8300 4600 50 0001 C CNN
|
||||
F 2 "SB_LOGICBOARD_V01:B2,54" H 8300 4600 50 0001 C CNN
|
||||
F 3 "" H 8300 4600 50 0001 C CNN
|
||||
1 8300 4600
|
||||
-1 0 0 1
|
||||
$EndComp
|
||||
$Comp
|
||||
L SB_LOGICBOARD_V01-eagle-import:+5V #P+7
|
||||
U 1 1 FAFE20BD
|
||||
P 4500 4500
|
||||
AR Path="/FAFE20BD" Ref="#P+7" Part="1"
|
||||
AR Path="/6303E79D/FAFE20BD" Ref="#P+07" Part="1"
|
||||
F 0 "#P+07" H 4500 4500 50 0001 C CNN
|
||||
F 1 "+5V" V 4400 4300 59 0000 L BNN
|
||||
F 2 "" H 4500 4500 50 0001 C CNN
|
||||
F 3 "" H 4500 4500 50 0001 C CNN
|
||||
1 4500 4500
|
||||
1 0 0 -1
|
||||
$EndComp
|
||||
$Comp
|
||||
L SB_LOGICBOARD_V01-eagle-import:+3V3 #+3V5
|
||||
U 1 1 54464806
|
||||
P 8000 4500
|
||||
AR Path="/54464806" Ref="#+3V5" Part="1"
|
||||
AR Path="/6303E79D/54464806" Ref="#+3V05" Part="1"
|
||||
F 0 "#+3V05" H 8000 4500 50 0001 C CNN
|
||||
F 1 "+3V3" V 7900 4300 59 0000 L BNN
|
||||
F 2 "" H 8000 4500 50 0001 C CNN
|
||||
F 3 "" H 8000 4500 50 0001 C CNN
|
||||
1 8000 4500
|
||||
1 0 0 -1
|
||||
$EndComp
|
||||
$Comp
|
||||
L SB_LOGICBOARD_V01-eagle-import:SMD-FERRITE-BEAD-200R-2A(0805) L26
|
||||
U 1 1 BF223536
|
||||
P 5500 4800
|
||||
AR Path="/BF223536" Ref="L26" Part="1"
|
||||
AR Path="/6303E79D/BF223536" Ref="L26" Part="1"
|
||||
F 0 "L26" H 5400 4850 42 0000 L BNN
|
||||
F 1 "LCBB-601" H 5400 4700 42 0000 L BNN
|
||||
F 2 "SB_LOGICBOARD_V01:L0805" H 5500 4800 50 0001 C CNN
|
||||
F 3 "" H 5500 4800 50 0001 C CNN
|
||||
1 5500 4800
|
||||
1 0 0 -1
|
||||
$EndComp
|
||||
$Comp
|
||||
L SB_LOGICBOARD_V01-eagle-import:SMD-FERRITE-BEAD-200R-2A(0805) L27
|
||||
U 1 1 8233CBD5
|
||||
P 7800 4800
|
||||
AR Path="/8233CBD5" Ref="L27" Part="1"
|
||||
AR Path="/6303E79D/8233CBD5" Ref="L27" Part="1"
|
||||
F 0 "L27" H 7700 4850 42 0000 L BNN
|
||||
F 1 "LCBB-601" H 7700 4700 42 0000 L BNN
|
||||
F 2 "SB_LOGICBOARD_V01:L0805" H 7800 4800 50 0001 C CNN
|
||||
F 3 "" H 7800 4800 50 0001 C CNN
|
||||
1 7800 4800
|
||||
1 0 0 -1
|
||||
$EndComp
|
||||
$Comp
|
||||
L SB_LOGICBOARD_V01-eagle-import:MCP1703DB IC1
|
||||
U 1 1 41C6949E
|
||||
P 6600 4800
|
||||
AR Path="/41C6949E" Ref="IC1" Part="1"
|
||||
AR Path="/6303E79D/41C6949E" Ref="IC1" Part="1"
|
||||
F 0 "IC1" H 6300 5025 59 0000 L BNN
|
||||
F 1 "MCP1826S-3302ED" H 6300 4925 59 0000 L BNN
|
||||
F 2 "SB_LOGICBOARD_V01:SOT223" H 6600 4800 50 0001 C CNN
|
||||
F 3 "" H 6600 4800 50 0001 C CNN
|
||||
1 6600 4800
|
||||
1 0 0 -1
|
||||
$EndComp
|
||||
$Comp
|
||||
L SB_LOGICBOARD_V01-eagle-import:C-EUC0805 C61
|
||||
U 1 1 9F409597
|
||||
P 8100 5200
|
||||
AR Path="/9F409597" Ref="C61" Part="1"
|
||||
AR Path="/6303E79D/9F409597" Ref="C61" Part="1"
|
||||
F 0 "C61" H 7890 5025 59 0000 L BNN
|
||||
F 1 "100n" H 7960 5215 59 0000 L BNN
|
||||
F 2 "SB_LOGICBOARD_V01:C0805" H 8100 5200 50 0001 C CNN
|
||||
F 3 "" H 8100 5200 50 0001 C CNN
|
||||
1 8100 5200
|
||||
-1 0 0 1
|
||||
$EndComp
|
||||
$Comp
|
||||
L SB_LOGICBOARD_V01-eagle-import:M06LOCK J1
|
||||
U 1 1 414D4D2E
|
||||
P 4900 2900
|
||||
AR Path="/414D4D2E" Ref="J1" Part="1"
|
||||
AR Path="/6303E79D/414D4D2E" Ref="J1" Part="1"
|
||||
F 0 "J1" H 4700 3330 59 0000 L BNN
|
||||
F 1 "ZL201-06G" H 4700 2500 59 0000 L BNN
|
||||
F 2 "SB_LOGICBOARD_V01:1X06_LOCK" H 4900 2900 50 0001 C CNN
|
||||
F 3 "" H 4900 2900 50 0001 C CNN
|
||||
1 4900 2900
|
||||
1 0 0 -1
|
||||
$EndComp
|
||||
$Comp
|
||||
L SB_LOGICBOARD_V01-eagle-import:GND #GND1
|
||||
U 1 1 8DA2BB24
|
||||
P 6400 3000
|
||||
AR Path="/8DA2BB24" Ref="#GND1" Part="1"
|
||||
AR Path="/6303E79D/8DA2BB24" Ref="#GND01" Part="1"
|
||||
F 0 "#GND01" H 6400 3000 50 0001 C CNN
|
||||
F 1 "GND" H 6300 2900 59 0000 L BNN
|
||||
F 2 "" H 6400 3000 50 0001 C CNN
|
||||
F 3 "" H 6400 3000 50 0001 C CNN
|
||||
1 6400 3000
|
||||
-1 0 0 -1
|
||||
$EndComp
|
||||
$Comp
|
||||
L SB_LOGICBOARD_V01-eagle-import:+3V3 #+3V1
|
||||
U 1 1 7D977A11
|
||||
P 5600 3400
|
||||
AR Path="/7D977A11" Ref="#+3V1" Part="1"
|
||||
AR Path="/6303E79D/7D977A11" Ref="#+3V01" Part="1"
|
||||
F 0 "#+3V01" H 5600 3400 50 0001 C CNN
|
||||
F 1 "+3V3" V 5500 3200 59 0000 L BNN
|
||||
F 2 "" H 5600 3400 50 0001 C CNN
|
||||
F 3 "" H 5600 3400 50 0001 C CNN
|
||||
1 5600 3400
|
||||
0 -1 -1 0
|
||||
$EndComp
|
||||
$Comp
|
||||
L SB_LOGICBOARD_V01-eagle-import:SMD-FERRITE-BEAD-200R-2A(0805) L1
|
||||
U 1 1 D47120D7
|
||||
P 5400 2600
|
||||
AR Path="/D47120D7" Ref="L1" Part="1"
|
||||
AR Path="/6303E79D/D47120D7" Ref="L1" Part="1"
|
||||
F 0 "L1" H 5300 2650 42 0000 L BNN
|
||||
F 1 "LCBB-601" H 5300 2500 42 0000 L BNN
|
||||
F 2 "SB_LOGICBOARD_V01:L0805" H 5400 2600 50 0001 C CNN
|
||||
F 3 "" H 5400 2600 50 0001 C CNN
|
||||
1 5400 2600
|
||||
-1 0 0 -1
|
||||
$EndComp
|
||||
$Comp
|
||||
L SB_LOGICBOARD_V01-eagle-import:SMD-FERRITE-BEAD-200R-2A(0805) L2
|
||||
U 1 1 9AC71C44
|
||||
P 5400 2700
|
||||
AR Path="/9AC71C44" Ref="L2" Part="1"
|
||||
AR Path="/6303E79D/9AC71C44" Ref="L2" Part="1"
|
||||
F 0 "L2" H 5300 2750 42 0000 L BNN
|
||||
F 1 "LCBB-601" H 5300 2600 42 0000 L BNN
|
||||
F 2 "SB_LOGICBOARD_V01:L0805" H 5400 2700 50 0001 C CNN
|
||||
F 3 "" H 5400 2700 50 0001 C CNN
|
||||
1 5400 2700
|
||||
-1 0 0 -1
|
||||
$EndComp
|
||||
$Comp
|
||||
L SB_LOGICBOARD_V01-eagle-import:SMD-FERRITE-BEAD-200R-2A(0805) L3
|
||||
U 1 1 E9E9B7BD
|
||||
P 5400 2800
|
||||
AR Path="/E9E9B7BD" Ref="L3" Part="1"
|
||||
AR Path="/6303E79D/E9E9B7BD" Ref="L3" Part="1"
|
||||
F 0 "L3" H 5300 2850 42 0000 L BNN
|
||||
F 1 "LCBB-601" H 5300 2700 42 0000 L BNN
|
||||
F 2 "SB_LOGICBOARD_V01:L0805" H 5400 2800 50 0001 C CNN
|
||||
F 3 "" H 5400 2800 50 0001 C CNN
|
||||
1 5400 2800
|
||||
-1 0 0 -1
|
||||
$EndComp
|
||||
$Comp
|
||||
L SB_LOGICBOARD_V01-eagle-import:SMD-FERRITE-BEAD-200R-2A(0805) L6
|
||||
U 1 1 C1710F1F
|
||||
P 5400 2900
|
||||
AR Path="/C1710F1F" Ref="L6" Part="1"
|
||||
AR Path="/6303E79D/C1710F1F" Ref="L6" Part="1"
|
||||
F 0 "L6" H 5300 2950 42 0000 L BNN
|
||||
F 1 "LCBB-601" H 5300 2800 42 0000 L BNN
|
||||
F 2 "SB_LOGICBOARD_V01:L0805" H 5400 2900 50 0001 C CNN
|
||||
F 3 "" H 5400 2900 50 0001 C CNN
|
||||
1 5400 2900
|
||||
-1 0 0 -1
|
||||
$EndComp
|
||||
$Comp
|
||||
L SB_LOGICBOARD_V01-eagle-import:SMD-FERRITE-BEAD-200R-2A(0805) L7
|
||||
U 1 1 9601F5AB
|
||||
P 5400 3000
|
||||
AR Path="/9601F5AB" Ref="L7" Part="1"
|
||||
AR Path="/6303E79D/9601F5AB" Ref="L7" Part="1"
|
||||
F 0 "L7" H 5300 3050 42 0000 L BNN
|
||||
F 1 "LCBB-601" H 5300 2900 42 0000 L BNN
|
||||
F 2 "SB_LOGICBOARD_V01:L0805" H 5400 3000 50 0001 C CNN
|
||||
F 3 "" H 5400 3000 50 0001 C CNN
|
||||
1 5400 3000
|
||||
-1 0 0 -1
|
||||
$EndComp
|
||||
$Comp
|
||||
L SB_LOGICBOARD_V01-eagle-import:SMD-FERRITE-BEAD-200R-2A(0805) L8
|
||||
U 1 1 23DB1BBD
|
||||
P 5400 3100
|
||||
AR Path="/23DB1BBD" Ref="L8" Part="1"
|
||||
AR Path="/6303E79D/23DB1BBD" Ref="L8" Part="1"
|
||||
F 0 "L8" H 5300 3150 42 0000 L BNN
|
||||
F 1 "LCBB-601" H 5300 3000 42 0000 L BNN
|
||||
F 2 "SB_LOGICBOARD_V01:L0805" H 5400 3100 50 0001 C CNN
|
||||
F 3 "" H 5400 3100 50 0001 C CNN
|
||||
1 5400 3100
|
||||
-1 0 0 -1
|
||||
$EndComp
|
||||
$Comp
|
||||
L SB_LOGICBOARD_V01-eagle-import:R-EU_R0805 R1
|
||||
U 1 1 EFC0BE74
|
||||
P 3400 5000
|
||||
AR Path="/EFC0BE74" Ref="R1" Part="1"
|
||||
AR Path="/6303E79D/EFC0BE74" Ref="R1" Part="1"
|
||||
F 0 "R1" H 3250 5059 59 0000 L BNN
|
||||
F 1 "330" H 3250 4870 59 0000 L BNN
|
||||
F 2 "SB_LOGICBOARD_V01:R0805" H 3400 5000 50 0001 C CNN
|
||||
F 3 "" H 3400 5000 50 0001 C CNN
|
||||
1 3400 5000
|
||||
0 -1 -1 0
|
||||
$EndComp
|
||||
$Comp
|
||||
L SB_LOGICBOARD_V01-eagle-import:GND #GND2
|
||||
U 1 1 4877C9E2
|
||||
P 3400 5400
|
||||
AR Path="/4877C9E2" Ref="#GND2" Part="1"
|
||||
AR Path="/6303E79D/4877C9E2" Ref="#GND02" Part="1"
|
||||
F 0 "#GND02" H 3400 5400 50 0001 C CNN
|
||||
F 1 "GND" H 3300 5300 59 0000 L BNN
|
||||
F 2 "" H 3400 5400 50 0001 C CNN
|
||||
F 3 "" H 3400 5400 50 0001 C CNN
|
||||
1 3400 5400
|
||||
1 0 0 -1
|
||||
$EndComp
|
||||
$Comp
|
||||
L SB_LOGICBOARD_V01-eagle-import:LEDSML0805 HB
|
||||
U 1 1 D302D039
|
||||
P 3400 4500
|
||||
AR Path="/D302D039" Ref="HB" Part="1"
|
||||
AR Path="/6303E79D/D302D039" Ref="HB1" Part="1"
|
||||
F 0 "HB1" V 3540 4320 59 0000 L BNN
|
||||
F 1 "OSR50805C1E" V 3625 4320 59 0000 L BNN
|
||||
F 2 "SB_LOGICBOARD_V01:SML0805" H 3400 4500 50 0001 C CNN
|
||||
F 3 "" H 3400 4500 50 0001 C CNN
|
||||
1 3400 4500
|
||||
1 0 0 -1
|
||||
$EndComp
|
||||
$Comp
|
||||
L SB_LOGICBOARD_V01-eagle-import:C-EUC0805 C2
|
||||
U 1 1 AEC71D01
|
||||
P 4100 3200
|
||||
AR Path="/AEC71D01" Ref="C2" Part="1"
|
||||
AR Path="/6303E79D/AEC71D01" Ref="C2" Part="1"
|
||||
F 0 "C2" V 3985 3240 59 0000 R TNN
|
||||
F 1 "100n" V 4115 3240 59 0000 R TNN
|
||||
F 2 "SB_LOGICBOARD_V01:C0805" H 4100 3200 50 0001 C CNN
|
||||
F 3 "" H 4100 3200 50 0001 C CNN
|
||||
1 4100 3200
|
||||
1 0 0 1
|
||||
$EndComp
|
||||
$Comp
|
||||
L SB_LOGICBOARD_V01-eagle-import:GND #GND3
|
||||
U 1 1 21137572
|
||||
P 4100 3500
|
||||
AR Path="/21137572" Ref="#GND3" Part="1"
|
||||
AR Path="/6303E79D/21137572" Ref="#GND03" Part="1"
|
||||
F 0 "#GND03" H 4100 3500 50 0001 C CNN
|
||||
F 1 "GND" H 4000 3400 59 0000 L BNN
|
||||
F 2 "" H 4100 3500 50 0001 C CNN
|
||||
F 3 "" H 4100 3500 50 0001 C CNN
|
||||
1 4100 3500
|
||||
-1 0 0 -1
|
||||
$EndComp
|
||||
$Comp
|
||||
L SB_LOGICBOARD_V01-eagle-import:R-EU_R0805 R3
|
||||
U 1 1 ABABC248
|
||||
P 4100 2700
|
||||
AR Path="/ABABC248" Ref="R3" Part="1"
|
||||
AR Path="/6303E79D/ABABC248" Ref="R3" Part="1"
|
||||
F 0 "R3" H 3950 2759 59 0000 L BNN
|
||||
F 1 "10k" H 3950 2570 59 0000 L BNN
|
||||
F 2 "SB_LOGICBOARD_V01:R0805" H 4100 2700 50 0001 C CNN
|
||||
F 3 "" H 4100 2700 50 0001 C CNN
|
||||
1 4100 2700
|
||||
0 -1 -1 0
|
||||
$EndComp
|
||||
$Comp
|
||||
L SB_LOGICBOARD_V01-eagle-import:+3V3 #+3V2
|
||||
U 1 1 816AD438
|
||||
P 4100 2300
|
||||
AR Path="/816AD438" Ref="#+3V2" Part="1"
|
||||
AR Path="/6303E79D/816AD438" Ref="#+3V02" Part="1"
|
||||
F 0 "#+3V02" H 4100 2300 50 0001 C CNN
|
||||
F 1 "+3V3" V 4000 2100 59 0000 L BNN
|
||||
F 2 "" H 4100 2300 50 0001 C CNN
|
||||
F 3 "" H 4100 2300 50 0001 C CNN
|
||||
1 4100 2300
|
||||
1 0 0 -1
|
||||
$EndComp
|
||||
$Comp
|
||||
L SB_LOGICBOARD_V01-eagle-import:C-EUC0805 C10
|
||||
U 1 1 08F1D4ED
|
||||
P 4700 5100
|
||||
AR Path="/08F1D4ED" Ref="C10" Part="1"
|
||||
AR Path="/6303E79D/08F1D4ED" Ref="C10" Part="1"
|
||||
F 0 "C10" H 4490 4925 59 0000 L BNN
|
||||
F 1 "100n" H 4460 5115 59 0000 L BNN
|
||||
F 2 "SB_LOGICBOARD_V01:C0805" H 4700 5100 50 0001 C CNN
|
||||
F 3 "" H 4700 5100 50 0001 C CNN
|
||||
1 4700 5100
|
||||
-1 0 0 1
|
||||
$EndComp
|
||||
$Comp
|
||||
L SB_LOGICBOARD_V01-eagle-import:GND #GND19
|
||||
U 1 1 F278BC0E
|
||||
P 4700 5400
|
||||
AR Path="/F278BC0E" Ref="#GND19" Part="1"
|
||||
AR Path="/6303E79D/F278BC0E" Ref="#GND019" Part="1"
|
||||
F 0 "#GND019" H 4700 5400 50 0001 C CNN
|
||||
F 1 "GND" H 4600 5300 59 0000 L BNN
|
||||
F 2 "" H 4700 5400 50 0001 C CNN
|
||||
F 3 "" H 4700 5400 50 0001 C CNN
|
||||
1 4700 5400
|
||||
1 0 0 -1
|
||||
$EndComp
|
||||
$Comp
|
||||
L SB_LOGICBOARD_V01-eagle-import:C-EUC0805 C17
|
||||
U 1 1 20F00162
|
||||
P 4500 5100
|
||||
AR Path="/20F00162" Ref="C17" Part="1"
|
||||
AR Path="/6303E79D/20F00162" Ref="C17" Part="1"
|
||||
F 0 "C17" H 4290 4925 59 0000 L BNN
|
||||
F 1 "100n" H 4260 5115 59 0000 L BNN
|
||||
F 2 "SB_LOGICBOARD_V01:C0805" H 4500 5100 50 0001 C CNN
|
||||
F 3 "" H 4500 5100 50 0001 C CNN
|
||||
1 4500 5100
|
||||
-1 0 0 1
|
||||
$EndComp
|
||||
Text Notes 5710 2160 0 59 ~ 0
|
||||
SWIM ST-LINK/V2 Interface
|
||||
Text Notes 4140 2710 0 59 ~ 0
|
||||
BOOT
|
||||
$EndSCHEMATC
|
2824
PCB/kicad/logicBoard/SB_HEADERS.sch
Normal file
2824
PCB/kicad/logicBoard/SB_HEADERS.sch
Normal file
File diff suppressed because it is too large
Load diff
3
PCB/kicad/logicBoard/SB_LOGICBOARD_V01-eagle-import.dcm
Normal file
3
PCB/kicad/logicBoard/SB_LOGICBOARD_V01-eagle-import.dcm
Normal file
|
@ -0,0 +1,3 @@
|
|||
EESchema-DOCLIB Version 2.0
|
||||
#
|
||||
#End Doc Library
|
6563
PCB/kicad/logicBoard/SB_LOGICBOARD_V01.kicad_pcb
Normal file
6563
PCB/kicad/logicBoard/SB_LOGICBOARD_V01.kicad_pcb
Normal file
File diff suppressed because it is too large
Load diff
70
PCB/kicad/logicBoard/SB_LOGICBOARD_V01.pretty/1X06.kicad_mod
Normal file
70
PCB/kicad/logicBoard/SB_LOGICBOARD_V01.pretty/1X06.kicad_mod
Normal file
|
@ -0,0 +1,70 @@
|
|||
(module 1X06 (layer F.Cu) (tedit 0)
|
||||
(descr "<b>PIN HEADER</b>")
|
||||
(fp_text reference JP17 (at -7.6962 -1.8288) (layer F.SilkS) hide
|
||||
(effects (font (size 1.2065 1.2065) (thickness 0.127)) (justify right top))
|
||||
)
|
||||
(fp_text value "" (at -7.62 3.175 -180) (layer F.Fab)
|
||||
(effects (font (size 1.2065 1.2065) (thickness 0.09652)) (justify left bottom))
|
||||
)
|
||||
(fp_line (start 0.635 -1.27) (end 1.905 -1.27) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 1.905 -1.27) (end 2.54 -0.635) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 2.54 -0.635) (end 2.54 0.635) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 2.54 0.635) (end 1.905 1.27) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 2.54 -0.635) (end 3.175 -1.27) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 3.175 -1.27) (end 4.445 -1.27) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 4.445 -1.27) (end 5.08 -0.635) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 5.08 -0.635) (end 5.08 0.635) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 5.08 0.635) (end 4.445 1.27) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 4.445 1.27) (end 3.175 1.27) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 3.175 1.27) (end 2.54 0.635) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -2.54 -0.635) (end -1.905 -1.27) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -1.905 -1.27) (end -0.635 -1.27) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -0.635 -1.27) (end 0 -0.635) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 0 -0.635) (end 0 0.635) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 0 0.635) (end -0.635 1.27) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -0.635 1.27) (end -1.905 1.27) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -1.905 1.27) (end -2.54 0.635) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 0.635 -1.27) (end 0 -0.635) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 0 0.635) (end 0.635 1.27) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 1.905 1.27) (end 0.635 1.27) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -6.985 -1.27) (end -5.715 -1.27) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -5.715 -1.27) (end -5.08 -0.635) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -5.08 -0.635) (end -5.08 0.635) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -5.08 0.635) (end -5.715 1.27) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -5.08 -0.635) (end -4.445 -1.27) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -4.445 -1.27) (end -3.175 -1.27) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -3.175 -1.27) (end -2.54 -0.635) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -2.54 -0.635) (end -2.54 0.635) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -2.54 0.635) (end -3.175 1.27) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -3.175 1.27) (end -4.445 1.27) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -4.445 1.27) (end -5.08 0.635) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -7.62 -0.635) (end -7.62 0.635) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -6.985 -1.27) (end -7.62 -0.635) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -7.62 0.635) (end -6.985 1.27) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -5.715 1.27) (end -6.985 1.27) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 5.715 -1.27) (end 6.985 -1.27) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 6.985 -1.27) (end 7.62 -0.635) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 7.62 -0.635) (end 7.62 0.635) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 7.62 0.635) (end 6.985 1.27) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 5.715 -1.27) (end 5.08 -0.635) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 5.08 0.635) (end 5.715 1.27) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 6.985 1.27) (end 5.715 1.27) (layer F.SilkS) (width 0.1524))
|
||||
(fp_poly (pts (xy 3.556 0.254) (xy 4.064 0.254) (xy 4.064 -0.254) (xy 3.556 -0.254)) (layer F.Fab) (width 0))
|
||||
(fp_poly (pts (xy 1.016 0.254) (xy 1.524 0.254) (xy 1.524 -0.254) (xy 1.016 -0.254)) (layer F.Fab) (width 0))
|
||||
(fp_poly (pts (xy -1.524 0.254) (xy -1.016 0.254) (xy -1.016 -0.254) (xy -1.524 -0.254)) (layer F.Fab) (width 0))
|
||||
(fp_poly (pts (xy -4.064 0.254) (xy -3.556 0.254) (xy -3.556 -0.254) (xy -4.064 -0.254)) (layer F.Fab) (width 0))
|
||||
(fp_poly (pts (xy -6.604 0.254) (xy -6.096 0.254) (xy -6.096 -0.254) (xy -6.604 -0.254)) (layer F.Fab) (width 0))
|
||||
(fp_poly (pts (xy 6.096 0.254) (xy 6.604 0.254) (xy 6.604 -0.254) (xy 6.096 -0.254)) (layer F.Fab) (width 0))
|
||||
(pad 1 thru_hole oval (at -6.35 0 90) (size 3.048 1.524) (drill 1.016) (layers *.Cu *.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 2 thru_hole oval (at -3.81 0 90) (size 3.048 1.524) (drill 1.016) (layers *.Cu *.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 3 thru_hole oval (at -1.27 0 90) (size 3.048 1.524) (drill 1.016) (layers *.Cu *.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 4 thru_hole oval (at 1.27 0 90) (size 3.048 1.524) (drill 1.016) (layers *.Cu *.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 5 thru_hole oval (at 3.81 0 90) (size 3.048 1.524) (drill 1.016) (layers *.Cu *.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 6 thru_hole oval (at 6.35 0 90) (size 3.048 1.524) (drill 1.016) (layers *.Cu *.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
)
|
|
@ -0,0 +1,70 @@
|
|||
(module 1X06_LOCK (layer F.Cu) (tedit 0)
|
||||
(descr "This footprint was designed to help hold the alignment of a through-hole component (i.e. 6-pin header) while soldering it into place. \nYou may notice that each hole has been shifted either up or down by 0.005 of an inch from it's more standard position (which is a perfectly straight line). \nThis slight alteration caused the pins (the squares in the middle) to touch the edges of the holes. Because they are alternating, it causes a \"brace\" \nto hold the component in place. 0.005 has proven to be the perfect amount of \"off-center\" position when using our standard breakaway headers.\nAlthough looks a little odd when you look at the bare footprint, once you have a header in there, the alteration is very hard to notice. Also,\nif you push a header all the way into place, it is covered up entirely on the bottom side. This idea of altering the position of holes to aid alignment \nwill be further integrated into the Sparkfun Library for other footprints. It can help hold any component with 3 or more connection pins.")
|
||||
(fp_text reference J1 (at -1.27 -1.778) (layer F.SilkS) hide
|
||||
(effects (font (size 1.2065 1.2065) (thickness 0.1016)) (justify left bottom))
|
||||
)
|
||||
(fp_text value ZL201-06G (at -1.27 3.302) (layer F.Fab)
|
||||
(effects (font (size 1.2065 1.2065) (thickness 0.09652)) (justify left bottom))
|
||||
)
|
||||
(fp_line (start -1.27 -0.508) (end -0.635 -1.143) (layer F.SilkS) (width 0.2032))
|
||||
(fp_line (start -0.635 -1.143) (end 0.635 -1.143) (layer F.SilkS) (width 0.2032))
|
||||
(fp_line (start 0.635 -1.143) (end 1.27 -0.508) (layer F.SilkS) (width 0.2032))
|
||||
(fp_line (start 1.27 -0.508) (end 1.905 -1.143) (layer F.SilkS) (width 0.2032))
|
||||
(fp_line (start 1.905 -1.143) (end 3.175 -1.143) (layer F.SilkS) (width 0.2032))
|
||||
(fp_line (start 3.175 -1.143) (end 3.81 -0.508) (layer F.SilkS) (width 0.2032))
|
||||
(fp_line (start 3.81 -0.508) (end 4.445 -1.143) (layer F.SilkS) (width 0.2032))
|
||||
(fp_line (start 4.445 -1.143) (end 5.715 -1.143) (layer F.SilkS) (width 0.2032))
|
||||
(fp_line (start 5.715 -1.143) (end 6.35 -0.508) (layer F.SilkS) (width 0.2032))
|
||||
(fp_line (start 6.35 -0.508) (end 6.985 -1.143) (layer F.SilkS) (width 0.2032))
|
||||
(fp_line (start 6.985 -1.143) (end 8.255 -1.143) (layer F.SilkS) (width 0.2032))
|
||||
(fp_line (start 8.255 -1.143) (end 8.89 -0.508) (layer F.SilkS) (width 0.2032))
|
||||
(fp_line (start 8.89 -0.508) (end 9.525 -1.143) (layer F.SilkS) (width 0.2032))
|
||||
(fp_line (start 9.525 -1.143) (end 10.795 -1.143) (layer F.SilkS) (width 0.2032))
|
||||
(fp_line (start 10.795 -1.143) (end 11.43 -0.508) (layer F.SilkS) (width 0.2032))
|
||||
(fp_line (start 11.43 -0.508) (end 12.065 -1.143) (layer F.SilkS) (width 0.2032))
|
||||
(fp_line (start 12.065 -1.143) (end 13.335 -1.143) (layer F.SilkS) (width 0.2032))
|
||||
(fp_line (start 13.335 -1.143) (end 13.97 -0.508) (layer F.SilkS) (width 0.2032))
|
||||
(fp_line (start 13.97 -0.508) (end 13.97 0.762) (layer F.SilkS) (width 0.2032))
|
||||
(fp_line (start 13.97 0.762) (end 13.335 1.397) (layer F.SilkS) (width 0.2032))
|
||||
(fp_line (start 13.335 1.397) (end 12.065 1.397) (layer F.SilkS) (width 0.2032))
|
||||
(fp_line (start 12.065 1.397) (end 11.43 0.762) (layer F.SilkS) (width 0.2032))
|
||||
(fp_line (start 11.43 0.762) (end 10.795 1.397) (layer F.SilkS) (width 0.2032))
|
||||
(fp_line (start 10.795 1.397) (end 9.525 1.397) (layer F.SilkS) (width 0.2032))
|
||||
(fp_line (start 9.525 1.397) (end 8.89 0.762) (layer F.SilkS) (width 0.2032))
|
||||
(fp_line (start 8.89 0.762) (end 8.255 1.397) (layer F.SilkS) (width 0.2032))
|
||||
(fp_line (start 8.255 1.397) (end 6.985 1.397) (layer F.SilkS) (width 0.2032))
|
||||
(fp_line (start 6.985 1.397) (end 6.35 0.762) (layer F.SilkS) (width 0.2032))
|
||||
(fp_line (start 6.35 0.762) (end 5.715 1.397) (layer F.SilkS) (width 0.2032))
|
||||
(fp_line (start 5.715 1.397) (end 4.445 1.397) (layer F.SilkS) (width 0.2032))
|
||||
(fp_line (start 4.445 1.397) (end 3.81 0.762) (layer F.SilkS) (width 0.2032))
|
||||
(fp_line (start 3.81 0.762) (end 3.175 1.397) (layer F.SilkS) (width 0.2032))
|
||||
(fp_line (start 3.175 1.397) (end 1.905 1.397) (layer F.SilkS) (width 0.2032))
|
||||
(fp_line (start 1.905 1.397) (end 1.27 0.762) (layer F.SilkS) (width 0.2032))
|
||||
(fp_line (start 1.27 0.762) (end 0.635 1.397) (layer F.SilkS) (width 0.2032))
|
||||
(fp_line (start 0.635 1.397) (end -0.635 1.397) (layer F.SilkS) (width 0.2032))
|
||||
(fp_line (start -0.635 1.397) (end -1.27 0.762) (layer F.SilkS) (width 0.2032))
|
||||
(fp_line (start -1.27 0.762) (end -1.27 -0.508) (layer F.SilkS) (width 0.2032))
|
||||
(fp_line (start 1.27 -0.508) (end 1.27 0.762) (layer F.SilkS) (width 0.2032))
|
||||
(fp_line (start 3.81 -0.508) (end 3.81 0.762) (layer F.SilkS) (width 0.2032))
|
||||
(fp_line (start 6.35 -0.508) (end 6.35 0.762) (layer F.SilkS) (width 0.2032))
|
||||
(fp_line (start 8.89 -0.508) (end 8.89 0.762) (layer F.SilkS) (width 0.2032))
|
||||
(fp_line (start 11.43 -0.508) (end 11.43 0.762) (layer F.SilkS) (width 0.2032))
|
||||
(fp_poly (pts (xy -0.2921 0.4191) (xy 0.2921 0.4191) (xy 0.2921 -0.1651) (xy -0.2921 -0.1651)) (layer F.Fab) (width 0))
|
||||
(fp_poly (pts (xy 2.2479 0.4191) (xy 2.8321 0.4191) (xy 2.8321 -0.1651) (xy 2.2479 -0.1651)) (layer F.Fab) (width 0))
|
||||
(fp_poly (pts (xy 4.7879 0.4191) (xy 5.3721 0.4191) (xy 5.3721 -0.1651) (xy 4.7879 -0.1651)) (layer F.Fab) (width 0))
|
||||
(fp_poly (pts (xy 7.3279 0.4191) (xy 7.9121 0.4191) (xy 7.9121 -0.1651) (xy 7.3279 -0.1651)) (layer F.Fab) (width 0))
|
||||
(fp_poly (pts (xy 9.8679 0.4191) (xy 10.4521 0.4191) (xy 10.4521 -0.1651) (xy 9.8679 -0.1651)) (layer F.Fab) (width 0))
|
||||
(fp_poly (pts (xy 12.4079 0.4191) (xy 12.9921 0.4191) (xy 12.9921 -0.1651) (xy 12.4079 -0.1651)) (layer F.Fab) (width 0))
|
||||
(pad 1 thru_hole circle (at 0 0) (size 1.8796 1.8796) (drill 1.016) (layers *.Cu *.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 2 thru_hole circle (at 2.54 0.254) (size 1.8796 1.8796) (drill 1.016) (layers *.Cu *.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 3 thru_hole circle (at 5.08 0) (size 1.8796 1.8796) (drill 1.016) (layers *.Cu *.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 4 thru_hole circle (at 7.62 0.254) (size 1.8796 1.8796) (drill 1.016) (layers *.Cu *.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 5 thru_hole circle (at 10.16 0) (size 1.8796 1.8796) (drill 1.016) (layers *.Cu *.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 6 thru_hole circle (at 12.7 0.254) (size 1.8796 1.8796) (drill 1.016) (layers *.Cu *.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
)
|
80
PCB/kicad/logicBoard/SB_LOGICBOARD_V01.pretty/1X07.kicad_mod
Normal file
80
PCB/kicad/logicBoard/SB_LOGICBOARD_V01.pretty/1X07.kicad_mod
Normal file
|
@ -0,0 +1,80 @@
|
|||
(module 1X07 (layer F.Cu) (tedit 0)
|
||||
(descr "<b>PIN HEADER</b>")
|
||||
(fp_text reference JP12 (at -8.9662 -1.8288) (layer F.SilkS) hide
|
||||
(effects (font (size 1.2065 1.2065) (thickness 0.127)) (justify left bottom))
|
||||
)
|
||||
(fp_text value "" (at -8.89 3.175) (layer F.Fab)
|
||||
(effects (font (size 1.2065 1.2065) (thickness 0.09652)) (justify left bottom))
|
||||
)
|
||||
(fp_line (start 3.81 -0.635) (end 4.445 -1.27) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 4.445 -1.27) (end 5.715 -1.27) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 5.715 -1.27) (end 6.35 -0.635) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 6.35 -0.635) (end 6.35 0.635) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 6.35 0.635) (end 5.715 1.27) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 5.715 1.27) (end 4.445 1.27) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 4.445 1.27) (end 3.81 0.635) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -0.635 -1.27) (end 0.635 -1.27) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 0.635 -1.27) (end 1.27 -0.635) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 1.27 -0.635) (end 1.27 0.635) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 1.27 0.635) (end 0.635 1.27) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 1.27 -0.635) (end 1.905 -1.27) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 1.905 -1.27) (end 3.175 -1.27) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 3.175 -1.27) (end 3.81 -0.635) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 3.81 -0.635) (end 3.81 0.635) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 3.81 0.635) (end 3.175 1.27) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 3.175 1.27) (end 1.905 1.27) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 1.905 1.27) (end 1.27 0.635) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -3.81 -0.635) (end -3.175 -1.27) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -3.175 -1.27) (end -1.905 -1.27) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -1.905 -1.27) (end -1.27 -0.635) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -1.27 -0.635) (end -1.27 0.635) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -1.27 0.635) (end -1.905 1.27) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -1.905 1.27) (end -3.175 1.27) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -3.175 1.27) (end -3.81 0.635) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -0.635 -1.27) (end -1.27 -0.635) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -1.27 0.635) (end -0.635 1.27) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 0.635 1.27) (end -0.635 1.27) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -8.255 -1.27) (end -6.985 -1.27) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -6.985 -1.27) (end -6.35 -0.635) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -6.35 -0.635) (end -6.35 0.635) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -6.35 0.635) (end -6.985 1.27) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -6.35 -0.635) (end -5.715 -1.27) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -5.715 -1.27) (end -4.445 -1.27) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -4.445 -1.27) (end -3.81 -0.635) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -3.81 -0.635) (end -3.81 0.635) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -3.81 0.635) (end -4.445 1.27) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -4.445 1.27) (end -5.715 1.27) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -5.715 1.27) (end -6.35 0.635) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -8.89 -0.635) (end -8.89 0.635) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -8.255 -1.27) (end -8.89 -0.635) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -8.89 0.635) (end -8.255 1.27) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -6.985 1.27) (end -8.255 1.27) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 6.985 -1.27) (end 8.255 -1.27) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 8.255 -1.27) (end 8.89 -0.635) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 8.89 -0.635) (end 8.89 0.635) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 8.89 0.635) (end 8.255 1.27) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 6.985 -1.27) (end 6.35 -0.635) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 6.35 0.635) (end 6.985 1.27) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 8.255 1.27) (end 6.985 1.27) (layer F.SilkS) (width 0.1524))
|
||||
(fp_poly (pts (xy 4.826 0.254) (xy 5.334 0.254) (xy 5.334 -0.254) (xy 4.826 -0.254)) (layer F.Fab) (width 0))
|
||||
(fp_poly (pts (xy 2.286 0.254) (xy 2.794 0.254) (xy 2.794 -0.254) (xy 2.286 -0.254)) (layer F.Fab) (width 0))
|
||||
(fp_poly (pts (xy -0.254 0.254) (xy 0.254 0.254) (xy 0.254 -0.254) (xy -0.254 -0.254)) (layer F.Fab) (width 0))
|
||||
(fp_poly (pts (xy -2.794 0.254) (xy -2.286 0.254) (xy -2.286 -0.254) (xy -2.794 -0.254)) (layer F.Fab) (width 0))
|
||||
(fp_poly (pts (xy -5.334 0.254) (xy -4.826 0.254) (xy -4.826 -0.254) (xy -5.334 -0.254)) (layer F.Fab) (width 0))
|
||||
(fp_poly (pts (xy -7.874 0.254) (xy -7.366 0.254) (xy -7.366 -0.254) (xy -7.874 -0.254)) (layer F.Fab) (width 0))
|
||||
(fp_poly (pts (xy 7.366 0.254) (xy 7.874 0.254) (xy 7.874 -0.254) (xy 7.366 -0.254)) (layer F.Fab) (width 0))
|
||||
(pad 1 thru_hole oval (at -7.62 0 90) (size 3.048 1.524) (drill 1.016) (layers *.Cu *.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 2 thru_hole oval (at -5.08 0 90) (size 3.048 1.524) (drill 1.016) (layers *.Cu *.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 3 thru_hole oval (at -2.54 0 90) (size 3.048 1.524) (drill 1.016) (layers *.Cu *.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 4 thru_hole oval (at 0 0 90) (size 3.048 1.524) (drill 1.016) (layers *.Cu *.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 5 thru_hole oval (at 2.54 0 90) (size 3.048 1.524) (drill 1.016) (layers *.Cu *.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 6 thru_hole oval (at 5.08 0 90) (size 3.048 1.524) (drill 1.016) (layers *.Cu *.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 7 thru_hole oval (at 7.62 0 90) (size 3.048 1.524) (drill 1.016) (layers *.Cu *.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
)
|
210
PCB/kicad/logicBoard/SB_LOGICBOARD_V01.pretty/1X20.kicad_mod
Normal file
210
PCB/kicad/logicBoard/SB_LOGICBOARD_V01.pretty/1X20.kicad_mod
Normal file
|
@ -0,0 +1,210 @@
|
|||
(module 1X20 (layer F.Cu) (tedit 0)
|
||||
(descr "<b>PIN HEADER</b>")
|
||||
(fp_text reference JP6 (at -25.4762 -1.8288) (layer F.SilkS) hide
|
||||
(effects (font (size 1.2065 1.2065) (thickness 0.127)) (justify left bottom))
|
||||
)
|
||||
(fp_text value "" (at -25.4 3.175) (layer F.Fab)
|
||||
(effects (font (size 1.2065 1.2065) (thickness 0.09652)) (justify left bottom))
|
||||
)
|
||||
(fp_line (start 20.955 -1.27) (end 22.225 -1.27) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 22.225 -1.27) (end 22.86 -0.635) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 22.86 -0.635) (end 22.86 0.635) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 22.86 0.635) (end 22.225 1.27) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 17.78 -0.635) (end 18.415 -1.27) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 18.415 -1.27) (end 19.685 -1.27) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 19.685 -1.27) (end 20.32 -0.635) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 20.32 -0.635) (end 20.32 0.635) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 20.32 0.635) (end 19.685 1.27) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 19.685 1.27) (end 18.415 1.27) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 18.415 1.27) (end 17.78 0.635) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 20.955 -1.27) (end 20.32 -0.635) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 20.32 0.635) (end 20.955 1.27) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 22.225 1.27) (end 20.955 1.27) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 13.335 -1.27) (end 14.605 -1.27) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 14.605 -1.27) (end 15.24 -0.635) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 15.24 -0.635) (end 15.24 0.635) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 15.24 0.635) (end 14.605 1.27) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 15.24 -0.635) (end 15.875 -1.27) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 15.875 -1.27) (end 17.145 -1.27) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 17.145 -1.27) (end 17.78 -0.635) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 17.78 -0.635) (end 17.78 0.635) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 17.78 0.635) (end 17.145 1.27) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 17.145 1.27) (end 15.875 1.27) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 15.875 1.27) (end 15.24 0.635) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 10.16 -0.635) (end 10.795 -1.27) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 10.795 -1.27) (end 12.065 -1.27) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 12.065 -1.27) (end 12.7 -0.635) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 12.7 -0.635) (end 12.7 0.635) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 12.7 0.635) (end 12.065 1.27) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 12.065 1.27) (end 10.795 1.27) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 10.795 1.27) (end 10.16 0.635) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 13.335 -1.27) (end 12.7 -0.635) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 12.7 0.635) (end 13.335 1.27) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 14.605 1.27) (end 13.335 1.27) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 5.715 -1.27) (end 6.985 -1.27) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 6.985 -1.27) (end 7.62 -0.635) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 7.62 -0.635) (end 7.62 0.635) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 7.62 0.635) (end 6.985 1.27) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 7.62 -0.635) (end 8.255 -1.27) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 8.255 -1.27) (end 9.525 -1.27) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 9.525 -1.27) (end 10.16 -0.635) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 10.16 -0.635) (end 10.16 0.635) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 10.16 0.635) (end 9.525 1.27) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 9.525 1.27) (end 8.255 1.27) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 8.255 1.27) (end 7.62 0.635) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 2.54 -0.635) (end 3.175 -1.27) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 3.175 -1.27) (end 4.445 -1.27) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 4.445 -1.27) (end 5.08 -0.635) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 5.08 -0.635) (end 5.08 0.635) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 5.08 0.635) (end 4.445 1.27) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 4.445 1.27) (end 3.175 1.27) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 3.175 1.27) (end 2.54 0.635) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 5.715 -1.27) (end 5.08 -0.635) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 5.08 0.635) (end 5.715 1.27) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 6.985 1.27) (end 5.715 1.27) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -1.905 -1.27) (end -0.635 -1.27) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -0.635 -1.27) (end 0 -0.635) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 0 -0.635) (end 0 0.635) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 0 0.635) (end -0.635 1.27) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 0 -0.635) (end 0.635 -1.27) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 0.635 -1.27) (end 1.905 -1.27) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 1.905 -1.27) (end 2.54 -0.635) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 2.54 -0.635) (end 2.54 0.635) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 2.54 0.635) (end 1.905 1.27) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 1.905 1.27) (end 0.635 1.27) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 0.635 1.27) (end 0 0.635) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -5.08 -0.635) (end -4.445 -1.27) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -4.445 -1.27) (end -3.175 -1.27) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -3.175 -1.27) (end -2.54 -0.635) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -2.54 -0.635) (end -2.54 0.635) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -2.54 0.635) (end -3.175 1.27) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -3.175 1.27) (end -4.445 1.27) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -4.445 1.27) (end -5.08 0.635) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -1.905 -1.27) (end -2.54 -0.635) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -2.54 0.635) (end -1.905 1.27) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -0.635 1.27) (end -1.905 1.27) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -9.525 -1.27) (end -8.255 -1.27) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -8.255 -1.27) (end -7.62 -0.635) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -7.62 -0.635) (end -7.62 0.635) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -7.62 0.635) (end -8.255 1.27) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -7.62 -0.635) (end -6.985 -1.27) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -6.985 -1.27) (end -5.715 -1.27) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -5.715 -1.27) (end -5.08 -0.635) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -5.08 -0.635) (end -5.08 0.635) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -5.08 0.635) (end -5.715 1.27) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -5.715 1.27) (end -6.985 1.27) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -6.985 1.27) (end -7.62 0.635) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -12.7 -0.635) (end -12.065 -1.27) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -12.065 -1.27) (end -10.795 -1.27) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -10.795 -1.27) (end -10.16 -0.635) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -10.16 -0.635) (end -10.16 0.635) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -10.16 0.635) (end -10.795 1.27) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -10.795 1.27) (end -12.065 1.27) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -12.065 1.27) (end -12.7 0.635) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -9.525 -1.27) (end -10.16 -0.635) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -10.16 0.635) (end -9.525 1.27) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -8.255 1.27) (end -9.525 1.27) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -17.145 -1.27) (end -15.875 -1.27) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -15.875 -1.27) (end -15.24 -0.635) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -15.24 -0.635) (end -15.24 0.635) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -15.24 0.635) (end -15.875 1.27) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -15.24 -0.635) (end -14.605 -1.27) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -14.605 -1.27) (end -13.335 -1.27) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -13.335 -1.27) (end -12.7 -0.635) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -12.7 -0.635) (end -12.7 0.635) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -12.7 0.635) (end -13.335 1.27) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -13.335 1.27) (end -14.605 1.27) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -14.605 1.27) (end -15.24 0.635) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -20.32 -0.635) (end -19.685 -1.27) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -19.685 -1.27) (end -18.415 -1.27) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -18.415 -1.27) (end -17.78 -0.635) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -17.78 -0.635) (end -17.78 0.635) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -17.78 0.635) (end -18.415 1.27) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -18.415 1.27) (end -19.685 1.27) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -19.685 1.27) (end -20.32 0.635) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -17.145 -1.27) (end -17.78 -0.635) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -17.78 0.635) (end -17.145 1.27) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -15.875 1.27) (end -17.145 1.27) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -24.765 -1.27) (end -23.495 -1.27) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -23.495 -1.27) (end -22.86 -0.635) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -22.86 -0.635) (end -22.86 0.635) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -22.86 0.635) (end -23.495 1.27) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -22.86 -0.635) (end -22.225 -1.27) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -22.225 -1.27) (end -20.955 -1.27) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -20.955 -1.27) (end -20.32 -0.635) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -20.32 -0.635) (end -20.32 0.635) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -20.32 0.635) (end -20.955 1.27) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -20.955 1.27) (end -22.225 1.27) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -22.225 1.27) (end -22.86 0.635) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -25.4 -0.635) (end -25.4 0.635) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -24.765 -1.27) (end -25.4 -0.635) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -25.4 0.635) (end -24.765 1.27) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -23.495 1.27) (end -24.765 1.27) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 23.495 -1.27) (end 24.765 -1.27) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 24.765 -1.27) (end 25.4 -0.635) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 25.4 -0.635) (end 25.4 0.635) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 25.4 0.635) (end 24.765 1.27) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 23.495 -1.27) (end 22.86 -0.635) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 22.86 0.635) (end 23.495 1.27) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 24.765 1.27) (end 23.495 1.27) (layer F.SilkS) (width 0.1524))
|
||||
(fp_poly (pts (xy 21.336 0.254) (xy 21.844 0.254) (xy 21.844 -0.254) (xy 21.336 -0.254)) (layer F.Fab) (width 0))
|
||||
(fp_poly (pts (xy 18.796 0.254) (xy 19.304 0.254) (xy 19.304 -0.254) (xy 18.796 -0.254)) (layer F.Fab) (width 0))
|
||||
(fp_poly (pts (xy 16.256 0.254) (xy 16.764 0.254) (xy 16.764 -0.254) (xy 16.256 -0.254)) (layer F.Fab) (width 0))
|
||||
(fp_poly (pts (xy 13.716 0.254) (xy 14.224 0.254) (xy 14.224 -0.254) (xy 13.716 -0.254)) (layer F.Fab) (width 0))
|
||||
(fp_poly (pts (xy 11.176 0.254) (xy 11.684 0.254) (xy 11.684 -0.254) (xy 11.176 -0.254)) (layer F.Fab) (width 0))
|
||||
(fp_poly (pts (xy 8.636 0.254) (xy 9.144 0.254) (xy 9.144 -0.254) (xy 8.636 -0.254)) (layer F.Fab) (width 0))
|
||||
(fp_poly (pts (xy 6.096 0.254) (xy 6.604 0.254) (xy 6.604 -0.254) (xy 6.096 -0.254)) (layer F.Fab) (width 0))
|
||||
(fp_poly (pts (xy 3.556 0.254) (xy 4.064 0.254) (xy 4.064 -0.254) (xy 3.556 -0.254)) (layer F.Fab) (width 0))
|
||||
(fp_poly (pts (xy 1.016 0.254) (xy 1.524 0.254) (xy 1.524 -0.254) (xy 1.016 -0.254)) (layer F.Fab) (width 0))
|
||||
(fp_poly (pts (xy -1.524 0.254) (xy -1.016 0.254) (xy -1.016 -0.254) (xy -1.524 -0.254)) (layer F.Fab) (width 0))
|
||||
(fp_poly (pts (xy -4.064 0.254) (xy -3.556 0.254) (xy -3.556 -0.254) (xy -4.064 -0.254)) (layer F.Fab) (width 0))
|
||||
(fp_poly (pts (xy -6.604 0.254) (xy -6.096 0.254) (xy -6.096 -0.254) (xy -6.604 -0.254)) (layer F.Fab) (width 0))
|
||||
(fp_poly (pts (xy -9.144 0.254) (xy -8.636 0.254) (xy -8.636 -0.254) (xy -9.144 -0.254)) (layer F.Fab) (width 0))
|
||||
(fp_poly (pts (xy -11.684 0.254) (xy -11.176 0.254) (xy -11.176 -0.254) (xy -11.684 -0.254)) (layer F.Fab) (width 0))
|
||||
(fp_poly (pts (xy -14.224 0.254) (xy -13.716 0.254) (xy -13.716 -0.254) (xy -14.224 -0.254)) (layer F.Fab) (width 0))
|
||||
(fp_poly (pts (xy -16.764 0.254) (xy -16.256 0.254) (xy -16.256 -0.254) (xy -16.764 -0.254)) (layer F.Fab) (width 0))
|
||||
(fp_poly (pts (xy -19.304 0.254) (xy -18.796 0.254) (xy -18.796 -0.254) (xy -19.304 -0.254)) (layer F.Fab) (width 0))
|
||||
(fp_poly (pts (xy -21.844 0.254) (xy -21.336 0.254) (xy -21.336 -0.254) (xy -21.844 -0.254)) (layer F.Fab) (width 0))
|
||||
(fp_poly (pts (xy -24.384 0.254) (xy -23.876 0.254) (xy -23.876 -0.254) (xy -24.384 -0.254)) (layer F.Fab) (width 0))
|
||||
(fp_poly (pts (xy 23.876 0.254) (xy 24.384 0.254) (xy 24.384 -0.254) (xy 23.876 -0.254)) (layer F.Fab) (width 0))
|
||||
(pad 1 thru_hole oval (at -24.13 0 90) (size 3.048 1.524) (drill 1.016) (layers *.Cu *.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 2 thru_hole oval (at -21.59 0 90) (size 3.048 1.524) (drill 1.016) (layers *.Cu *.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 3 thru_hole oval (at -19.05 0 90) (size 3.048 1.524) (drill 1.016) (layers *.Cu *.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 4 thru_hole oval (at -16.51 0 90) (size 3.048 1.524) (drill 1.016) (layers *.Cu *.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 5 thru_hole oval (at -13.97 0 90) (size 3.048 1.524) (drill 1.016) (layers *.Cu *.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 6 thru_hole oval (at -11.43 0 90) (size 3.048 1.524) (drill 1.016) (layers *.Cu *.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 7 thru_hole oval (at -8.89 0 90) (size 3.048 1.524) (drill 1.016) (layers *.Cu *.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 8 thru_hole oval (at -6.35 0 90) (size 3.048 1.524) (drill 1.016) (layers *.Cu *.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 9 thru_hole oval (at -3.81 0 90) (size 3.048 1.524) (drill 1.016) (layers *.Cu *.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 10 thru_hole oval (at -1.27 0 90) (size 3.048 1.524) (drill 1.016) (layers *.Cu *.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 11 thru_hole oval (at 1.27 0 90) (size 3.048 1.524) (drill 1.016) (layers *.Cu *.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 12 thru_hole oval (at 3.81 0 90) (size 3.048 1.524) (drill 1.016) (layers *.Cu *.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 13 thru_hole oval (at 6.35 0 90) (size 3.048 1.524) (drill 1.016) (layers *.Cu *.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 14 thru_hole oval (at 8.89 0 90) (size 3.048 1.524) (drill 1.016) (layers *.Cu *.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 15 thru_hole oval (at 11.43 0 90) (size 3.048 1.524) (drill 1.016) (layers *.Cu *.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 16 thru_hole oval (at 13.97 0 90) (size 3.048 1.524) (drill 1.016) (layers *.Cu *.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 17 thru_hole oval (at 16.51 0 90) (size 3.048 1.524) (drill 1.016) (layers *.Cu *.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 18 thru_hole oval (at 19.05 0 90) (size 3.048 1.524) (drill 1.016) (layers *.Cu *.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 19 thru_hole oval (at 21.59 0 90) (size 3.048 1.524) (drill 1.016) (layers *.Cu *.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 20 thru_hole oval (at 24.13 0 90) (size 3.048 1.524) (drill 1.016) (layers *.Cu *.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
)
|
88
PCB/kicad/logicBoard/SB_LOGICBOARD_V01.pretty/2X06.kicad_mod
Normal file
88
PCB/kicad/logicBoard/SB_LOGICBOARD_V01.pretty/2X06.kicad_mod
Normal file
|
@ -0,0 +1,88 @@
|
|||
(module 2X06 (layer F.Cu) (tedit 0)
|
||||
(descr "<b>PIN HEADER</b>")
|
||||
(fp_text reference ISO (at -7.775 1.52 90) (layer F.SilkS)
|
||||
(effects (font (size 1.2065 1.2065) (thickness 0.12065)) (justify left bottom))
|
||||
)
|
||||
(fp_text value "" (at -7.62 4.445) (layer F.Fab)
|
||||
(effects (font (size 1.2065 1.2065) (thickness 0.09652)) (justify left bottom))
|
||||
)
|
||||
(fp_line (start -7.62 1.905) (end -6.985 2.54) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -5.715 2.54) (end -5.08 1.905) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -5.08 1.905) (end -4.445 2.54) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -3.175 2.54) (end -2.54 1.905) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -2.54 1.905) (end -1.905 2.54) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -0.635 2.54) (end 0 1.905) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 0 1.905) (end 0.635 2.54) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 1.905 2.54) (end 2.54 1.905) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 2.54 1.905) (end 3.175 2.54) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 4.445 2.54) (end 5.08 1.905) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -7.62 1.905) (end -7.62 -1.905) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -7.62 -1.905) (end -6.985 -2.54) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -6.985 -2.54) (end -5.715 -2.54) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -5.715 -2.54) (end -5.08 -1.905) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -5.08 -1.905) (end -4.445 -2.54) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -4.445 -2.54) (end -3.175 -2.54) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -3.175 -2.54) (end -2.54 -1.905) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -2.54 -1.905) (end -1.905 -2.54) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -1.905 -2.54) (end -0.635 -2.54) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -0.635 -2.54) (end 0 -1.905) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 0 -1.905) (end 0.635 -2.54) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 0.635 -2.54) (end 1.905 -2.54) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 1.905 -2.54) (end 2.54 -1.905) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 2.54 -1.905) (end 3.175 -2.54) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 3.175 -2.54) (end 4.445 -2.54) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 4.445 -2.54) (end 5.08 -1.905) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -5.08 -1.905) (end -5.08 1.905) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -2.54 -1.905) (end -2.54 1.905) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 0 -1.905) (end 0 1.905) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 2.54 -1.905) (end 2.54 1.905) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 5.08 -1.905) (end 5.08 1.905) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 3.175 2.54) (end 4.445 2.54) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 0.635 2.54) (end 1.905 2.54) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -1.905 2.54) (end -0.635 2.54) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -4.445 2.54) (end -3.175 2.54) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -6.985 2.54) (end -5.715 2.54) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 5.08 1.905) (end 5.715 2.54) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 6.985 2.54) (end 7.62 1.905) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 5.08 -1.905) (end 5.715 -2.54) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 5.715 -2.54) (end 6.985 -2.54) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 6.985 -2.54) (end 7.62 -1.905) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 7.62 -1.905) (end 7.62 1.905) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 5.715 2.54) (end 6.985 2.54) (layer F.SilkS) (width 0.1524))
|
||||
(fp_poly (pts (xy -6.604 1.524) (xy -6.096 1.524) (xy -6.096 1.016) (xy -6.604 1.016)) (layer F.Fab) (width 0))
|
||||
(fp_poly (pts (xy -6.604 -1.016) (xy -6.096 -1.016) (xy -6.096 -1.524) (xy -6.604 -1.524)) (layer F.Fab) (width 0))
|
||||
(fp_poly (pts (xy -4.064 -1.016) (xy -3.556 -1.016) (xy -3.556 -1.524) (xy -4.064 -1.524)) (layer F.Fab) (width 0))
|
||||
(fp_poly (pts (xy -4.064 1.524) (xy -3.556 1.524) (xy -3.556 1.016) (xy -4.064 1.016)) (layer F.Fab) (width 0))
|
||||
(fp_poly (pts (xy -1.524 -1.016) (xy -1.016 -1.016) (xy -1.016 -1.524) (xy -1.524 -1.524)) (layer F.Fab) (width 0))
|
||||
(fp_poly (pts (xy -1.524 1.524) (xy -1.016 1.524) (xy -1.016 1.016) (xy -1.524 1.016)) (layer F.Fab) (width 0))
|
||||
(fp_poly (pts (xy 1.016 -1.016) (xy 1.524 -1.016) (xy 1.524 -1.524) (xy 1.016 -1.524)) (layer F.Fab) (width 0))
|
||||
(fp_poly (pts (xy 3.556 -1.016) (xy 4.064 -1.016) (xy 4.064 -1.524) (xy 3.556 -1.524)) (layer F.Fab) (width 0))
|
||||
(fp_poly (pts (xy 1.016 1.524) (xy 1.524 1.524) (xy 1.524 1.016) (xy 1.016 1.016)) (layer F.Fab) (width 0))
|
||||
(fp_poly (pts (xy 3.556 1.524) (xy 4.064 1.524) (xy 4.064 1.016) (xy 3.556 1.016)) (layer F.Fab) (width 0))
|
||||
(fp_poly (pts (xy 6.096 -1.016) (xy 6.604 -1.016) (xy 6.604 -1.524) (xy 6.096 -1.524)) (layer F.Fab) (width 0))
|
||||
(fp_poly (pts (xy 6.096 1.524) (xy 6.604 1.524) (xy 6.604 1.016) (xy 6.096 1.016)) (layer F.Fab) (width 0))
|
||||
(pad 1 thru_hole circle (at -6.35 1.27) (size 1.524 1.524) (drill 1.016) (layers *.Cu *.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 2 thru_hole circle (at -6.35 -1.27) (size 1.524 1.524) (drill 1.016) (layers *.Cu *.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 3 thru_hole circle (at -3.81 1.27) (size 1.524 1.524) (drill 1.016) (layers *.Cu *.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 4 thru_hole circle (at -3.81 -1.27) (size 1.524 1.524) (drill 1.016) (layers *.Cu *.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 5 thru_hole circle (at -1.27 1.27) (size 1.524 1.524) (drill 1.016) (layers *.Cu *.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 6 thru_hole circle (at -1.27 -1.27) (size 1.524 1.524) (drill 1.016) (layers *.Cu *.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 7 thru_hole circle (at 1.27 1.27) (size 1.524 1.524) (drill 1.016) (layers *.Cu *.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 8 thru_hole circle (at 1.27 -1.27) (size 1.524 1.524) (drill 1.016) (layers *.Cu *.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 9 thru_hole circle (at 3.81 1.27) (size 1.524 1.524) (drill 1.016) (layers *.Cu *.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 10 thru_hole circle (at 3.81 -1.27) (size 1.524 1.524) (drill 1.016) (layers *.Cu *.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 11 thru_hole circle (at 6.35 1.27) (size 1.524 1.524) (drill 1.016) (layers *.Cu *.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 12 thru_hole circle (at 6.35 -1.27) (size 1.524 1.524) (drill 1.016) (layers *.Cu *.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
)
|
101
PCB/kicad/logicBoard/SB_LOGICBOARD_V01.pretty/2X07.kicad_mod
Normal file
101
PCB/kicad/logicBoard/SB_LOGICBOARD_V01.pretty/2X07.kicad_mod
Normal file
|
@ -0,0 +1,101 @@
|
|||
(module 2X07 (layer F.Cu) (tedit 0)
|
||||
(descr "<b>PIN HEADER</b>")
|
||||
(fp_text reference LCD (at -9.275 1.79 90) (layer F.SilkS)
|
||||
(effects (font (size 1.2065 1.2065) (thickness 0.12065)) (justify left bottom))
|
||||
)
|
||||
(fp_text value "" (at -8.89 4.445) (layer F.Fab)
|
||||
(effects (font (size 1.2065 1.2065) (thickness 0.09652)) (justify left bottom))
|
||||
)
|
||||
(fp_line (start -8.89 1.905) (end -8.255 2.54) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -6.985 2.54) (end -6.35 1.905) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -6.35 1.905) (end -5.715 2.54) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -4.445 2.54) (end -3.81 1.905) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -3.81 1.905) (end -3.175 2.54) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -1.905 2.54) (end -1.27 1.905) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -1.27 1.905) (end -0.635 2.54) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 0.635 2.54) (end 1.27 1.905) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 1.27 1.905) (end 1.905 2.54) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 3.175 2.54) (end 3.81 1.905) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 3.81 1.905) (end 4.445 2.54) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 5.715 2.54) (end 6.35 1.905) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -8.89 1.905) (end -8.89 -1.905) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -8.89 -1.905) (end -8.255 -2.54) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -8.255 -2.54) (end -6.985 -2.54) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -6.985 -2.54) (end -6.35 -1.905) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -6.35 -1.905) (end -5.715 -2.54) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -5.715 -2.54) (end -4.445 -2.54) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -4.445 -2.54) (end -3.81 -1.905) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -3.81 -1.905) (end -3.175 -2.54) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -3.175 -2.54) (end -1.905 -2.54) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -1.905 -2.54) (end -1.27 -1.905) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -1.27 -1.905) (end -0.635 -2.54) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -0.635 -2.54) (end 0.635 -2.54) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 0.635 -2.54) (end 1.27 -1.905) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 1.27 -1.905) (end 1.905 -2.54) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 1.905 -2.54) (end 3.175 -2.54) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 3.175 -2.54) (end 3.81 -1.905) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 3.81 -1.905) (end 4.445 -2.54) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 4.445 -2.54) (end 5.715 -2.54) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 5.715 -2.54) (end 6.35 -1.905) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -6.35 -1.905) (end -6.35 1.905) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -3.81 -1.905) (end -3.81 1.905) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -1.27 -1.905) (end -1.27 1.905) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 1.27 -1.905) (end 1.27 1.905) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 3.81 -1.905) (end 3.81 1.905) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 6.35 -1.905) (end 6.35 1.905) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 4.445 2.54) (end 5.715 2.54) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 1.905 2.54) (end 3.175 2.54) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -0.635 2.54) (end 0.635 2.54) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -3.175 2.54) (end -1.905 2.54) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -5.715 2.54) (end -4.445 2.54) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -8.255 2.54) (end -6.985 2.54) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 6.35 1.905) (end 6.985 2.54) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 8.255 2.54) (end 8.89 1.905) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 6.35 -1.905) (end 6.985 -2.54) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 6.985 -2.54) (end 8.255 -2.54) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 8.255 -2.54) (end 8.89 -1.905) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 8.89 -1.905) (end 8.89 1.905) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 6.985 2.54) (end 8.255 2.54) (layer F.SilkS) (width 0.1524))
|
||||
(fp_poly (pts (xy -7.874 1.524) (xy -7.366 1.524) (xy -7.366 1.016) (xy -7.874 1.016)) (layer F.Fab) (width 0))
|
||||
(fp_poly (pts (xy -7.874 -1.016) (xy -7.366 -1.016) (xy -7.366 -1.524) (xy -7.874 -1.524)) (layer F.Fab) (width 0))
|
||||
(fp_poly (pts (xy -5.334 -1.016) (xy -4.826 -1.016) (xy -4.826 -1.524) (xy -5.334 -1.524)) (layer F.Fab) (width 0))
|
||||
(fp_poly (pts (xy -5.334 1.524) (xy -4.826 1.524) (xy -4.826 1.016) (xy -5.334 1.016)) (layer F.Fab) (width 0))
|
||||
(fp_poly (pts (xy -2.794 -1.016) (xy -2.286 -1.016) (xy -2.286 -1.524) (xy -2.794 -1.524)) (layer F.Fab) (width 0))
|
||||
(fp_poly (pts (xy -2.794 1.524) (xy -2.286 1.524) (xy -2.286 1.016) (xy -2.794 1.016)) (layer F.Fab) (width 0))
|
||||
(fp_poly (pts (xy -0.254 -1.016) (xy 0.254 -1.016) (xy 0.254 -1.524) (xy -0.254 -1.524)) (layer F.Fab) (width 0))
|
||||
(fp_poly (pts (xy 2.286 -1.016) (xy 2.794 -1.016) (xy 2.794 -1.524) (xy 2.286 -1.524)) (layer F.Fab) (width 0))
|
||||
(fp_poly (pts (xy 4.826 -1.016) (xy 5.334 -1.016) (xy 5.334 -1.524) (xy 4.826 -1.524)) (layer F.Fab) (width 0))
|
||||
(fp_poly (pts (xy -0.254 1.524) (xy 0.254 1.524) (xy 0.254 1.016) (xy -0.254 1.016)) (layer F.Fab) (width 0))
|
||||
(fp_poly (pts (xy 2.286 1.524) (xy 2.794 1.524) (xy 2.794 1.016) (xy 2.286 1.016)) (layer F.Fab) (width 0))
|
||||
(fp_poly (pts (xy 4.826 1.524) (xy 5.334 1.524) (xy 5.334 1.016) (xy 4.826 1.016)) (layer F.Fab) (width 0))
|
||||
(fp_poly (pts (xy 7.366 -1.016) (xy 7.874 -1.016) (xy 7.874 -1.524) (xy 7.366 -1.524)) (layer F.Fab) (width 0))
|
||||
(fp_poly (pts (xy 7.366 1.524) (xy 7.874 1.524) (xy 7.874 1.016) (xy 7.366 1.016)) (layer F.Fab) (width 0))
|
||||
(pad 1 thru_hole circle (at -7.62 1.27) (size 1.524 1.524) (drill 1.016) (layers *.Cu *.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 2 thru_hole circle (at -7.62 -1.27) (size 1.524 1.524) (drill 1.016) (layers *.Cu *.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 3 thru_hole circle (at -5.08 1.27) (size 1.524 1.524) (drill 1.016) (layers *.Cu *.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 4 thru_hole circle (at -5.08 -1.27) (size 1.524 1.524) (drill 1.016) (layers *.Cu *.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 5 thru_hole circle (at -2.54 1.27) (size 1.524 1.524) (drill 1.016) (layers *.Cu *.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 6 thru_hole circle (at -2.54 -1.27) (size 1.524 1.524) (drill 1.016) (layers *.Cu *.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 7 thru_hole circle (at 0 1.27) (size 1.524 1.524) (drill 1.016) (layers *.Cu *.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 8 thru_hole circle (at 0 -1.27) (size 1.524 1.524) (drill 1.016) (layers *.Cu *.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 9 thru_hole circle (at 2.54 1.27) (size 1.524 1.524) (drill 1.016) (layers *.Cu *.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 10 thru_hole circle (at 2.54 -1.27) (size 1.524 1.524) (drill 1.016) (layers *.Cu *.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 11 thru_hole circle (at 5.08 1.27) (size 1.524 1.524) (drill 1.016) (layers *.Cu *.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 12 thru_hole circle (at 5.08 -1.27) (size 1.524 1.524) (drill 1.016) (layers *.Cu *.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 13 thru_hole circle (at 7.62 1.27) (size 1.524 1.524) (drill 1.016) (layers *.Cu *.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 14 thru_hole circle (at 7.62 -1.27) (size 1.524 1.524) (drill 1.016) (layers *.Cu *.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
)
|
|
@ -0,0 +1,94 @@
|
|||
(module 2X20_2MM (layer F.Cu) (tedit 0)
|
||||
(descr "<b>PIN HEADER</b>")
|
||||
(fp_text reference MAINB (at -5.195 1.27 90) (layer F.SilkS)
|
||||
(effects (font (size 0.95 0.95) (thickness 0.114)) (justify left bottom))
|
||||
)
|
||||
(fp_text value "" (at -1.27 3.175) (layer F.Fab)
|
||||
(effects (font (size 1.2065 1.2065) (thickness 0.09652)) (justify left bottom))
|
||||
)
|
||||
(fp_line (start -3.55 1.7) (end -3.55 -3.7) (layer F.SilkS) (width 0.127))
|
||||
(fp_line (start -3.55 -3.7) (end 41.55 -3.7) (layer F.SilkS) (width 0.127))
|
||||
(fp_line (start 41.55 -3.7) (end 41.55 1.7) (layer F.SilkS) (width 0.127))
|
||||
(fp_line (start -3.55 1.7) (end 18 1.7) (layer F.SilkS) (width 0.127))
|
||||
(fp_line (start 20 1.7) (end 41.55 1.7) (layer F.SilkS) (width 0.127))
|
||||
(pad 1 thru_hole circle (at 0 0) (size 1.308 1.308) (drill 0.8) (layers *.Cu *.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 2 thru_hole circle (at 0 -2) (size 1.308 1.308) (drill 0.8) (layers *.Cu *.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 3 thru_hole circle (at 2 0) (size 1.308 1.308) (drill 0.8) (layers *.Cu *.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 4 thru_hole circle (at 2 -2) (size 1.308 1.308) (drill 0.8) (layers *.Cu *.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 5 thru_hole circle (at 4 0) (size 1.308 1.308) (drill 0.8) (layers *.Cu *.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 6 thru_hole circle (at 4 -2) (size 1.308 1.308) (drill 0.8) (layers *.Cu *.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 7 thru_hole circle (at 6 0) (size 1.308 1.308) (drill 0.8) (layers *.Cu *.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 8 thru_hole circle (at 6 -2) (size 1.308 1.308) (drill 0.8) (layers *.Cu *.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 9 thru_hole circle (at 8 0) (size 1.308 1.308) (drill 0.8) (layers *.Cu *.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 10 thru_hole circle (at 8 -2) (size 1.308 1.308) (drill 0.8) (layers *.Cu *.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 11 thru_hole circle (at 10 0) (size 1.308 1.308) (drill 0.8) (layers *.Cu *.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 12 thru_hole circle (at 10 -2) (size 1.308 1.308) (drill 0.8) (layers *.Cu *.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 13 thru_hole circle (at 12 0) (size 1.308 1.308) (drill 0.8) (layers *.Cu *.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 14 thru_hole circle (at 12 -2) (size 1.308 1.308) (drill 0.8) (layers *.Cu *.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 15 thru_hole circle (at 14 0) (size 1.308 1.308) (drill 0.8) (layers *.Cu *.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 16 thru_hole circle (at 14 -2) (size 1.308 1.308) (drill 0.8) (layers *.Cu *.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 17 thru_hole circle (at 16 0) (size 1.308 1.308) (drill 0.8) (layers *.Cu *.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 18 thru_hole circle (at 16 -2) (size 1.308 1.308) (drill 0.8) (layers *.Cu *.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 19 thru_hole circle (at 18 0) (size 1.308 1.308) (drill 0.8) (layers *.Cu *.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 20 thru_hole circle (at 18 -2) (size 1.308 1.308) (drill 0.8) (layers *.Cu *.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 21 thru_hole circle (at 20 0) (size 1.308 1.308) (drill 0.8) (layers *.Cu *.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 22 thru_hole circle (at 20 -2) (size 1.308 1.308) (drill 0.8) (layers *.Cu *.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 23 thru_hole circle (at 22 0) (size 1.308 1.308) (drill 0.8) (layers *.Cu *.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 24 thru_hole circle (at 22 -2) (size 1.308 1.308) (drill 0.8) (layers *.Cu *.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 25 thru_hole circle (at 24 0) (size 1.308 1.308) (drill 0.8) (layers *.Cu *.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 26 thru_hole circle (at 24 -2) (size 1.308 1.308) (drill 0.8) (layers *.Cu *.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 27 thru_hole circle (at 26 0) (size 1.308 1.308) (drill 0.8) (layers *.Cu *.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 28 thru_hole circle (at 26 -2) (size 1.308 1.308) (drill 0.8) (layers *.Cu *.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 29 thru_hole circle (at 28 0) (size 1.308 1.308) (drill 0.8) (layers *.Cu *.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 30 thru_hole circle (at 28 -2) (size 1.308 1.308) (drill 0.8) (layers *.Cu *.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 31 thru_hole circle (at 30 0) (size 1.308 1.308) (drill 0.8) (layers *.Cu *.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 32 thru_hole circle (at 30 -2) (size 1.308 1.308) (drill 0.8) (layers *.Cu *.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 33 thru_hole circle (at 32 0) (size 1.308 1.308) (drill 0.8) (layers *.Cu *.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 34 thru_hole circle (at 32 -2) (size 1.308 1.308) (drill 0.8) (layers *.Cu *.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 35 thru_hole circle (at 34 0) (size 1.308 1.308) (drill 0.8) (layers *.Cu *.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 36 thru_hole circle (at 34 -2) (size 1.308 1.308) (drill 0.8) (layers *.Cu *.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 37 thru_hole circle (at 36 0) (size 1.308 1.308) (drill 0.8) (layers *.Cu *.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 38 thru_hole circle (at 36 -2) (size 1.308 1.308) (drill 0.8) (layers *.Cu *.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 39 thru_hole circle (at 38 0) (size 1.308 1.308) (drill 0.8) (layers *.Cu *.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 40 thru_hole circle (at 38 -2) (size 1.308 1.308) (drill 0.8) (layers *.Cu *.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
)
|
|
@ -0,0 +1,17 @@
|
|||
(module B2,54 (layer F.Cu) (tedit 0)
|
||||
(descr "<b>TEST PAD</b>")
|
||||
(fp_text reference 3V3 (at 3.024 2.295 -90) (layer F.SilkS)
|
||||
(effects (font (size 1.425 1.425) (thickness 0.171)) (justify left bottom))
|
||||
)
|
||||
(fp_text value NC (at -1.27 1.397) (layer F.Fab)
|
||||
(effects (font (size 0.02413 0.02413) (thickness 0.00193)) (justify left bottom))
|
||||
)
|
||||
(fp_line (start -0.635 0) (end 0.635 0) (layer Dwgs.User) (width 0.0024))
|
||||
(fp_line (start 0 0.635) (end 0 -0.635) (layer Dwgs.User) (width 0.0024))
|
||||
(fp_circle (center 0 0) (end 0.635 0) (layer Dwgs.User) (width 0.254))
|
||||
(fp_text user >TP_SIGNAL_NAME (at -1.27 3.175) (layer Dwgs.User)
|
||||
(effects (font (size 0.95 0.95) (thickness 0.08)) (justify left bottom))
|
||||
)
|
||||
(pad TP smd roundrect (at 0 0) (size 2.54 2.54) (layers F.Cu F.Mask) (roundrect_rratio 0.5)
|
||||
(solder_mask_margin 0.1016))
|
||||
)
|
|
@ -0,0 +1,22 @@
|
|||
(module C0603 (layer F.Cu) (tedit 0)
|
||||
(descr <b>CAPACITOR</b>)
|
||||
(fp_text reference C42 (at 1.42 0.02 -180) (layer F.SilkS)
|
||||
(effects (font (size 0.95 0.95) (thickness 0.114)) (justify left bottom))
|
||||
)
|
||||
(fp_text value 2.2uf/6.3v/x7r (at -0.635 1.905 -180) (layer F.Fab)
|
||||
(effects (font (size 1.2065 1.2065) (thickness 0.09652)) (justify left bottom))
|
||||
)
|
||||
(fp_line (start -1.473 -0.983) (end 1.473 -0.983) (layer Dwgs.User) (width 0.0508))
|
||||
(fp_line (start 1.473 -0.983) (end 1.473 0.983) (layer Dwgs.User) (width 0.0508))
|
||||
(fp_line (start 1.473 0.983) (end -1.473 0.983) (layer Dwgs.User) (width 0.0508))
|
||||
(fp_line (start -1.473 0.983) (end -1.473 -0.983) (layer Dwgs.User) (width 0.0508))
|
||||
(fp_line (start -0.356 -0.432) (end 0.356 -0.432) (layer F.Fab) (width 0.1016))
|
||||
(fp_line (start -0.356 0.419) (end 0.356 0.419) (layer F.Fab) (width 0.1016))
|
||||
(fp_poly (pts (xy -0.8382 0.4699) (xy -0.3381 0.4699) (xy -0.3381 -0.4801) (xy -0.8382 -0.4801)) (layer F.Fab) (width 0))
|
||||
(fp_poly (pts (xy 0.3302 0.4699) (xy 0.8303 0.4699) (xy 0.8303 -0.4801) (xy 0.3302 -0.4801)) (layer F.Fab) (width 0))
|
||||
(fp_poly (pts (xy -0.1999 0.3) (xy 0.1999 0.3) (xy 0.1999 -0.3) (xy -0.1999 -0.3)) (layer F.Adhes) (width 0))
|
||||
(pad 1 smd rect (at -0.85 0) (size 1.1 1) (layers F.Cu F.Paste F.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 2 smd rect (at 0.85 0) (size 1.1 1) (layers F.Cu F.Paste F.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
)
|
|
@ -0,0 +1,22 @@
|
|||
(module C0805 (layer F.Cu) (tedit 0)
|
||||
(descr <b>CAPACITOR</b><p>)
|
||||
(fp_text reference C17 (at -3.52 2.23 -180) (layer F.SilkS)
|
||||
(effects (font (size 1.2065 1.2065) (thickness 0.09652)) (justify left bottom))
|
||||
)
|
||||
(fp_text value 100n (at -1.27 2.54 -180) (layer F.Fab)
|
||||
(effects (font (size 1.2065 1.2065) (thickness 0.09652)) (justify left bottom))
|
||||
)
|
||||
(fp_line (start -1.973 -0.983) (end 1.973 -0.983) (layer Dwgs.User) (width 0.0508))
|
||||
(fp_line (start 1.973 0.983) (end -1.973 0.983) (layer Dwgs.User) (width 0.0508))
|
||||
(fp_line (start -1.973 0.983) (end -1.973 -0.983) (layer Dwgs.User) (width 0.0508))
|
||||
(fp_line (start -0.381 -0.66) (end 0.381 -0.66) (layer F.Fab) (width 0.1016))
|
||||
(fp_line (start -0.356 0.66) (end 0.381 0.66) (layer F.Fab) (width 0.1016))
|
||||
(fp_line (start 1.973 -0.983) (end 1.973 0.983) (layer Dwgs.User) (width 0.0508))
|
||||
(fp_poly (pts (xy -1.0922 0.7239) (xy -0.3421 0.7239) (xy -0.3421 -0.7262) (xy -1.0922 -0.7262)) (layer F.Fab) (width 0))
|
||||
(fp_poly (pts (xy 0.3556 0.7239) (xy 1.1057 0.7239) (xy 1.1057 -0.7262) (xy 0.3556 -0.7262)) (layer F.Fab) (width 0))
|
||||
(fp_poly (pts (xy -0.1001 0.4001) (xy 0.1001 0.4001) (xy 0.1001 -0.4001) (xy -0.1001 -0.4001)) (layer F.Adhes) (width 0))
|
||||
(pad 1 smd rect (at -0.95 0) (size 1.3 1.5) (layers F.Cu F.Paste F.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 2 smd rect (at 0.95 0) (size 1.3 1.5) (layers F.Cu F.Paste F.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
)
|
|
@ -0,0 +1,22 @@
|
|||
(module C1206 (layer F.Cu) (tedit 0)
|
||||
(descr <b>CAPACITOR</b>)
|
||||
(fp_text reference C26 (at 2.785 0.5) (layer F.SilkS)
|
||||
(effects (font (size 0.95 0.95) (thickness 0.114)) (justify left bottom))
|
||||
)
|
||||
(fp_text value 1206DD106KAT2A (at -1.27 2.54) (layer F.Fab)
|
||||
(effects (font (size 1.2065 1.2065) (thickness 0.09652)) (justify left bottom))
|
||||
)
|
||||
(fp_line (start -2.473 -0.983) (end 2.473 -0.983) (layer Dwgs.User) (width 0.0508))
|
||||
(fp_line (start 2.473 0.983) (end -2.473 0.983) (layer Dwgs.User) (width 0.0508))
|
||||
(fp_line (start -2.473 0.983) (end -2.473 -0.983) (layer Dwgs.User) (width 0.0508))
|
||||
(fp_line (start 2.473 -0.983) (end 2.473 0.983) (layer Dwgs.User) (width 0.0508))
|
||||
(fp_line (start -0.965 -0.787) (end 0.965 -0.787) (layer F.Fab) (width 0.1016))
|
||||
(fp_line (start -0.965 0.787) (end 0.965 0.787) (layer F.Fab) (width 0.1016))
|
||||
(fp_poly (pts (xy -1.7018 0.8509) (xy -0.9517 0.8509) (xy -0.9517 -0.8491) (xy -1.7018 -0.8491)) (layer F.Fab) (width 0))
|
||||
(fp_poly (pts (xy 0.9517 0.8491) (xy 1.7018 0.8491) (xy 1.7018 -0.8509) (xy 0.9517 -0.8509)) (layer F.Fab) (width 0))
|
||||
(fp_poly (pts (xy -0.1999 0.4001) (xy 0.1999 0.4001) (xy 0.1999 -0.4001) (xy -0.1999 -0.4001)) (layer F.Adhes) (width 0))
|
||||
(pad 1 smd rect (at -1.4 0) (size 1.6 1.8) (layers F.Cu F.Paste F.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 2 smd rect (at 1.4 0) (size 1.6 1.8) (layers F.Cu F.Paste F.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
)
|
|
@ -0,0 +1,20 @@
|
|||
(module CRYSTAL-SMD-5X3 (layer F.Cu) (tedit 0)
|
||||
(fp_text reference Y3 (at -4.345 -0.8175 90) (layer F.SilkS)
|
||||
(effects (font (size 0.95 0.95) (thickness 0.114)) (justify left bottom))
|
||||
)
|
||||
(fp_text value 8.00M-CFPX104 (at -2.54 2.54) (layer F.Fab)
|
||||
(effects (font (size 0.38608 0.38608) (thickness 0.030886)) (justify left bottom))
|
||||
)
|
||||
(fp_line (start -0.6 -1.6) (end 0.6 -1.6) (layer F.SilkS) (width 0.2032))
|
||||
(fp_line (start 2.5 -0.3) (end 2.5 0.3) (layer F.SilkS) (width 0.2032))
|
||||
(fp_line (start 0.6 1.6) (end -0.6 1.6) (layer F.SilkS) (width 0.2032))
|
||||
(fp_line (start -2.5 -0.3) (end -2.5 0.3) (layer F.SilkS) (width 0.2032))
|
||||
(pad 1 smd rect (at -1.85 1.15) (size 1.9 1.1) (layers F.Cu F.Paste F.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 3 smd rect (at 1.85 -1.15) (size 1.9 1.1) (layers F.Cu F.Paste F.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 4 smd rect (at -1.85 -1.15) (size 1.9 1.1) (layers F.Cu F.Paste F.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 2 smd rect (at 1.85 1.15) (size 1.9 1.1) (layers F.Cu F.Paste F.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
)
|
29
PCB/kicad/logicBoard/SB_LOGICBOARD_V01.pretty/JP1.kicad_mod
Normal file
29
PCB/kicad/logicBoard/SB_LOGICBOARD_V01.pretty/JP1.kicad_mod
Normal file
|
@ -0,0 +1,29 @@
|
|||
(module JP1 (layer F.Cu) (tedit 0)
|
||||
(descr <b>JUMPER</b>)
|
||||
(fp_text reference JP19 (at -1.651 2.54 90) (layer F.SilkS) hide
|
||||
(effects (font (size 1.2065 1.2065) (thickness 0.127)) (justify left bottom))
|
||||
)
|
||||
(fp_text value "" (at 2.921 2.54 90) (layer F.Fab)
|
||||
(effects (font (size 1.2065 1.2065) (thickness 0.12065)) (justify left bottom))
|
||||
)
|
||||
(fp_line (start -1.016 0) (end -1.27 -0.254) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -1.016 0) (end -1.27 0.254) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 1.016 0) (end 1.27 -0.254) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 1.016 0) (end 1.27 0.254) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 1.27 0.254) (end 1.27 2.286) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 1.016 2.54) (end 1.27 2.286) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 1.27 -2.286) (end 1.016 -2.54) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 1.27 -2.286) (end 1.27 -0.254) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 1.016 -2.54) (end -1.016 -2.54) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -1.27 -2.286) (end -1.016 -2.54) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -1.27 -2.286) (end -1.27 -0.254) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -1.27 0.254) (end -1.27 2.286) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -1.016 2.54) (end -1.27 2.286) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -1.016 2.54) (end 1.016 2.54) (layer F.SilkS) (width 0.1524))
|
||||
(fp_poly (pts (xy -0.3048 -0.9652) (xy 0.3048 -0.9652) (xy 0.3048 -1.5748) (xy -0.3048 -1.5748)) (layer F.Fab) (width 0))
|
||||
(fp_poly (pts (xy -0.3048 1.5748) (xy 0.3048 1.5748) (xy 0.3048 0.9652) (xy -0.3048 0.9652)) (layer F.Fab) (width 0))
|
||||
(pad 1 thru_hole oval (at 0 1.27) (size 2.8448 1.4224) (drill 0.9144) (layers *.Cu *.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 2 thru_hole oval (at 0 -1.27) (size 2.8448 1.4224) (drill 0.9144) (layers *.Cu *.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
)
|
|
@ -0,0 +1,17 @@
|
|||
(module L0805 (layer F.Cu) (tedit 0)
|
||||
(fp_text reference L8 (at -1.905 -1.143) (layer F.SilkS) hide
|
||||
(effects (font (size 0.84455 0.84455) (thickness 0.09779)) (justify left bottom))
|
||||
)
|
||||
(fp_text value LCBB-601 (at -1.905 2.032) (layer F.Fab)
|
||||
(effects (font (size 0.84455 0.84455) (thickness 0.0929)) (justify left bottom))
|
||||
)
|
||||
(fp_line (start 1.651 -0.889) (end 1.651 0.889) (layer F.SilkS) (width 0.127))
|
||||
(fp_line (start 1.651 0.889) (end -1.651 0.889) (layer F.SilkS) (width 0.127))
|
||||
(fp_line (start -1.651 0.889) (end -1.651 -0.889) (layer F.SilkS) (width 0.127))
|
||||
(fp_line (start -1.651 -0.889) (end 1.651 -0.889) (layer F.SilkS) (width 0.127))
|
||||
(fp_poly (pts (xy -1.4605 0.762) (xy 1.4605 0.762) (xy 1.4605 -0.762) (xy -1.4605 -0.762)) (layer Dwgs.User) (width 0))
|
||||
(pad 1 smd roundrect (at -0.889 0) (size 1.016 1.397) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.125)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 2 smd roundrect (at 0.889 0) (size 1.016 1.397) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.125)
|
||||
(solder_mask_margin 0.1016))
|
||||
)
|
|
@ -0,0 +1,22 @@
|
|||
(module LED5MM (layer F.Cu) (tedit 0)
|
||||
(descr "<B>LED</B><p>\n5 mm, round")
|
||||
(fp_text reference WARN (at 3.425 1.2166) (layer F.SilkS)
|
||||
(effects (font (size 2.85 2.85) (thickness 0.342)) (justify left bottom))
|
||||
)
|
||||
(fp_text value "" (at 3.2004 1.8034) (layer F.Fab)
|
||||
(effects (font (size 1.2065 1.2065) (thickness 0.12065)) (justify left bottom))
|
||||
)
|
||||
(fp_line (start 2.54 1.905) (end 2.54 -1.905) (layer F.SilkS) (width 0.2032))
|
||||
(fp_arc (start 0 0) (end 2.54 1.905) (angle 286.260205) (layer F.SilkS) (width 0.254))
|
||||
(fp_arc (start 0 0) (end -1.143 0) (angle 90) (layer F.Fab) (width 0.1524))
|
||||
(fp_arc (start 0 0) (end 0 1.143) (angle -90) (layer F.Fab) (width 0.1524))
|
||||
(fp_arc (start 0 0) (end -1.651 0) (angle 90) (layer F.Fab) (width 0.1524))
|
||||
(fp_arc (start 0 0) (end 0 1.651) (angle -90) (layer F.Fab) (width 0.1524))
|
||||
(fp_arc (start 0 0) (end -2.159 0) (angle 90) (layer F.Fab) (width 0.1524))
|
||||
(fp_arc (start 0 0) (end 0 2.159) (angle -90) (layer F.Fab) (width 0.1524))
|
||||
(fp_circle (center 0 0) (end 2.54 0) (layer F.SilkS) (width 0.1524))
|
||||
(pad A thru_hole circle (at -1.27 0) (size 1.3208 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad K thru_hole circle (at 1.27 0) (size 1.3208 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
)
|
|
@ -0,0 +1,41 @@
|
|||
(module MA03-1 (layer F.Cu) (tedit 0)
|
||||
(descr "<b>PIN HEADER</b>")
|
||||
(fp_text reference SV1 (at -3.81 -1.651) (layer F.SilkS) hide
|
||||
(effects (font (size 1.2065 1.2065) (thickness 0.127)) (justify right top))
|
||||
)
|
||||
(fp_text value "" (at -3.81 2.921 -180) (layer F.Fab)
|
||||
(effects (font (size 1.2065 1.2065) (thickness 0.12065)) (justify left bottom))
|
||||
)
|
||||
(fp_line (start -3.175 -1.27) (end -1.905 -1.27) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -1.905 -1.27) (end -1.27 -0.635) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -1.27 0.635) (end -1.905 1.27) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -1.27 -0.635) (end -0.635 -1.27) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -0.635 -1.27) (end 0.635 -1.27) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 0.635 -1.27) (end 1.27 -0.635) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 1.27 0.635) (end 0.635 1.27) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 0.635 1.27) (end -0.635 1.27) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -0.635 1.27) (end -1.27 0.635) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -3.81 -0.635) (end -3.81 0.635) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -3.175 -1.27) (end -3.81 -0.635) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -3.81 0.635) (end -3.175 1.27) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -1.905 1.27) (end -3.175 1.27) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 1.27 -0.635) (end 1.905 -1.27) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 1.905 -1.27) (end 3.175 -1.27) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 3.175 -1.27) (end 3.81 -0.635) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 3.81 0.635) (end 3.175 1.27) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 3.175 1.27) (end 1.905 1.27) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 1.905 1.27) (end 1.27 0.635) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 3.81 -0.635) (end 3.81 0.635) (layer F.SilkS) (width 0.1524))
|
||||
(fp_text user 1 (at -5.08 0.635) (layer F.SilkS)
|
||||
(effects (font (size 1.2065 1.2065) (thickness 0.127)) (justify left bottom))
|
||||
)
|
||||
(fp_poly (pts (xy -0.254 0.254) (xy 0.254 0.254) (xy 0.254 -0.254) (xy -0.254 -0.254)) (layer F.Fab) (width 0))
|
||||
(fp_poly (pts (xy -2.794 0.254) (xy -2.286 0.254) (xy -2.286 -0.254) (xy -2.794 -0.254)) (layer F.Fab) (width 0))
|
||||
(fp_poly (pts (xy 2.286 0.254) (xy 2.794 0.254) (xy 2.794 -0.254) (xy 2.286 -0.254)) (layer F.Fab) (width 0))
|
||||
(pad 1 thru_hole oval (at -2.54 0 90) (size 3.048 1.524) (drill 1.016) (layers *.Cu *.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 2 thru_hole oval (at 0 0 90) (size 3.048 1.524) (drill 1.016) (layers *.Cu *.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 3 thru_hole oval (at 2.54 0 90) (size 3.048 1.524) (drill 1.016) (layers *.Cu *.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
)
|
|
@ -0,0 +1,22 @@
|
|||
(module R0805 (layer F.Cu) (tedit 0)
|
||||
(descr <b>RESISTOR</b><p>)
|
||||
(fp_text reference R26 (at 1.865 0.73 -180) (layer F.SilkS)
|
||||
(effects (font (size 0.95 0.95) (thickness 0.114)) (justify left bottom))
|
||||
)
|
||||
(fp_text value 22K (at -0.635 2.54 -180) (layer F.Fab)
|
||||
(effects (font (size 1.2065 1.2065) (thickness 0.09652)) (justify left bottom))
|
||||
)
|
||||
(fp_line (start -0.41 -0.635) (end 0.41 -0.635) (layer F.Fab) (width 0.1524))
|
||||
(fp_line (start -0.41 0.635) (end 0.41 0.635) (layer F.Fab) (width 0.1524))
|
||||
(fp_line (start -1.973 -0.983) (end 1.973 -0.983) (layer Dwgs.User) (width 0.0508))
|
||||
(fp_line (start 1.973 -0.983) (end 1.973 0.983) (layer Dwgs.User) (width 0.0508))
|
||||
(fp_line (start 1.973 0.983) (end -1.973 0.983) (layer Dwgs.User) (width 0.0508))
|
||||
(fp_line (start -1.973 0.983) (end -1.973 -0.983) (layer Dwgs.User) (width 0.0508))
|
||||
(fp_poly (pts (xy 0.4064 0.6985) (xy 1.0564 0.6985) (xy 1.0564 -0.7015) (xy 0.4064 -0.7015)) (layer F.Fab) (width 0))
|
||||
(fp_poly (pts (xy -1.0668 0.6985) (xy -0.4168 0.6985) (xy -0.4168 -0.7015) (xy -1.0668 -0.7015)) (layer F.Fab) (width 0))
|
||||
(fp_poly (pts (xy -0.1999 0.5001) (xy 0.1999 0.5001) (xy 0.1999 -0.5001) (xy -0.1999 -0.5001)) (layer F.Adhes) (width 0))
|
||||
(pad 1 smd rect (at -0.95 0) (size 1.3 1.5) (layers F.Cu F.Paste F.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 2 smd rect (at 0.95 0) (size 1.3 1.5) (layers F.Cu F.Paste F.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
)
|
|
@ -0,0 +1,61 @@
|
|||
(module SB-PCB (layer F.Cu) (tedit 0)
|
||||
(fp_text reference U$1 (at 0 0) (layer F.SilkS) hide
|
||||
(effects (font (size 1.27 1.27) (thickness 0.15)))
|
||||
)
|
||||
(fp_text value SB_LOGIC_PCB (at 0 0) (layer F.SilkS) hide
|
||||
(effects (font (size 1.27 1.27) (thickness 0.15)))
|
||||
)
|
||||
(fp_line (start 160 -4) (end 160 -80) (layer Edge.Cuts) (width 0.05))
|
||||
(fp_arc (start 156 -80) (end 160 -80) (angle -90) (layer Edge.Cuts) (width 0.05))
|
||||
(fp_line (start 156 -84) (end 4 -84) (layer Edge.Cuts) (width 0.05))
|
||||
(fp_arc (start 4 -80) (end 4 -84) (angle -90) (layer Edge.Cuts) (width 0.05))
|
||||
(fp_line (start 0 -80) (end 0 -4) (layer Edge.Cuts) (width 0.05))
|
||||
(fp_arc (start 4 -4) (end 0 -4) (angle -90) (layer Edge.Cuts) (width 0.05))
|
||||
(fp_line (start 4 0) (end 156 0) (layer Edge.Cuts) (width 0.05))
|
||||
(fp_arc (start 156 -4) (end 156 0) (angle -90) (layer Edge.Cuts) (width 0.05))
|
||||
(fp_circle (center 144 -23.5) (end 146.5 -23.5) (layer F.Fab) (width 0.127))
|
||||
(fp_circle (center 144 -38.5) (end 146.5 -38.5) (layer F.Fab) (width 0.127))
|
||||
(fp_circle (center 144 -53.5) (end 146.5 -53.5) (layer F.Fab) (width 0.127))
|
||||
(fp_text user LED (at 148 -53) (layer F.Fab)
|
||||
(effects (font (size 1.2065 1.2065) (thickness 0.1016)) (justify left bottom))
|
||||
)
|
||||
(fp_text user LED (at 148 -38) (layer F.Fab)
|
||||
(effects (font (size 1.2065 1.2065) (thickness 0.1016)) (justify left bottom))
|
||||
)
|
||||
(fp_text user LED (at 148 -23) (layer F.Fab)
|
||||
(effects (font (size 1.2065 1.2065) (thickness 0.1016)) (justify left bottom))
|
||||
)
|
||||
(fp_text user LCD (at 113 -71) (layer F.Fab)
|
||||
(effects (font (size 1.2065 1.2065) (thickness 0.1016)) (justify left bottom))
|
||||
)
|
||||
(fp_text user LCD (at 113 -25) (layer F.Fab)
|
||||
(effects (font (size 1.2065 1.2065) (thickness 0.1016)) (justify left bottom))
|
||||
)
|
||||
(fp_text user LCD (at 51 -25) (layer F.Fab)
|
||||
(effects (font (size 1.2065 1.2065) (thickness 0.1016)) (justify left bottom))
|
||||
)
|
||||
(fp_text user LCD (at 51 -71) (layer F.Fab)
|
||||
(effects (font (size 1.2065 1.2065) (thickness 0.1016)) (justify left bottom))
|
||||
)
|
||||
(fp_text user MOUNT (at 21 -7) (layer F.Fab)
|
||||
(effects (font (size 1.2065 1.2065) (thickness 0.1016)) (justify left bottom))
|
||||
)
|
||||
(fp_text user MOUNT (at 121 -7) (layer F.Fab)
|
||||
(effects (font (size 1.2065 1.2065) (thickness 0.1016)) (justify left bottom))
|
||||
)
|
||||
(fp_text user MOUNT (at 71 -63) (layer F.Fab)
|
||||
(effects (font (size 1.2065 1.2065) (thickness 0.1016)) (justify left bottom))
|
||||
)
|
||||
(fp_circle (center 5 -16) (end 5.5 -16) (layer F.Fab) (width 0.127))
|
||||
(fp_circle (center 3.5 -50.75) (end 4 -50.75) (layer F.Fab) (width 0.127))
|
||||
(fp_circle (center 71 -71) (end 71.5 -71) (layer F.Fab) (width 0.127))
|
||||
(fp_circle (center 43.5 -6) (end 44 -6) (layer F.Fab) (width 0.127))
|
||||
(pad "" np_thru_hole circle (at 30 -8) (size 4.2 4.2) (drill 4.2) (layers *.Cu *.Mask))
|
||||
(pad "" np_thru_hole circle (at 95 -8) (size 4.2 4.2) (drill 4.2) (layers *.Cu *.Mask))
|
||||
(pad "" np_thru_hole circle (at 130 -8) (size 4.2 4.2) (drill 4.2) (layers *.Cu *.Mask))
|
||||
(pad "" np_thru_hole circle (at 110 -26) (size 4.2 4.2) (drill 4.2) (layers *.Cu *.Mask))
|
||||
(pad "" np_thru_hole circle (at 110 -72) (size 4.2 4.2) (drill 4.2) (layers *.Cu *.Mask))
|
||||
(pad "" np_thru_hole circle (at 48 -26) (size 4.2 4.2) (drill 4.2) (layers *.Cu *.Mask))
|
||||
(pad "" np_thru_hole circle (at 48 -72) (size 4.2 4.2) (drill 4.2) (layers *.Cu *.Mask))
|
||||
(pad "" np_thru_hole circle (at 80 -63.5) (size 4.2 4.2) (drill 4.2) (layers *.Cu *.Mask))
|
||||
)
|
|
@ -0,0 +1,22 @@
|
|||
(module SML0805 (layer F.Cu) (tedit 0)
|
||||
(descr "<b>SML0805-2CW-TR (0805 PROFILE)</b> COOL WHITE<p>\nSource: http://www.ledtronics.com/ds/smd-0603/Dstr0093.pdf")
|
||||
(fp_text reference HB (at -1.25 2.5 -180) (layer F.SilkS)
|
||||
(effects (font (size 1.425 1.425) (thickness 0.171)) (justify left bottom))
|
||||
)
|
||||
(fp_text value OSR50805C1E (at -1.5 2 -180) (layer F.Fab)
|
||||
(effects (font (size 1.2065 1.2065) (thickness 0.09652)) (justify left bottom))
|
||||
)
|
||||
(fp_line (start -0.95 0.55) (end 0.95 0.55) (layer F.Fab) (width 0.1016))
|
||||
(fp_line (start 0.95 0.55) (end 0.95 -0.55) (layer F.Fab) (width 0.1016))
|
||||
(fp_line (start 0.95 -0.55) (end -0.95 -0.55) (layer F.Fab) (width 0.1016))
|
||||
(fp_line (start -0.95 -0.55) (end -0.95 0.55) (layer F.Fab) (width 0.1016))
|
||||
(fp_line (start -0.175 0.025) (end 0 -0.15) (layer F.SilkS) (width 0.0634))
|
||||
(fp_line (start 0 -0.15) (end 0.15 0) (layer F.SilkS) (width 0.0634))
|
||||
(fp_line (start 0.15 0) (end -0.025 0.175) (layer F.SilkS) (width 0.0634))
|
||||
(fp_line (start -0.025 0.175) (end -0.175 0.025) (layer F.SilkS) (width 0.0634))
|
||||
(fp_circle (center -0.275 -0.4) (end -0.2125 -0.4) (layer F.SilkS) (width 0.125))
|
||||
(pad C smd rect (at -1.05 0) (size 1.2 1.2) (layers F.Cu F.Paste F.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad A smd rect (at 1.05 0) (size 1.2 1.2) (layers F.Cu F.Paste F.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
)
|
40
PCB/kicad/logicBoard/SB_LOGICBOARD_V01.pretty/SO08.kicad_mod
Normal file
40
PCB/kicad/logicBoard/SB_LOGICBOARD_V01.pretty/SO08.kicad_mod
Normal file
|
@ -0,0 +1,40 @@
|
|||
(module SO08 (layer F.Cu) (tedit 0)
|
||||
(descr "<b>Small Outline Package 8</b><br>\nNS Package M08A")
|
||||
(fp_text reference IC4 (at 2.345 0.083) (layer F.SilkS)
|
||||
(effects (font (size 0.95 0.95) (thickness 0.114)) (justify left bottom))
|
||||
)
|
||||
(fp_text value LM358D (at 3.937 1.905 90) (layer F.Fab)
|
||||
(effects (font (size 1.2065 1.2065) (thickness 0.09652)) (justify left bottom))
|
||||
)
|
||||
(fp_line (start 2.4 -1.9) (end 2.4 1.4) (layer F.Fab) (width 0.2032))
|
||||
(fp_line (start 2.4 1.4) (end 2.4 1.9) (layer F.Fab) (width 0.2032))
|
||||
(fp_line (start 2.4 1.9) (end -2.4 1.9) (layer F.Fab) (width 0.2032))
|
||||
(fp_line (start -2.4 1.9) (end -2.4 1.4) (layer F.Fab) (width 0.2032))
|
||||
(fp_line (start -2.4 1.4) (end -2.4 -1.9) (layer F.Fab) (width 0.2032))
|
||||
(fp_line (start -2.4 -1.9) (end 2.4 -1.9) (layer F.Fab) (width 0.2032))
|
||||
(fp_line (start 2.4 1.4) (end -2.4 1.4) (layer F.Fab) (width 0.2032))
|
||||
(fp_poly (pts (xy -2.15 3.1) (xy -1.66 3.1) (xy -1.66 2) (xy -2.15 2)) (layer F.Fab) (width 0))
|
||||
(fp_poly (pts (xy -0.88 3.1) (xy -0.39 3.1) (xy -0.39 2) (xy -0.88 2)) (layer F.Fab) (width 0))
|
||||
(fp_poly (pts (xy 0.39 3.1) (xy 0.88 3.1) (xy 0.88 2) (xy 0.39 2)) (layer F.Fab) (width 0))
|
||||
(fp_poly (pts (xy 1.66 3.1) (xy 2.15 3.1) (xy 2.15 2) (xy 1.66 2)) (layer F.Fab) (width 0))
|
||||
(fp_poly (pts (xy 1.66 -2) (xy 2.15 -2) (xy 2.15 -3.1) (xy 1.66 -3.1)) (layer F.Fab) (width 0))
|
||||
(fp_poly (pts (xy 0.39 -2) (xy 0.88 -2) (xy 0.88 -3.1) (xy 0.39 -3.1)) (layer F.Fab) (width 0))
|
||||
(fp_poly (pts (xy -0.88 -2) (xy -0.39 -2) (xy -0.39 -3.1) (xy -0.88 -3.1)) (layer F.Fab) (width 0))
|
||||
(fp_poly (pts (xy -2.15 -2) (xy -1.66 -2) (xy -1.66 -3.1) (xy -2.15 -3.1)) (layer F.Fab) (width 0))
|
||||
(pad 2 smd rect (at -0.635 2.6) (size 0.6 2.2) (layers F.Cu F.Paste F.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 7 smd rect (at -0.635 -2.6) (size 0.6 2.2) (layers F.Cu F.Paste F.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 1 smd rect (at -1.905 2.6) (size 0.6 2.2) (layers F.Cu F.Paste F.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 3 smd rect (at 0.635 2.6) (size 0.6 2.2) (layers F.Cu F.Paste F.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 4 smd rect (at 1.905 2.6) (size 0.6 2.2) (layers F.Cu F.Paste F.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 8 smd rect (at -1.905 -2.6) (size 0.6 2.2) (layers F.Cu F.Paste F.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 6 smd rect (at 0.635 -2.6) (size 0.6 2.2) (layers F.Cu F.Paste F.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 5 smd rect (at 1.905 -2.6) (size 0.6 2.2) (layers F.Cu F.Paste F.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
)
|
101
PCB/kicad/logicBoard/SB_LOGICBOARD_V01.pretty/SO20W.kicad_mod
Normal file
101
PCB/kicad/logicBoard/SB_LOGICBOARD_V01.pretty/SO20W.kicad_mod
Normal file
|
@ -0,0 +1,101 @@
|
|||
(module SO20W (layer F.Cu) (tedit 0)
|
||||
(descr "<b>Wide Small Outline package</b> 300 mil")
|
||||
(fp_text reference IC6 (at -6.858 3.175 -90) (layer F.SilkS)
|
||||
(effects (font (size 0.95 0.95) (thickness 0.114)) (justify left bottom))
|
||||
)
|
||||
(fp_text value "74HCT244DW OR 74VHCT541A" (at -3.81 1.778) (layer F.Fab)
|
||||
(effects (font (size 1.2065 1.2065) (thickness 0.12065)) (justify left bottom))
|
||||
)
|
||||
(fp_line (start 6.1214 -3.7338) (end -6.1214 -3.7338) (layer F.Fab) (width 0.1524))
|
||||
(fp_arc (start 6.1214 3.3528) (end 6.1214 3.7338) (angle -90) (layer F.SilkS) (width 0.1524))
|
||||
(fp_arc (start -6.1214 -3.3528) (end -6.5024 -3.3528) (angle 90) (layer F.SilkS) (width 0.1524))
|
||||
(fp_arc (start 6.1214 -3.3528) (end 6.1214 -3.7338) (angle 90) (layer F.SilkS) (width 0.1524))
|
||||
(fp_arc (start -6.1214 3.3528) (end -6.5024 3.3528) (angle -90) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -6.1214 3.7338) (end 6.1214 3.7338) (layer F.Fab) (width 0.1524))
|
||||
(fp_line (start 6.5024 3.3528) (end 6.5024 -3.3528) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -6.5024 -3.3528) (end -6.5024 -1.27) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -6.5024 -1.27) (end -6.5024 1.27) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -6.5024 1.27) (end -6.5024 3.3528) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -6.477 3.3782) (end 6.477 3.3782) (layer F.SilkS) (width 0.0508))
|
||||
(fp_arc (start -6.5024 0) (end -6.5024 -1.27) (angle 180) (layer F.SilkS) (width 0.1524))
|
||||
(fp_poly (pts (xy -5.969 3.8608) (xy -5.461 3.8608) (xy -5.461 3.7338) (xy -5.969 3.7338)) (layer F.Fab) (width 0))
|
||||
(fp_poly (pts (xy -5.969 5.334) (xy -5.461 5.334) (xy -5.461 3.8608) (xy -5.969 3.8608)) (layer F.Fab) (width 0))
|
||||
(fp_poly (pts (xy -4.699 3.8608) (xy -4.191 3.8608) (xy -4.191 3.7338) (xy -4.699 3.7338)) (layer F.Fab) (width 0))
|
||||
(fp_poly (pts (xy -4.699 5.334) (xy -4.191 5.334) (xy -4.191 3.8608) (xy -4.699 3.8608)) (layer F.Fab) (width 0))
|
||||
(fp_poly (pts (xy -3.429 3.8608) (xy -2.921 3.8608) (xy -2.921 3.7338) (xy -3.429 3.7338)) (layer F.Fab) (width 0))
|
||||
(fp_poly (pts (xy -3.429 5.334) (xy -2.921 5.334) (xy -2.921 3.8608) (xy -3.429 3.8608)) (layer F.Fab) (width 0))
|
||||
(fp_poly (pts (xy -2.159 3.8608) (xy -1.651 3.8608) (xy -1.651 3.7338) (xy -2.159 3.7338)) (layer F.Fab) (width 0))
|
||||
(fp_poly (pts (xy -2.159 5.334) (xy -1.651 5.334) (xy -1.651 3.8608) (xy -2.159 3.8608)) (layer F.Fab) (width 0))
|
||||
(fp_poly (pts (xy -0.889 5.334) (xy -0.381 5.334) (xy -0.381 3.8608) (xy -0.889 3.8608)) (layer F.Fab) (width 0))
|
||||
(fp_poly (pts (xy -0.889 3.8608) (xy -0.381 3.8608) (xy -0.381 3.7338) (xy -0.889 3.7338)) (layer F.Fab) (width 0))
|
||||
(fp_poly (pts (xy 0.381 3.8608) (xy 0.889 3.8608) (xy 0.889 3.7338) (xy 0.381 3.7338)) (layer F.Fab) (width 0))
|
||||
(fp_poly (pts (xy 0.381 5.334) (xy 0.889 5.334) (xy 0.889 3.8608) (xy 0.381 3.8608)) (layer F.Fab) (width 0))
|
||||
(fp_poly (pts (xy 1.651 3.8608) (xy 2.159 3.8608) (xy 2.159 3.7338) (xy 1.651 3.7338)) (layer F.Fab) (width 0))
|
||||
(fp_poly (pts (xy 1.651 5.334) (xy 2.159 5.334) (xy 2.159 3.8608) (xy 1.651 3.8608)) (layer F.Fab) (width 0))
|
||||
(fp_poly (pts (xy 2.921 3.8608) (xy 3.429 3.8608) (xy 3.429 3.7338) (xy 2.921 3.7338)) (layer F.Fab) (width 0))
|
||||
(fp_poly (pts (xy 2.921 5.334) (xy 3.429 5.334) (xy 3.429 3.8608) (xy 2.921 3.8608)) (layer F.Fab) (width 0))
|
||||
(fp_poly (pts (xy -5.969 -3.8608) (xy -5.461 -3.8608) (xy -5.461 -5.334) (xy -5.969 -5.334)) (layer F.Fab) (width 0))
|
||||
(fp_poly (pts (xy -5.969 -3.7338) (xy -5.461 -3.7338) (xy -5.461 -3.8608) (xy -5.969 -3.8608)) (layer F.Fab) (width 0))
|
||||
(fp_poly (pts (xy -4.699 -3.7338) (xy -4.191 -3.7338) (xy -4.191 -3.8608) (xy -4.699 -3.8608)) (layer F.Fab) (width 0))
|
||||
(fp_poly (pts (xy -4.699 -3.8608) (xy -4.191 -3.8608) (xy -4.191 -5.334) (xy -4.699 -5.334)) (layer F.Fab) (width 0))
|
||||
(fp_poly (pts (xy -3.429 -3.7338) (xy -2.921 -3.7338) (xy -2.921 -3.8608) (xy -3.429 -3.8608)) (layer F.Fab) (width 0))
|
||||
(fp_poly (pts (xy -3.429 -3.8608) (xy -2.921 -3.8608) (xy -2.921 -5.334) (xy -3.429 -5.334)) (layer F.Fab) (width 0))
|
||||
(fp_poly (pts (xy -2.159 -3.7338) (xy -1.651 -3.7338) (xy -1.651 -3.8608) (xy -2.159 -3.8608)) (layer F.Fab) (width 0))
|
||||
(fp_poly (pts (xy -2.159 -3.8608) (xy -1.651 -3.8608) (xy -1.651 -5.334) (xy -2.159 -5.334)) (layer F.Fab) (width 0))
|
||||
(fp_poly (pts (xy -0.889 -3.7338) (xy -0.381 -3.7338) (xy -0.381 -3.8608) (xy -0.889 -3.8608)) (layer F.Fab) (width 0))
|
||||
(fp_poly (pts (xy -0.889 -3.8608) (xy -0.381 -3.8608) (xy -0.381 -5.334) (xy -0.889 -5.334)) (layer F.Fab) (width 0))
|
||||
(fp_poly (pts (xy 0.381 -3.7338) (xy 0.889 -3.7338) (xy 0.889 -3.8608) (xy 0.381 -3.8608)) (layer F.Fab) (width 0))
|
||||
(fp_poly (pts (xy 0.381 -3.8608) (xy 0.889 -3.8608) (xy 0.889 -5.334) (xy 0.381 -5.334)) (layer F.Fab) (width 0))
|
||||
(fp_poly (pts (xy 1.651 -3.7338) (xy 2.159 -3.7338) (xy 2.159 -3.8608) (xy 1.651 -3.8608)) (layer F.Fab) (width 0))
|
||||
(fp_poly (pts (xy 1.651 -3.8608) (xy 2.159 -3.8608) (xy 2.159 -5.334) (xy 1.651 -5.334)) (layer F.Fab) (width 0))
|
||||
(fp_poly (pts (xy 2.921 -3.7338) (xy 3.429 -3.7338) (xy 3.429 -3.8608) (xy 2.921 -3.8608)) (layer F.Fab) (width 0))
|
||||
(fp_poly (pts (xy 2.921 -3.8608) (xy 3.429 -3.8608) (xy 3.429 -5.334) (xy 2.921 -5.334)) (layer F.Fab) (width 0))
|
||||
(fp_poly (pts (xy 4.191 -3.7338) (xy 4.699 -3.7338) (xy 4.699 -3.8608) (xy 4.191 -3.8608)) (layer F.Fab) (width 0))
|
||||
(fp_poly (pts (xy 5.461 -3.7338) (xy 5.969 -3.7338) (xy 5.969 -3.8608) (xy 5.461 -3.8608)) (layer F.Fab) (width 0))
|
||||
(fp_poly (pts (xy 4.191 -3.8608) (xy 4.699 -3.8608) (xy 4.699 -5.334) (xy 4.191 -5.334)) (layer F.Fab) (width 0))
|
||||
(fp_poly (pts (xy 5.461 -3.8608) (xy 5.969 -3.8608) (xy 5.969 -5.334) (xy 5.461 -5.334)) (layer F.Fab) (width 0))
|
||||
(fp_poly (pts (xy 4.191 3.8608) (xy 4.699 3.8608) (xy 4.699 3.7338) (xy 4.191 3.7338)) (layer F.Fab) (width 0))
|
||||
(fp_poly (pts (xy 5.461 3.8608) (xy 5.969 3.8608) (xy 5.969 3.7338) (xy 5.461 3.7338)) (layer F.Fab) (width 0))
|
||||
(fp_poly (pts (xy 4.191 5.334) (xy 4.699 5.334) (xy 4.699 3.8608) (xy 4.191 3.8608)) (layer F.Fab) (width 0))
|
||||
(fp_poly (pts (xy 5.461 5.334) (xy 5.969 5.334) (xy 5.969 3.8608) (xy 5.461 3.8608)) (layer F.Fab) (width 0))
|
||||
(pad 1 smd rect (at -5.715 5.0292) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 2 smd rect (at -4.445 5.0292) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 3 smd rect (at -3.175 5.0292) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 4 smd rect (at -1.905 5.0292) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 5 smd rect (at -0.635 5.0292) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 6 smd rect (at 0.635 5.0292) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 7 smd rect (at 1.905 5.0292) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 8 smd rect (at 3.175 5.0292) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 13 smd rect (at 3.175 -5.0292) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 14 smd rect (at 1.905 -5.0292) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 15 smd rect (at 0.635 -5.0292) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 16 smd rect (at -0.635 -5.0292) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 17 smd rect (at -1.905 -5.0292) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 18 smd rect (at -3.175 -5.0292) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 19 smd rect (at -4.445 -5.0292) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 20 smd rect (at -5.715 -5.0292) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 9 smd rect (at 4.445 5.0292) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 10 smd rect (at 5.715 5.0292) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 12 smd rect (at 4.445 -5.0292) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 11 smd rect (at 5.715 -5.0292) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
)
|
|
@ -0,0 +1,41 @@
|
|||
(module SOT223 (layer F.Cu) (tedit 0)
|
||||
(descr "<b>Small Outline Transistor</b>")
|
||||
(fp_text reference IC1 (at -2.54 -0.0508) (layer F.SilkS) hide
|
||||
(effects (font (size 1.2065 1.2065) (thickness 0.1016)) (justify left bottom))
|
||||
)
|
||||
(fp_text value MCP1826S-3302ED (at -2.54 1.3208) (layer F.Fab)
|
||||
(effects (font (size 1.2065 1.2065) (thickness 0.09652)) (justify left bottom))
|
||||
)
|
||||
(fp_line (start 3.2766 -1.778) (end 3.2766 1.778) (layer F.SilkS) (width 0.2032))
|
||||
(fp_line (start 3.2766 1.778) (end -3.2766 1.778) (layer F.SilkS) (width 0.2032))
|
||||
(fp_line (start -3.2766 1.778) (end -3.2766 -1.778) (layer F.SilkS) (width 0.2032))
|
||||
(fp_line (start -3.2766 -1.778) (end 3.2766 -1.778) (layer F.SilkS) (width 0.2032))
|
||||
(fp_text user 3 (at 1.0208 4.318) (layer F.SilkS)
|
||||
(effects (font (size 0.77216 0.77216) (thickness 0.097536)) (justify left bottom))
|
||||
)
|
||||
(fp_text user 4 (at 1.905 -2.54) (layer F.SilkS)
|
||||
(effects (font (size 0.77216 0.77216) (thickness 0.097536)) (justify left bottom))
|
||||
)
|
||||
(fp_text user 1 (at -3.4526 4.318) (layer F.SilkS)
|
||||
(effects (font (size 0.77216 0.77216) (thickness 0.097536)) (justify left bottom))
|
||||
)
|
||||
(fp_text user 2 (at -1.2906 4.3274) (layer F.SilkS)
|
||||
(effects (font (size 0.77216 0.77216) (thickness 0.097536)) (justify left bottom))
|
||||
)
|
||||
(fp_poly (pts (xy -1.6002 -1.8034) (xy 1.6002 -1.8034) (xy 1.6002 -3.6576) (xy -1.6002 -3.6576)) (layer F.Fab) (width 0))
|
||||
(fp_poly (pts (xy -0.4318 3.6576) (xy 0.4318 3.6576) (xy 0.4318 1.8034) (xy -0.4318 1.8034)) (layer F.Fab) (width 0))
|
||||
(fp_poly (pts (xy -2.7432 3.6576) (xy -1.8796 3.6576) (xy -1.8796 1.8034) (xy -2.7432 1.8034)) (layer F.Fab) (width 0))
|
||||
(fp_poly (pts (xy 1.8796 3.6576) (xy 2.7432 3.6576) (xy 2.7432 1.8034) (xy 1.8796 1.8034)) (layer F.Fab) (width 0))
|
||||
(fp_poly (pts (xy -1.6002 -1.8034) (xy 1.6002 -1.8034) (xy 1.6002 -3.6576) (xy -1.6002 -3.6576)) (layer F.Fab) (width 0))
|
||||
(fp_poly (pts (xy -0.4318 3.6576) (xy 0.4318 3.6576) (xy 0.4318 1.8034) (xy -0.4318 1.8034)) (layer F.Fab) (width 0))
|
||||
(fp_poly (pts (xy -2.7432 3.6576) (xy -1.8796 3.6576) (xy -1.8796 1.8034) (xy -2.7432 1.8034)) (layer F.Fab) (width 0))
|
||||
(fp_poly (pts (xy 1.8796 3.6576) (xy 2.7432 3.6576) (xy 2.7432 1.8034) (xy 1.8796 1.8034)) (layer F.Fab) (width 0))
|
||||
(pad 1 smd rect (at -2.3114 3.0988) (size 1.2192 2.2352) (layers F.Cu F.Paste F.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 2 smd rect (at 0 3.0988) (size 1.2192 2.2352) (layers F.Cu F.Paste F.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 3 smd rect (at 2.3114 3.0988) (size 1.2192 2.2352) (layers F.Cu F.Paste F.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 4 smd rect (at 0 -3.099) (size 3.6 2.2) (layers F.Cu F.Paste F.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
)
|
148
PCB/kicad/logicBoard/SB_LOGICBOARD_V01.pretty/TQFP64.kicad_mod
Normal file
148
PCB/kicad/logicBoard/SB_LOGICBOARD_V01.pretty/TQFP64.kicad_mod
Normal file
|
@ -0,0 +1,148 @@
|
|||
(module TQFP64 (layer F.Cu) (tedit 0)
|
||||
(descr "64-Lead TQFP Plastic Thin Quad Flatpack - 10x10x1mm Body, 2mmFP")
|
||||
(fp_text reference U$5 (at -2.75 -0.75) (layer F.SilkS)
|
||||
(effects (font (size 0.95 0.95) (thickness 0.114)) (justify left bottom))
|
||||
)
|
||||
(fp_text value STM32F405RG (at -3 3) (layer F.Fab)
|
||||
(effects (font (size 0.38608 0.38608) (thickness 0.030886)) (justify left bottom))
|
||||
)
|
||||
(fp_line (start 5 -5) (end 5 5) (layer F.Fab) (width 0.2032))
|
||||
(fp_line (start 5 5) (end -5 5) (layer F.Fab) (width 0.2032))
|
||||
(fp_line (start -5 5) (end -5 -5) (layer F.Fab) (width 0.2032))
|
||||
(fp_line (start -5 -5) (end 5 -5) (layer F.Fab) (width 0.2032))
|
||||
(fp_line (start -5.1 -4.1) (end -5.1 -5.1) (layer F.SilkS) (width 0.2032))
|
||||
(fp_line (start -5.1 -5.1) (end -4.1 -5.1) (layer F.SilkS) (width 0.2032))
|
||||
(fp_line (start 4.1 -5.1) (end 5.1 -5.1) (layer F.SilkS) (width 0.2032))
|
||||
(fp_line (start 5.1 -5.1) (end 5.1 -4.1) (layer F.SilkS) (width 0.2032))
|
||||
(fp_line (start -5.1 4.1) (end -4.1 5.1) (layer F.SilkS) (width 0.2032))
|
||||
(fp_line (start 4.1 5.1) (end 5.1 5.1) (layer F.SilkS) (width 0.2032))
|
||||
(fp_line (start 5.1 5.1) (end 5.1 4.1) (layer F.SilkS) (width 0.2032))
|
||||
(pad 8 smd rect (at -0.25 5.75) (size 0.22 1) (layers F.Cu F.Paste F.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 9 smd rect (at 0.25 5.75) (size 0.22 1) (layers F.Cu F.Paste F.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 6 smd rect (at -1.25 5.75) (size 0.22 1) (layers F.Cu F.Paste F.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 4 smd rect (at -2.25 5.75) (size 0.22 1) (layers F.Cu F.Paste F.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 2 smd rect (at -3.25 5.75) (size 0.22 1) (layers F.Cu F.Paste F.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 7 smd rect (at -0.75 5.75) (size 0.22 1) (layers F.Cu F.Paste F.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 5 smd rect (at -1.75 5.75) (size 0.22 1) (layers F.Cu F.Paste F.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 3 smd rect (at -2.75 5.75) (size 0.22 1) (layers F.Cu F.Paste F.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 1 smd rect (at -3.75 5.75) (size 0.22 1) (layers F.Cu F.Paste F.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 11 smd rect (at 1.25 5.75) (size 0.22 1) (layers F.Cu F.Paste F.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 13 smd rect (at 2.25 5.75) (size 0.22 1) (layers F.Cu F.Paste F.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 15 smd rect (at 3.25 5.75) (size 0.22 1) (layers F.Cu F.Paste F.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 16 smd rect (at 3.75 5.75) (size 0.22 1) (layers F.Cu F.Paste F.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 14 smd rect (at 2.75 5.75) (size 0.22 1) (layers F.Cu F.Paste F.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 12 smd rect (at 1.75 5.75) (size 0.22 1) (layers F.Cu F.Paste F.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 10 smd rect (at 0.75 5.75) (size 0.22 1) (layers F.Cu F.Paste F.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 24 smd rect (at 5.75 0.25 90) (size 0.22 1) (layers F.Cu F.Paste F.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 25 smd rect (at 5.75 -0.25 90) (size 0.22 1) (layers F.Cu F.Paste F.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 22 smd rect (at 5.75 1.25 90) (size 0.22 1) (layers F.Cu F.Paste F.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 20 smd rect (at 5.75 2.25 90) (size 0.22 1) (layers F.Cu F.Paste F.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 18 smd rect (at 5.75 3.25 90) (size 0.22 1) (layers F.Cu F.Paste F.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 23 smd rect (at 5.75 0.75 90) (size 0.22 1) (layers F.Cu F.Paste F.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 21 smd rect (at 5.75 1.75 90) (size 0.22 1) (layers F.Cu F.Paste F.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 19 smd rect (at 5.75 2.75 90) (size 0.22 1) (layers F.Cu F.Paste F.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 17 smd rect (at 5.75 3.75 90) (size 0.22 1) (layers F.Cu F.Paste F.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 27 smd rect (at 5.75 -1.25 90) (size 0.22 1) (layers F.Cu F.Paste F.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 29 smd rect (at 5.75 -2.25 90) (size 0.22 1) (layers F.Cu F.Paste F.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 31 smd rect (at 5.75 -3.25 90) (size 0.22 1) (layers F.Cu F.Paste F.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 32 smd rect (at 5.75 -3.75 90) (size 0.22 1) (layers F.Cu F.Paste F.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 30 smd rect (at 5.75 -2.75 90) (size 0.22 1) (layers F.Cu F.Paste F.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 28 smd rect (at 5.75 -1.75 90) (size 0.22 1) (layers F.Cu F.Paste F.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 26 smd rect (at 5.75 -0.75 90) (size 0.22 1) (layers F.Cu F.Paste F.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 40 smd rect (at 0.25 -5.75 180) (size 0.22 1) (layers F.Cu F.Paste F.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 41 smd rect (at -0.25 -5.75 180) (size 0.22 1) (layers F.Cu F.Paste F.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 38 smd rect (at 1.25 -5.75 180) (size 0.22 1) (layers F.Cu F.Paste F.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 36 smd rect (at 2.25 -5.75 180) (size 0.22 1) (layers F.Cu F.Paste F.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 34 smd rect (at 3.25 -5.75 180) (size 0.22 1) (layers F.Cu F.Paste F.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 39 smd rect (at 0.75 -5.75 180) (size 0.22 1) (layers F.Cu F.Paste F.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 37 smd rect (at 1.75 -5.75 180) (size 0.22 1) (layers F.Cu F.Paste F.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 35 smd rect (at 2.75 -5.75 180) (size 0.22 1) (layers F.Cu F.Paste F.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 33 smd rect (at 3.75 -5.75 180) (size 0.22 1) (layers F.Cu F.Paste F.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 43 smd rect (at -1.25 -5.75 180) (size 0.22 1) (layers F.Cu F.Paste F.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 45 smd rect (at -2.25 -5.75 180) (size 0.22 1) (layers F.Cu F.Paste F.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 47 smd rect (at -3.25 -5.75 180) (size 0.22 1) (layers F.Cu F.Paste F.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 48 smd rect (at -3.75 -5.75 180) (size 0.22 1) (layers F.Cu F.Paste F.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 46 smd rect (at -2.75 -5.75 180) (size 0.22 1) (layers F.Cu F.Paste F.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 44 smd rect (at -1.75 -5.75 180) (size 0.22 1) (layers F.Cu F.Paste F.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 42 smd rect (at -0.75 -5.75 180) (size 0.22 1) (layers F.Cu F.Paste F.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 56 smd rect (at -5.75 -0.25 270) (size 0.22 1) (layers F.Cu F.Paste F.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 57 smd rect (at -5.75 0.25 270) (size 0.22 1) (layers F.Cu F.Paste F.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 54 smd rect (at -5.75 -1.25 270) (size 0.22 1) (layers F.Cu F.Paste F.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 52 smd rect (at -5.75 -2.25 270) (size 0.22 1) (layers F.Cu F.Paste F.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 50 smd rect (at -5.75 -3.25 270) (size 0.22 1) (layers F.Cu F.Paste F.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 55 smd rect (at -5.75 -0.75 270) (size 0.22 1) (layers F.Cu F.Paste F.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 53 smd rect (at -5.75 -1.75 270) (size 0.22 1) (layers F.Cu F.Paste F.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 51 smd rect (at -5.75 -2.75 270) (size 0.22 1) (layers F.Cu F.Paste F.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 49 smd rect (at -5.75 -3.75 270) (size 0.22 1) (layers F.Cu F.Paste F.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 59 smd rect (at -5.75 1.25 270) (size 0.22 1) (layers F.Cu F.Paste F.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 61 smd rect (at -5.75 2.25 270) (size 0.22 1) (layers F.Cu F.Paste F.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 63 smd rect (at -5.75 3.25 270) (size 0.22 1) (layers F.Cu F.Paste F.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 64 smd rect (at -5.75 3.75 270) (size 0.22 1) (layers F.Cu F.Paste F.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 62 smd rect (at -5.75 2.75 270) (size 0.22 1) (layers F.Cu F.Paste F.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 60 smd rect (at -5.75 1.75 270) (size 0.22 1) (layers F.Cu F.Paste F.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 58 smd rect (at -5.75 0.75 270) (size 0.22 1) (layers F.Cu F.Paste F.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
)
|
|
@ -0,0 +1,59 @@
|
|||
(module W237-4 (layer F.Cu) (tedit 0)
|
||||
(descr "<b>WAGO SCREW CLAMP</b>")
|
||||
(fp_text reference X1 (at -8.7446 7.4422) (layer F.SilkS) hide
|
||||
(effects (font (size 1.2065 1.2065) (thickness 0.127)) (justify left bottom))
|
||||
)
|
||||
(fp_text value "" (at -7.6524 5.0292) (layer F.Fab)
|
||||
(effects (font (size 1.2065 1.2065) (thickness 0.12065)) (justify left bottom))
|
||||
)
|
||||
(fp_line (start -8.491 2.286) (end -6.484 0.279) (layer F.Fab) (width 0.254))
|
||||
(fp_line (start -3.512 2.261) (end -1.531 0.254) (layer F.Fab) (width 0.254))
|
||||
(fp_line (start 1.517 2.286) (end 3.524 0.279) (layer F.Fab) (width 0.254))
|
||||
(fp_line (start 6.495 2.261) (end 8.477 0.254) (layer F.Fab) (width 0.254))
|
||||
(fp_line (start -9.989 5.461) (end 10.001 5.461) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 10.001 -3.734) (end 10.001 -3.531) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 10.001 -3.734) (end -9.989 -3.734) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -9.989 5.461) (end -9.989 3.073) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -9.989 3.073) (end -8.389 3.073) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -8.389 3.073) (end -6.611 3.073) (layer F.Fab) (width 0.1524))
|
||||
(fp_line (start -6.611 3.073) (end -3.385 3.073) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -1.607 3.073) (end 1.619 3.073) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 3.397 3.073) (end 6.622 3.073) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 8.4 3.073) (end 10.001 3.073) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -9.989 3.073) (end -9.989 -3.531) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 10.001 3.073) (end 10.001 5.461) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -9.989 -3.531) (end 10.001 -3.531) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -9.989 -3.531) (end -9.989 -3.734) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start 10.001 -3.531) (end 10.001 3.073) (layer F.SilkS) (width 0.1524))
|
||||
(fp_line (start -3.385 3.073) (end -1.607 3.073) (layer F.Fab) (width 0.1524))
|
||||
(fp_line (start 1.619 3.073) (end 3.397 3.073) (layer F.Fab) (width 0.1524))
|
||||
(fp_line (start 6.622 3.073) (end 8.4 3.073) (layer F.Fab) (width 0.1524))
|
||||
(fp_circle (center -7.5 1.27) (end -6.0014 1.27) (layer F.Fab) (width 0.1524))
|
||||
(fp_circle (center -7.5 -2.2098) (end -6.992 -2.2098) (layer F.SilkS) (width 0.1524))
|
||||
(fp_circle (center -2.4962 1.27) (end -0.9976 1.27) (layer F.Fab) (width 0.1524))
|
||||
(fp_circle (center -2.4962 -2.2098) (end -1.9882 -2.2098) (layer F.SilkS) (width 0.1524))
|
||||
(fp_circle (center 2.5076 1.27) (end 4.0062 1.27) (layer F.Fab) (width 0.1524))
|
||||
(fp_circle (center 2.5076 -2.2098) (end 3.0156 -2.2098) (layer F.SilkS) (width 0.1524))
|
||||
(fp_circle (center 7.5114 1.27) (end 9.01 1.27) (layer F.Fab) (width 0.1524))
|
||||
(fp_circle (center 7.5114 -2.2098) (end 8.0194 -2.2098) (layer F.SilkS) (width 0.1524))
|
||||
(fp_text user 1 (at -9.532 -0.635) (layer F.Fab)
|
||||
(effects (font (size 1.2065 1.2065) (thickness 0.127)) (justify left bottom))
|
||||
)
|
||||
(fp_text user 2 (at -4.579 -0.635) (layer F.Fab)
|
||||
(effects (font (size 1.2065 1.2065) (thickness 0.127)) (justify left bottom))
|
||||
)
|
||||
(fp_text user 3 (at 0.4756 -0.635) (layer F.Fab)
|
||||
(effects (font (size 1.2065 1.2065) (thickness 0.127)) (justify left bottom))
|
||||
)
|
||||
(fp_text user 4 (at 5.4286 -0.635) (layer F.Fab)
|
||||
(effects (font (size 1.2065 1.2065) (thickness 0.127)) (justify left bottom))
|
||||
)
|
||||
(pad 1 thru_hole oval (at -7.5 1.27 90) (size 3.5814 1.7907) (drill 1.1938) (layers *.Cu *.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 2 thru_hole oval (at -2.5 1.27 90) (size 3.5814 1.7907) (drill 1.1938) (layers *.Cu *.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 3 thru_hole oval (at 2.5 1.27 90) (size 3.5814 1.7907) (drill 1.1938) (layers *.Cu *.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
(pad 4 thru_hole oval (at 7.5 1.27 90) (size 3.5814 1.7907) (drill 1.1938) (layers *.Cu *.Mask)
|
||||
(solder_mask_margin 0.1016))
|
||||
)
|
43
PCB/kicad/logicBoard/SB_LOGICBOARD_V01.pro
Normal file
43
PCB/kicad/logicBoard/SB_LOGICBOARD_V01.pro
Normal file
|
@ -0,0 +1,43 @@
|
|||
update=22-8-2022 20:21:50
|
||||
version=1
|
||||
last_client=kicad
|
||||
[general]
|
||||
version=1
|
||||
RootSch=
|
||||
BoardNm=
|
||||
[pcbnew]
|
||||
version=1
|
||||
LastNetListRead=
|
||||
UseCmpFile=1
|
||||
PadDrill=0.600000000000
|
||||
PadDrillOvalY=0.600000000000
|
||||
PadSizeH=1.500000000000
|
||||
PadSizeV=1.500000000000
|
||||
PcbTextSizeV=1.500000000000
|
||||
PcbTextSizeH=1.500000000000
|
||||
PcbTextThickness=0.300000000000
|
||||
ModuleTextSizeV=1.000000000000
|
||||
ModuleTextSizeH=1.000000000000
|
||||
ModuleTextSizeThickness=0.150000000000
|
||||
SolderMaskClearance=0.000000000000
|
||||
SolderMaskMinWidth=0.000000000000
|
||||
DrawSegmentWidth=0.200000000000
|
||||
BoardOutlineThickness=0.100000000000
|
||||
ModuleOutlineThickness=0.150000000000
|
||||
[cvpcb]
|
||||
version=1
|
||||
NetIExt=net
|
||||
[eeschema]
|
||||
version=1
|
||||
LibDir=
|
||||
[eeschema/libraries]
|
||||
[schematic_editor]
|
||||
version=1
|
||||
PageLayoutDescrFile=empty.kicad_wks
|
||||
PlotDirectoryName=
|
||||
SubpartIdSeparator=0
|
||||
SubpartFirstId=65
|
||||
NetFmtName=
|
||||
SpiceAjustPassiveValues=0
|
||||
LabSize=50
|
||||
ERC_TestSimilarLabels=1
|
34
PCB/kicad/logicBoard/SB_LOGICBOARD_V01.sch
Normal file
34
PCB/kicad/logicBoard/SB_LOGICBOARD_V01.sch
Normal file
|
@ -0,0 +1,34 @@
|
|||
EESchema Schematic File Version 4
|
||||
EELAYER 30 0
|
||||
EELAYER END
|
||||
$Descr A4 11693 8268
|
||||
encoding utf-8
|
||||
Sheet 1 4
|
||||
Title ""
|
||||
Date ""
|
||||
Rev ""
|
||||
Comp ""
|
||||
Comment1 ""
|
||||
Comment2 ""
|
||||
Comment3 ""
|
||||
Comment4 ""
|
||||
$EndDescr
|
||||
$Sheet
|
||||
S 1000 1000 500 150
|
||||
U 6303E571
|
||||
F0 "Microcontroller" 50
|
||||
F1 "Microcontroller.sch" 50
|
||||
$EndSheet
|
||||
$Sheet
|
||||
S 3000 1000 500 150
|
||||
U 6303E79D
|
||||
F0 "Psup 5v and 3.3v" 50
|
||||
F1 "Psup_5v_and_3.3v.sch" 50
|
||||
$EndSheet
|
||||
$Sheet
|
||||
S 5000 1000 500 150
|
||||
U 6303EA23
|
||||
F0 "SB_HEADERS" 50
|
||||
F1 "SB_HEADERS.sch" 50
|
||||
$EndSheet
|
||||
$EndSCHEMATC
|
5
PCB/kicad/logicBoard/empty.kicad_wks
Normal file
5
PCB/kicad/logicBoard/empty.kicad_wks
Normal file
|
@ -0,0 +1,5 @@
|
|||
(page_layout
|
||||
(setup (textsize 1.5 1.5)(linewidth 0.15)(textlinewidth 0.15)
|
||||
(left_margin 10)(right_margin 10)(top_margin 10)(bottom_margin 10))
|
||||
(line (name segm1:Line) (start 0 0) (end 0 0))
|
||||
)
|
3
PCB/kicad/logicBoard/fp-lib-table
Normal file
3
PCB/kicad/logicBoard/fp-lib-table
Normal file
|
@ -0,0 +1,3 @@
|
|||
(fp_lib_table
|
||||
(lib (name SB_LOGICBOARD_V01)(type KiCad)(uri "$(KIPRJMOD)/SB_LOGICBOARD_V01.pretty")(options "")(descr ""))
|
||||
)
|
3
PCB/kicad/logicBoard/sym-lib-table
Normal file
3
PCB/kicad/logicBoard/sym-lib-table
Normal file
|
@ -0,0 +1,3 @@
|
|||
(sym_lib_table
|
||||
(lib (name SB_LOGICBOARD_V01-eagle-import)(type Legacy)(uri ${KIPRJMOD}/SB_LOGICBOARD_V01-eagle-import.lib)(options "")(descr ""))
|
||||
)
|
Loading…
Reference in a new issue