2017-09-14 00:33:18 +00:00
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From 291969f6c3444515961a1d3f6f99c9323f599b04 Mon Sep 17 00:00:00 2001
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2017-07-05 02:14:49 +00:00
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From: Marc Zyngier <Marc.Zyngier@arm.com>
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Date: Sat, 1 Jul 2017 15:16:36 +0100
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2017-09-14 00:33:18 +00:00
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Subject: [PATCH 02/12] ARM64: dts: marvell: armada37xx: Wire PMUv3
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2017-07-05 02:14:49 +00:00
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The Cortex-A53s that power the Armada-37xx SoCs are equipped with
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a PMUv3, just like most ARMv8 cores.
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Advertise the PMUv3 presence in the device tree, and wire its
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interrupt. This allows the perf subsystem to work correctly.
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Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
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---
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arch/arm64/boot/dts/marvell/armada-37xx.dtsi | 5 +++++
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1 file changed, 5 insertions(+)
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diff --git a/arch/arm64/boot/dts/marvell/armada-37xx.dtsi b/arch/arm64/boot/dts/marvell/armada-37xx.dtsi
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2017-09-14 00:33:18 +00:00
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index b6f1e7a5e5ec..35307cd93db5 100644
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2017-07-05 02:14:49 +00:00
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--- a/arch/arm64/boot/dts/marvell/armada-37xx.dtsi
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+++ b/arch/arm64/boot/dts/marvell/armada-37xx.dtsi
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@@ -81,6 +81,11 @@
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<GIC_PPI 10 IRQ_TYPE_LEVEL_HIGH>;
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};
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+ pmu {
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+ compatible = "arm,armv8-pmuv3";
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+ interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_HIGH>;
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+ };
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+
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soc {
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compatible = "simple-bus";
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#address-cells = <2>;
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--
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2017-09-13 00:05:47 +00:00
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2.14.1
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2017-07-05 02:14:49 +00:00
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